DOWNLOAD Sharp LC-42XL2E (serv.man5) Service Manual ↓ Size: 2.32 MB | Pages: 42 in PDF or view online for FREE

Model
LC-42XL2E (serv.man5)
Pages
42
Size
2.32 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD / Major IC Informations
File
lc-42xl2e-sm5.pdf
Date

Sharp LC-42XL2E (serv.man5) Service Manual ▷ View online

LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU
5 – 13
2.8. IC1507 (VHiSii9185+-1Q)
2.8.1 Block Diagram
57
LIN4
I
Lch Input 4
58
RIN4
I
Rch Input 4
59
LIN5
I
Lch Input 5
60
RIN5
I
Rch Input 5
61
LIN6
I
Lch Input 6
62
RIN6
I
Rch Input 6
63
PVSS
PLL Ground
64
R
External Resistor
Pin No.
Pin Name
I/O
Pin Function
LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU
5 – 14
2.8.2 Pin Connections and short description
Pin No.
Pin Name
I/O
Pin Function
System Switching Pins
30, 50, 70
DSDA0, DSDA1, DSDA2 
I/O
DDC I2C Data for respective port.
31, 51, 71
DSCL0, DSCL1, DSCL2 
I
DDC I2C Clock for respective port.
32, 52, 72
RPWR0, RPWR1, RPWR2
I
5V Port detection input for respective port.
Connect to 5V signal from HDMI input connector.
16, 36, 56 
HPD0, HDP1, HPD2 
O
Hot Plug Detect Output for respective port.
Connect to HOTPLUG of HDMI input connector. 
76
HPDIN
I
Hot Plug Detect Input.
78
TSCL
O
Master DDC I2C Clock (Open Drain Output) to HDMI receiver.
I2C transactions required for HDCP operation are performed over this I2C bus.
77
TSDA
I/O
Master DDC Data (Open drain output.) to HDMI receiver. I2C transactions required for 
HDCP operation are performed over this I2C bus.
Configuration Pins
79
I2CADDR/TPWR
I/O
I2C Slave Address input / Transmit Power Sense output pin.
When RESET# is low, this pin is used as an input to latch the I2C sub-address.
The level on this pin is latched when the RESET# pin transitions from low to high.
When RESET# is high, this pin is used as the TPWR output, indicating that the selected 
Rx-port has 5V present. When none of the Rx ports are selected, this signal is low.
35
I2CSEL/INT#
I/O
I2C Selection input / Interrupt output pin.
When RESET# is low, this pin is used as an input to latch the External Port Detection 
signal. The level on this pin is latched when the RESET# pin transitions from low to high.
When this pin is low during reset, the external pins EPSEL1/LSCL and EPSEL0/LSDA 
are used to select the Rx-port as EPSEL[1:0].
When this pin is high during reset, the internal local I2C register is used to select the Rx-
port.
75
RSVDL
I
Reserved for use by Silicon Image and must be tied low.
Control Pins
13
RESET#
I
Reset Pin (Active LOW). Certain configuration inputs are latched when RESET# transi-
tions from low to high.
15
LSCL/EPSEL1
I
Local I2C Clock / External Port Select 1. When I2CSEL is high, this becomes the Local 
I2C bus clock pin, LSCL. When I2CSEL is low, this becomes the external port select pin, 
EPSEL1. True open drain, so does not pull to ground if power not applied. An external 
pull-up is required.
14
LSDA/EPSEL0
I/O
Local I2C Data / External Port Select 0. When I2CSEL is high, this becomes the Local 
I2C bus data pin, LSDA. When I2CSEL is low, this becomes the external port select pin, 
EPSEL0. True open drain, so does not pull to ground if power not applied. An external 
pull-up is required.
CEC Pins
54
CEC_A
I/O
HDMI compliant CEC I/O used to interface to CEC devices.
CEC electrically compliant signal. This pin connects to the CEC signal of all HDMI con-
nectors in the system. As an input, the pad acts as a LVTTL Schmitt triggered input and 
is 5V tolerant. As an output, the pad acts as an NMOS driver with resistive pull-up. This 
pin has an internal pull-up resistor.
53
CEC_D
I/O
CEC interface to local system. True open-drain. An external pull-up is required.
This pin typically connects to the local CPU.
Differential Signal Data Pins
22
R0X0+
I
TMDS input Port 0 data pairs.
21
R0X0-
I
25
R0X1+
I
24
R0X1-
I
28
R0X2+
I
27
R0X2-
I
19
R0C+
I
TMDS input Port 0 clock pair.
18
R0C-
I
42
R1X0+
I
TMDS input Port 1 data pairs.
41
R1X0-
I
45
R1X1+
I
44
R1X1-
I
48
R1X2+
I
47
R1X2-
I
39
R1C+
I
TMDS input Port 1 clock pair.
38
R1C-
I
LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU
5 – 15
2.9. IC2002 (RH-iXB986WJN8Q)
2.9.1 Pin Connections and short description
62
R2X0+
I
TMDS input Port 2 data pairs.
61
R2X0-
I
65
R2X1+
I
64
R2X1-
I
68
R2X2+
I
67
R2X2-
I
59
R2C+
I
TMDS input Port 2 clock pair.
58
R2C-
I
7
TX0+
O
TMDS output data pairs.
8
TX0-
O
4
TX1+
O
5
TX1-
O
1
TX2+
O
2
TX2-
O
10
TXC+
O
TMDS output clock pair. 
11
TXC-
O
12
EXT_SWING
I
Voltage Swing Adjust. A resistor tied from this pin to AVCC18 determines the amplitude 
of the voltage swing. The recommended value is 750
Ω.
Power and Ground Pins
23, 43, 55, 63
AVCC33 
Analog VCC. Connect to 3.3V supply.
6, 17, 29, 37, 49, 
57, 69 
AVCC18 
Analog VCC. Connect to 1.8V supply. 
3, 9, 20, 26, 40, 
46, 60, 66, 80 
AGND —
Analog 
GND.
33, 73
DVCC18 
Digital VCC. Connect to 1.8V supply. 
34, 74 
DGND 
Digital GND. 
Pin No.
Pin Name
I/O
Pin Function
1
SHIP_EN
O
SHIP (CSI) processing enabled/disabled selection signal
2
CS_CPLD
O
CPLD chip select
3
N_SRESET
O
Reset
4
PM_REQ
O
Request signal (Communication request at H)
5
IR_PASS
O
Remote control signal external through switching
6
Vc1
Internal voltage drop power terminal
7
X2
I
Sub clock (32.768kHz)
8
X1
O
Sub clock (32.768kHz)
9
N_RESET
I
System reset
10
OSC2
O
System clock (20.00MHz)
11
Vss
GND
12
OSC1
I
System clock (20.00MHz)
13
Vcc
Power supply (+3.3V)
14
N_NMI
I
For FLASH rewrite
15
WAKE_UP
I
For WAIT mode return
16
AC_DET
I
For instantaneous blackout detection
17
POW_SW
I
Power SW
18
FRAME
O
Panel controller control (50/60 setting)
19
ROMSEL0
O
For test pattern control
20
O_S_SET
O
Panel controller control ON/OFF
21
TEMP1
O
Panel controller control, temperature information 1
22
TEMP2
O
Panel controller control, temperature information 2
23
TEMP3
O
Panel controller control, temperature information 3
24
L_R
O
Panel controller control, flip horizontal
25
U_D
O
Panel controller control, flip vertical
26
UARXD_M
I
Serial for MAIN CPU communication (To TXD of MAIN CPU)
27
UATXD_M
O
Serial for MAIN CPU communication (To RXD of MAIN CPU)
28
TXD
O
For debugger (E8) connection
29
RXD
I
For debugger (E8) connection
30
SCLD
I
For debugger (E8) connection
31
BUSY
I
For debugger (E8) connection
32
LED_R
O
Power LED, red
33
LED_G
O
Power LED, green
34
LED_OPC
O
OPC LED
Pin No.
Pin Name
I/O
Pin Function
LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU
5 – 16
35
LED_SLEEP
O
SLEEP_LED
36
AV_LINK_O
O
AV_LINK output
37
ANT_POW
O
Antenna power control
38
EXE_LED
O
Microprocessor operation check LED
39
I2C_GATE
O
I2C bus SW
40
N_SYSRST_IN
I
SYSTEM RESET switch detection
41
RS_ON
O
RS232C power control
42
STB
O
Backlight control.
43
ERR_PNL
I
Lamp error detection (L: error)
44
AV_LINK_I
I
AV_LINK input
45
SYNC_DET
O
PC power management setting
46
VSYNC
I
VSYNC interrupt
47
CEC_O
O
CEC output
48
CEC_I
I
CEC input
49
RC
I
Remote control signal input.
50
I2C1_SCL
O
I2C CH1
51
I2C1_SDA
I/O
I2C CH1
52
W_PROT_M
O
EEP write protection
53
P16
For debugger (E8) connection
54
DVIA_DET
I
DVI analog detection (for PC power management)
55
MUTE_A_ALL
O
Audio mute
56
DET_6V
I
6V detection
57
DET_10V
I
10V detection
58
DET_PNL12V
I
Panel 12V detection
59
DER_D3V3
I
D3.3V detection
60
DET_3V3
I
3.3V detection
61
EU_POW
O
Digital system power control
62
LINK_POW
O
i.Link power control
63
PNL_POW
O
5V ON/OFF SW for panel
64
D_POW
O
Main power ON/OFF control
65
SMPOW
O
Power control
66
PSIZ_L
I
Panel size discrimination terminal (Mounting discrimination)
67
PSIZ_H
I
Panel size discrimination terminal (Mounting discrimination)
68
QSTEMP
I
Thermistor input (Panel temperature)
69
KEY1
I
Main unit key input 1
70
KEY2
I
Main unit key input 2
71
AREA1
I
Panel size discrimination terminal (Mounting discrimination)
72
PNL_TYPE
I
Panel manufacturer discrimination (Mounting discrimination)
73
OPC
I
Brightness sensor input
74
AFT/AGC
I
Tuner AFT/ACG input
75
Avss
Analog GND for A/D
76
LNBSHORT
I
Antenna short detection (Low: OK, High: NG)
77
Vref
A/D converter reference voltage
78
Avcc
Analog power for A/D
79
PNL_TYPE
I
Panel solution discrimination (Mounting discrimination)
80
ILLUMI
O
Illumination LED
Pin No.
Pin Name
I/O
Pin Function
Page of 42
Display

Click on the first or last page to see other LC-42XL2E (serv.man5) service manuals if exist.