Sharp MX-6201N / MX-7001N (serv.man45) Service Manual ▷ View online
MX-7001N BLOCK DIAGRAM / ブロック図 1 – 3
3. PCU PWB
IC1
CPU
H8S/23
7
3
IC4/IC8
SRAM
(1Mbit
x
2)
FLASH
ROM
(1
6
Mbit)
IC
6
EEPROM
(128
kbit)
IC11
PMC
ASIC
IC
7
I/O
ASIC
IC
9
/IC2
7
DFF
LCX5
7
4
I2C
B
us
IC2
9
/IC3
0
MUX
HC151
x2
䌃䌌
䌏
䌃
䌋
䌌䌃䌃
FINISHER
UART
UART
IC3
RESET
IC
LSU
Optional
To
MFPC
Via
Mot
h
er
UART
UART
DC
Po
w
er
Supply
X1
Xtal
1
9.660
8MH
z
Sensor
Input
(PPD2)
Sensor
Input
(PPD1
-
3)
/
(DSW_R/D/FU/FL)
/
(BELT_HP)
(C3PED)
/
(C4PED)
/
(TFD)
/
(CCHP)
(FPD_CL/BK)
/
(C3PFD)
/
(POD1)
/
(TBLTB)
(APPD1
-
2
)
/
(TBLTC)
/
(C3SS1
-
4
)
(C4SS1
-
4
)
/
(T1PPD1
-
2)
/
(LPPD)
/
(T2LUD)
(T1LUD)
/
(C4SPD)
/
(C4LUD)
/
(C4PFD)
(VTOD)
/
(C3SPD)
/
(C3LUD)
/
(MPFD)
(DHPD_K/C/M/Y)
/
(T2PPD)
/
(TANSET)
(T2PED)
/
(T1PED)
/
(T2SPD)
/
(T1SPD)
CRUM
(CRUM_C/M/Y/K1/K2)
IC
70
D/A
C
onv
(TCS/REGS
cont)
Load
C
ontrol
Output
Coin
vendor
(Optional)
Steppin
g
Motor
C
ontrol
Pout
Motor
(POM)
ADU
M
otor
(ADML)/(ADMH)
PSF
Motor
(PFM)
Dru
m
Motor
BK
(DM_K)
Dru
m
Motor
CL
(DM_C/M/Y)
Belt
Motor
(BTM)
LCC
Motor
(LCCM)
Fuser
R
elease
M
otor
(FUEXM)
Fuser
unit
HL
control
(HL_UM/LM/US/EX)
Sensor
Input
(DVK_CH)
/
(CCM_ROT)
(PTCM_ROT/HP)
(TNFD)
/
(HTCS_K/C/M/Y)
(FUEXD)
/
(WEB_INL/END)
Load
control
Output
(PCSS)
/
(MPFS)
/
(TANCL)
(LSS_CL)
/
(BLTCL_R)
(BLTCL)
/
(LSS_BK)
(FRS)
UM/
LM
/US
FAN
M
otor
Control
PS
Fan
(PSFM1
-
2
)
O
zone
F
an
(OZFM1
-
3
)
Pout
Fan
(POFM_F/U)
Fuser
Fan
(FUFM_F/R)
Ventilation
Fan
(VFM_C/R)
(DMCFM/BTMFM)
Flas
h
Write
P
rotect
HV
MC
/
T
C
2
unit
/
P
TC
unit
3-w
iredserial
Disc
h
ar
g
eL
a
m
p
(DL_K/C/M/Y)
DC
Motor
Control
DV
Motor
B
K
(DVKM)
DV
Motor
C
L
(DVCM)
Paper
Feed
Motor
(CPFM)
Resist
Motor
(RRM)
Fuser
Motor
(FUM)
Waste
T
oner
Motor
(WTM)
Sensor
Input
TBBOX
FAN
Loc
k
Detect
(POFM_LD1
-
3
)
/
(OZFM_LD1
-
3)
(FUFM_R_FD)
/
(FUFM_F_LD)
(VFM_C_LD)
/
(VFM_R_LD)
(PSFM_LD1
-
2)
/
(DMCFM_LD)
(BTMFM_LD)
IC
7
1/IC
7
2/IC82
Analo
g
MUX
x
3
Analo
g
Input
Te
m
p/Hu
m
sensor
(TH_M/HUD_M)
LSU
T
h
er
m
istor
(TH1_LSU/TH2_LSU)
DV
detector
(DVTYP_C/M/Y/K1/K2)
Fuser
T
h
er
m
istor
(TH_UM/LM/US/EX1/EX2)
Paper
Out
T
h
er
m
istor
(PO_TMP)
DV
Te
m
p/Hu
m
Sensor
(DVK_TH/HUM)
Dru
m
Mar
k
Sensor
(DMS)
FW
Sensor
Input
COIN
VENDOR
(Optional)
(CV_CLCOPY/COPY)
Load
output
Mec
h
anical
Counter
(Optional)
(PNC_K/CL)
Syncronous
Motor
Toner
Motor
(TN_C/M/Y/K1/K2)
DC
Motor
Tray
Lift
Up
Motor
(T1LUM)
/
(T2LUM)
(C3LUM)
/
(C4LUM)
Sensor
Input
(DSW_ADU)
/
(TFD3)
/
(MPLD)
(MTOP1
-
2
)
/
(MPED)
MUX
HC151
RD
I/F
PWB
Syncronous
Motor
Fuser
Cleanin
g
Motor
(WEB_M)
HV
TC1
unit
DC
Motor
2nd
Belt
R
elease
Motor
(TURM)
C
h
ar
g
er
Cleaner
Motor
(CCM)
/
(PTCM)
Load
Control
Output
(RRC)
/
(T1PUS)
/
(T2PUS)
(C3PFC)
/
(MPGS)
/
(C4PFC)
(TRC1
-
2)
/
(MPUC)
/
(ADUGS)
(T2PFC)
/
(T1PFC)
/
(LPFC)
(FPCL2)
/
(RRC2)
/
(FPCL1)
(C3PUS)
/
(C4PUS)
/(MFPS)
EX
DM
CLK/BTM
C
LK
Driver
PWB
Toner
Hopper
Motor
(HTM_K/C/M/Y)
(PHTM_K)
IC83/84/8
6
/8
7
/88
AND
G
ate
VHCT
0
8
x
4
Analo
g
Input
Toner
Detector
(TCS_K/C/M/Y)
Process
C
ont
.
sensor
(PCS_K/CL)
Resist
sensor
(REGS_F/R)
Multi-bypass
tray
w
idt
h
sensor
(MPWD)
I2C
Bus
AddressBus
[21:
0]
DATABus
[15:
0]
MX-7001N BLOCK DIAGRAM / ブロック図 1 – 4
4. SCANNER CONTROL PWB / スキャナコントロール PWB
SCNcntPWB
RSPF
Unit
RSPF
FEED
MOTOR
SCANNER
MOTOR
RSPF
RVS
MOTOR
PHOTO
SENSOR
CLUTCH
SDRAM
BUS
CCD
PWB
With
AFE
&
LVDS
LVDS
DSPFcnt
PWB
EEPROM
32Kbit
I2C
RGB10bit*3
LVDS
Driver
4bit
*2
LVDS
LVDS
LVDS
D
river
28bit
RGB8bit*3
RGB8bit*3
RGB8bit*3
LVD
S
LVDS
Driver
30bit
MHPS
LVDS
Receiver
4bit
*2
CARD
READER
AUDITOR
OCSW
XTAL
28.795MHz
or
22.7425MHz
LVDS
24bit
BUS
BUFFER
STMP
U
N
LAMP
UN
PANEL
PWB
INVERTER
PWB
LCD
LVDS
R
eceiver
30bit
ADDRESS/DATA
BUS
SRAM
1Mbit
/CS2
SCAN
ASIC
/CS3
SDRAM
128Mbit
LVDS
Driver
28bit
DSPF
Memory
P
WB
LVDS
Receiver
28bit
24bit
B
US
BUFFER
CPT
ASIC
/CS4
DOCC
PWB
Mother
PWB
(MFP
PWB)
<Engine/Controller>
CPU
H8S/2373
XTAL
19.6608MHz
FlashROM
<Socket>
8Mbit
/CS0
(/CS0
R
ESERVE)
IO
A
S
IC
/C
S5
Original
detection
(Light
receiving)
Original
detection
(Light
emitting)
MX-7001N BLOCK DIAGRAM / ブロック図 1 – 5
5. SERIAL COMMUNICATION / シリアル通信
CPU
H8S/2373
TxD
_
L
C
C
RxD
_
L
C
C
TxD_FIN
RxD_FIN
O.C.
O.C.
O.C.
O.C.
PMC
ASIC
uPD65946GJ
O.C.
O.C.
O.C.
O.C.
CPU
M30843FWGP
Schmit
Inv.
O.C.
O.C.
O.C.
CPU
H8/3687
DTR_FIN
DSR_FIN
DTR_LCC
DSR_LCC
PCU
FINISHER
(Optional)
LCC
(Optional)
Schmit
Inv.
O.C.
O.C.
O.C.
A[4:0]
D[15:8]
Schmit
Inv.
Schmit
Inv.
Schmit
Inv.
SCK_LSU
RSV_DAT
TRANS_DAT
Schmit
Inv.
Schmit
Inv.
Schmit
Inv.
LSUASIC
O.C.
nPCU_RxD
Schmit
Inv.
nPCU_TxD
O.C.
PCU_DSR
Schmit
Inv.
PCU_DTR
Schmit
Inv.
O.C.
Schmit
Inv.
O.C.
MFPC
I/F
ASIC
O.C
O.C.
Schmit
Inv.
O.C.
nTxD_SCN
nRxD_SCN
RT
S_
SC
N
CPU
H8S/2373
CPU
H8S/2373
Schmit
Inv.
Schmit
Inv.
O.C
Schmit
Inv.
CTS_SCN
Schmit
Inv.
TxD0
Schmit
Inv.
O.C.
O.C.
Schmit
Inv.
Sc
hm
it
In
v.
O.C.
O.C.
TxD_SCAN
RxD_SCAN
I/O
ASIC
uPD65892GC
O.C
O.C.
Schmit
Inv.
O.C.
FAX2D_RTS
FAX2D_CTS
FAX2CS_RTS
Schmit
Inv.
Schmit
Inv.
O.C
Schmit
Inv.
FAX2CS_CTS
P.D.
P.U.
P.D.
P.U.
P.D.
P.U.
P.U.
P.
D
.
P.D.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.U.
P.D.
P.D.
P.U.
P.U.
P.D.
P.U.
P.U.
P.U.
P.D.
P.D.
P.U.
P.D.
P.D.
P.U.
P.U.
P.D.
P.U.
P.D.
P.U.
P.D.
A[4:0]
D[15:8]
P.D.
P.U.
P.U.
P.D.
P.D.
P.U.
P.U.
P.D.
FAX2D_TxD
FAX2D_RxD
FAX2CS_TxD
FAX2CS_RxD
LVDS
RxD0
I/Oport
I/Oport
TxD1
RxD1
SCK1
TxD2
RxD2
TxD4
RxD4
RxD
TxD
SCK
RxD
TxD
I/O
I/O
RxD
TxD
I/O
I/O
RxD[1]
TxD[1]
CTS[1]
RTS[1]
RxD[2]
TxD[2]
CTS[2]
RTS[2]
RxD[7]
TxD[7]
CTS[7]
RTS[7]
TxD[8]
RxD[8]
CTS[8]
RTS[8]
PIC
TxD[PIC]
RxD[PIC]
O.C.
Schmit
Inv.
P.U.
P.D.
nTxD_PIC
O.C
Schmit
Inv.
nRxD_PIC
P.U.
CLR[PIC]
O.C.
O.C
P.U.
CLR_PIC
REQ[PIC]
Schmit
Inv.
REQ_PIC
O.C
P.U.
LSU
DSPF
C
nt
SCN
Cnt
Mo
the
r
MFPC
FAX
(Optional)
TxD
RxD
TxD
RxD
I/O
I/O
New
ASIC
TxD_FAX(D)+
TxD_FAX(D)-
RxD_FAX(D)+
RxD_FAX(D)-
TxD_FAX(CS)+
TxD_FAX(CS)-
RxD_FAX(CS)+
RxD_FAX(CS)-
RxD
TxD
CPU
SH7706
PIC
TxD
RxD
P.U.
DOCC
(Optional)
CPU
H8S/2320
O.C.
Schmit
Inv.
RxD
TxD
Schmit
Inv.
O.C
DTR_SCAN
DSR_SCAN
RxD
TxD
MX-7001N CIRCUIT DIAGRAM / 回路図 2 – 1
MX-7001N
Circuit Diagram
[2] CIRCUIT DIAGRAM / 回路図
1. MFP CONTROLLER PWB / MFP コントローラ PWB
DC_ON_OFF_CTL_CORE
DC_ON_OFF_CTL_IO
DC_ON_OFF_CTL_CORE
DC_ON_OFF_CTL_IO
CPU_CORE1.3V
+2.5V
DGND
DGND
DGND
DGND
+5V_IN
+5V_IN
DGND
DGND
+3.3V
+3.3V
+3.3V
DGND
DGND
+5V_IN
DGND
DGND
DGND
+5V_IN
DGND
DGND
DGND
DGND
DGND
DGND
DGND
+3.3V
DGND
DGND
+5V_IN
DGND
DGND
DGND
DGND
DGND
DGND
+1.2V
DGND
DGND
DGND
+2.5V
+2.5V
+2.5V
GPO_LED1_ON
{43}
GPO_LED2_ON
{43}
GPO_LED3_ON
{43}
SILK:="POW"
R18
470J
470J
C955
1uF(1608:B)
1uF(1608:B)
C3
10uF(2012)
CP13
R6
68.1KF
CP24
C9
10uF(2012)
VIN_5V
1
ONxOFF
2
N.C.
4
N.C.
5
GND
6
GND
7
ADJ
8
VOUT
9
VOUT
10
3PIN
:
N
ONE
4
,5PIN
Must
be
left
N
.C
.
MOD1
MPD6S019S
CP23
R13
267KF
VIN_5V
1
ONxOFF
2
N.C.
4
N.C.
5
GND
6
GND
7
ADJ
8
VOUT
9
VOUT
10
3PIN
:
N
ONE
4
,5PIN
Must
be
left
N
.C
.
MOD4
MPD6S019S
K
N
A
D34
RB461F
R725
1.50KF
CP16
R1
3.9KF
CP25
R19
470J
470J
CP7
CP7
C959
0.1uF(B)
0.1uF(B)
+
-
+
C8
X_150uF/4.0V(PXA/F60)
C960
0.1uF(B)
0.1uF(B)
A
K
D2
LT1F67AF
LT1F67AF
1
1
2
2
3
3
4
4
5
5
6
6
CN27
X_BM06B-SRSS-TB
CP20
C958
0.1uF(B)
0.1uF(B)
CP2
+
-
+
C10
X_150uF/4.0V(PXA/F60)
R17
470J
470J
CP5
R4
3.9KF
C866
10uF(2012)
10uF(2012)
CP8
AS1
QPWBX1786FCZZ8
CP14
CP1
E
B
C
10K
47K
Q3
DTC114YUA
CP10
CP9
K
N
A
D49
RB461F
CP21
R726
1.50KF
R105
68.1KF
CP11
K
N
A
D32
RB461F
C953
1uF(1608:B)
1uF(1608:B)
CP6
CP4
C961
0.1uF(B)
0.1uF(B)
E
B
C
10K
47K
Q2
DTC114YUA
C864
10uF(2012)
10uF(2012)
CP12
VIN_5V
1
ONxOFF
2
N.C.
4
N.C.
5
GND
6
GND
7
ADJ
8
VOUT
9
VOUT
10
3PIN
:
N
ONE
4
,5PIN
Must
be
left
N
.C
.
MOD2
MPD6S019S
E
B
C
10K
47K
Q1
DTC114YUA
DTC114YUA
VIN_5V
1
ONxOFF
2
N.C.
4
N.C.
5
GND
6
GND
7
ADJ
8
VOUT
9
VOUT
10
3PIN
:
N
ONE
4
,5PIN
Must
b
e
left
N
.C
.
MOD5
MPD6S022S
A
K
D3
LT1F67AF
LT1F67AF
K
N
A
D36
RB461F
R3
68.1KF
CP3
CP15
R12
267KF
C876
1uF(1608:B)
1uF(1608:B)
A
K
D1
LT1F67AF
LT1F67AF
C954
1uF(1608:B)
1uF(1608:B)
C1
10uF(2012)
+
-
+
C2
X_150uF/4.0V(PXA/F60)
CP19
5
5
4
4
3
3
D
C
B
A
MFPC PWB (DC POWER)
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