Sharp MX-6201N / MX-7001N (serv.man45) Service Manual ▷ View online
MX-7001N CIRCUIT DIAGRAM / 回路図 2 – 22
LED100_
LEDACT_
LEDACT_
LED10_
PCI1_AD0
E93_DO
E93_SK_MAC
E93_DI_MAC
E93_CS_MAC
E93_CS_MAC
E93_SK_MAC
E93_DI_MAC
E93_SK_MAC
E93_DI_MAC
PCI1_AD11
PCI1_AD1
PCI1_AD2
PCI1_AD3
PCI1_AD4
PCI1_AD5
PCI1_AD6
PCI1_AD7
PCI1_AD8
PCI1_AD9
PCI1_AD10
PCI1_AD11
PCI1_AD12
PCI1_AD13
PCI1_AD14
PCI1_AD15
PCI1_AD16
PCI1_AD17
PCI1_AD18
PCI1_AD19
PCI1_AD20
PCI1_AD21
PCI1_AD22
PCI1_AD23
PCI1_AD24
PCI1_AD25
PCI1_AD26
PCI1_AD27
PCI1_AD28
PCI1_AD29
PCI1_AD30
PCI1_AD31
PCI1_AD2
PCI1_AD3
PCI1_AD4
PCI1_AD5
PCI1_AD6
PCI1_AD7
PCI1_AD8
PCI1_AD9
PCI1_AD10
PCI1_AD11
PCI1_AD12
PCI1_AD13
PCI1_AD14
PCI1_AD15
PCI1_AD16
PCI1_AD17
PCI1_AD18
PCI1_AD19
PCI1_AD20
PCI1_AD21
PCI1_AD22
PCI1_AD23
PCI1_AD24
PCI1_AD25
PCI1_AD26
PCI1_AD27
PCI1_AD28
PCI1_AD29
PCI1_AD30
PCI1_AD31
PCI1_CBE0
PCI1_CBE1
PCI1_CBE2
PCI1_CBE3
PCI1_CBE1
PCI1_CBE2
PCI1_CBE3
DGND
+3.3V
+3.3V
+3.3V
.3V
+3.3V
+3.3V
MAC_PCI1_CLK {4}
MAC_REQ {12}
MAC_GNT {12}
PCI1_INTA_PU {7,12,23,33}
PCI1_STOP {12,23,33}
PCI1_SERR {12,23,33}
PCI1_PERR {12,23,33}
nPCI1_RST {6,23,33}
PCI1_PME {7,23,33}
PCI1_CBE[3:0]
{12,23,33}
PCI1_AD[31:0]
{12,23,33}
PCI1_DEVSEL {12,23,33}
PCI1_FRAME {12,23,33}
PCI1_FRAME {12,23,33}
PCI1_TRDY {12,23,33}
PCI1_IRDY
{12,23,33}
PCI1_PAR {12,23,33}
(B)
CP259
CP286
CP294
KP6
CP271
CP301
CP252
R709 100J
CP304
C339
X_470pF
X_470pF
CP264
CP265
CP288
8
1
7
2
6
3
5
4
BR374
1KJx4
1KJx4
CP274
CP306
CP263
CP270
CP262
CP297
CP305
CP278
CP261
CP284
C365
0.1uF(B)
0.1uF(B)
X1
17
X2
18
NC
34
VREF
40
RESERVED
41
NC
42
NC
43
TPRDM
45
TPRDP
46
REGEN
48
RESERVED
50
TPTDM
53
TPTDP
54
PMEN/CLKRUNN
59
PCICLK
60
INTAN
61
RSTN
62
GNTN
63
REQN
64
AD31
66
AD30
67
AD29
68
AD28
70
AD27
71
AD26
72
AD25
73
AD24
74
CBEN3
75
IDSEL
76
AD23
78
AD22
79
AD21
81
AD20
82
AD19
83
AD18
86
AD17
87
AD16
88
CBEN2
89
FRAMEN
91
IRDYN
92
TRDYN
93
DEVSELN
95
STOPN
96
PERRN
97
SERRN
98
PAR
99
CBEN1
100
AD15
101
AD14
102
AD13
104
AD12
105
AD11
106
AD10
108
AD9
109
AD8
110
CBEN0
111
AD7
112
AD6
113
AD5
115
AD4
116
AD3
118
AD2
119
AD1
120
AD0
121
3VAUX
122
PWRGOOD
123
RESERVED
127
MCSN
129
MRDN
130
MWRN
131
MD0
132
MD2
134
MD3
135
MD5
139
MD6
140
MD7
141
MDIO
4
MDC
5
RXCLK
6
RXD0/MA6
7
RXD1/MA7
10
RXD2/MA8
11
RXD3/MA9
12
RXOE
13
RXER/MA10
14
RXDV/MA11
15
TXD0/MA12
22
TXD1/MA13
23
TXD2/MA14
24
TXD3/MA15
25
COL
28
CRS
29
TXEN
30
TXCLK
31
MA0/LEDACTN
142
MA2/LED100N
144
MA1/LED10N
143
MA5
3
EESEL
128
MA4/EECLK
2
MA3/EEDI
1
MD4/EEDO
138
MD1/CFGDISN
133
C1(VDDIO2)
19
PCIVDD1
69
PCIVDD2
80
PCIVDD3
94
PCIVDD4
107
PCIVDD5
117
IAUXVDD(RXAVDD1)
39
IAUXVDD(RXAVDD2)
47
AUXVDD(MACVDD1)
58
NC(MACVDD2)
125
NC(FSVDD)
36
AUXVDD(TXDVDD)
56
NC(VDDIO4)
85
AUXVDD(VDDIO1)
9
AUXVDD(VDDIO3)
27
AUXVDD(VDDIO5)
137
AUXVDD(PHYVDD1)
21
AUXVDD(PHYVDD2)
33
VSS(VSSIO2)
16
PCIVSS1
65
PCIVSS2
77
PCIVSS3
90
PCIVSS4
103
PCIVSS5
114
RXAVSS1/VSS
38
RXAVSS2/VSS
44
MACVSS1/VSS
57
MACVSS2/NC
124
FSVSS/VSS
35
VSS(TXDVSS)
51
NC(VSSIO4)
84
VSS(VSSIO1)
8
VSS(VSSIO3)
26
VSS(VSSIO5)
136
VSS(PHYVSS1)
20
VSS(PHYVSS2)
32
VSS(TXIOVSS1)
52
VSS(TXIOVSS2)
55
NC(SUBGND1)
37
VSS(SUBGND2)
49
NC(SUBGND3)
126
IC32A
DP83816
C364
0.1uF(B)
0.1uF(B)
6
uF
CP300
CP48
CP289
CP258
CP255
CP272
CP254
CP285
R296
10K
C7
0.1uF(B)
0.1uF(B)
CP257
CP287
CP291
CP267
CP277
CP277
CP260
CP275
CP276
CP276
CP281
CP296
R277
10KJ
CP256
CP302
CP303
CP273
CP282
C363
0.1uF(B)
0.1uF(B)
CP283
C338
1uF(1608:B)
3
3
2
2
1
1
D
C
B
A
15/52 (17)
MX-7001N CIRCUIT DIAGRAM / 回路図 2 – 23
ALE
AD[31:0]
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A20
A21
A23
A24
A25
A26
ROM_BA4
ROM_BA5
ROM_BA6
ROM_BA7
ROM_BA8
ROM_BA9
ROM_BA10
ROM_BA11
ROM_BA12
ROM_BA13
ROM_BA14
ROM_BA15
ROM_BA16
ROM_BA17
ROM_BA19
ROM_BA21
ROM_BA22
ROM_BA23
ROM_BA20
ROM_BA18
ROM_BD0
ROM_BD1
ROM_BD2
ROM_BD3
ROM_BD4
ROM_BD5
ROM_BD6
ROM_BD7
ROM_BD8
ROM_BD9
ROM_BD10
ROM_BD11
ROM_BD12
ROM_BD13
ROM_BD14
ROM_BD15
ROM_BD16
ROM_BD17
ROM_BD18
ROM_BD19
ROM_BD20
ROM_BD21
ROM_BD22
ROM_BD23
ROM_BD24
ROM_BD25
ROM_BD26
ROM_BD27
ROM_BD28
ROM_BD29
ROM_BD30
ROM_BD31
LSI_D0
LSI_D1
LSI_D2
LSI_D3
LSI_D4
LSI_D5
LSI_D6
LSI_D7
LSI_D8
LSI_D9
LSI_D10
LSI_D11
LSI_D12
LSI_D13
LSI_D14
LSI_D15
nDMA_CS0_12
CP_WE0
CP_WE1
CP_WE2
CP_WE3
ROM_BA2
ALE
ROM_BA3
CP_OE0
CP_OE1
CP_OE2
CP_OE3
A19
A22
DGND
DGND
VCCINT_MAX2
VCCINT_MAX2
DGND
VCCIO_MAX2
DGND
DGND
DGND
DGND
VCCIO_MAX2
DGND
DGND
DGND
DGND
DGND
+3.3V
DGND
ALE
{13}
AD[31:0]
{13,21,25}
nREADDIR {13}
LBUS_GEN_CS0 {13,25}
LBUS_GEN_CS1 {13,25}
LBUS_GEN_CS3 {13,21}
LBUS_DMA_CS2 {13,42}
LBUS_GEN_CS2 {13,43}
nIFASIC_RST_BASE {6}
nIFASIC_RST {20}
SRAM_CE2_BASE {6,51}
RTC_CE
{20}
RTC_CE_GATE {27}
SA_LBUS_WAIT {13}
SA_LBUS_OE
{13}
SA_LBUS_WE
{13}
TEST_JTC
TEST_JTM
MAX2_JTA
MAX2_JTA
MAX2_JTA
A
1
B
2
GND
3
Y
4
VCC
5
IC113
SN74LVC1G08DCK
Y
=
AB
C896
0.1uF(B)
0.1uF(B)
CP310
C899
0.1uF(B)
0.1uF(B)
C905
0.1uF(B)
0.1uF(B)
C919
0.1uF(B)
0.1uF(B)
C910
0.1uF(B)
0.1uF(B)
C913
0.1uF(B)
0.1uF(B)
C898
0.1uF(B)
0.1uF(B)
C917
0.1uF(B)
0.1uF(B)
C915
0.1uF(B)
0.1uF(B)
C911
0.1uF(B)
0.1uF(B)
KP7
KP7
CP311
C914
0.1uF(B)
0.1uF(B)
C907
0.1uF(B)
0.1uF(B)
AD[11]
D12
AD[9]
E13
AD[7]
F14
AD[0]
L13
WEN_I
C8
AD[31]
E3
AD[29]
D4
AD[27]
G3
AD[25]
B14
AD[23]
L3
AD[15]
C10
AD[13]
C12
LSI_D[15]
R16
AD[10]
D13
AD[8]
D14
AD[6]
G14
OEN_I
C7
WEN_O[3]
A8
WEN_O[2]
D5
AD[30]
E4
AD[28]
F3
AD[26]
H3
AD[24]
L4
AD[22]
M4
AD[14]
C11
AD[12]
D11
AD[3]
M13
AD[2]
K14
AD[1]
L14
OEN_O[3]
C3
WEN_O[1]
B8
WEN_O[0]
A9
AD[19]
N5
AD[18]
P4
AD[17]
P5
AD[16]
R3
AD[5]
J14
AD[4]
H14
READDIRB
C4
OEN_O[2]
C2
OEN_O[1]
C9
OEN_O[0]
B9
NCSLSI_IN[2]
F13
NCSLSI_IN[1]
C5
LSI_D[2]
H15
LSI_D[0]
G15
NCSROM_IN[2]
T4
NCSROM_IN[1]
J3
NCSROM_IN[0]
K3
NCSLSI_IN[0]
C6
AND3_1A
D3
AND3_1B
C15
AND3_1C
C13
AND3_1Y
B3
AND2_2Y
R4
AND2_2A
A7
AND2_2B
T2
AND2_1Y
M14
AND2_1A
E14
AND2_1B
C14
ROM_D[2]
E15
ROM_D[1]
F15
ROM_D[0]
F16
ROM_D[5]
D16
ROM_D[4]
D15
ROM_D[3]
E16
ROM_D[9]
B10
ROM_D[8]
A10
ROM_D[7]
B16
ROM_D[6]
A15
ROM_D[13]
A12
ROM_D[12]
B12
ROM_D[11]
B11
ROM_D[10]
A11
ROM_D[25]
P2
ROM_D[16]
T8
ROM_D[15]
B13
ROM_D[14]
A13
ROM_D[21]
P8
ROM_D[17]
R8
IC103B
EPM570F256C5N(C11G)
Version = 1.0
Version = 1.0
C894
1uF(1608:B)
1uF(1608:B)
C906
0.1uF(B)
0.1uF(B)
C916
0.1uF(B)
0.1uF(B)
C912
0.1uF(B)
0.1uF(B)
R300
2.2KJ
2.2KJ
C901
0.1uF(B)
0.1uF(B)
C909
0.1uF(B)
0.1uF(B)
R310
10KJ
10KJ
C895
10uF(2
10uF(2
CP316
C918
0.1uF(B)
0.1uF(B)
C897
0.1uF(B)
0.1uF(B)
C902
0.1uF(B)
0.1uF(B)
1
L
B
B
C903
0.1uF(B)
0.1uF(B)
C908
0.1uF(B)
0.1uF(B)
R302
2.2K
2.2K
C963
1uF(1608:B)
1uF(1608:B)
CP315
C900
0.1uF(B)
0.1uF(B)
KP8
KP8
AD[21]
N3
AD[20]
M3
LSI_D[14]
P15
LSI_D[13]
N16
LSI_D[6]
K15
LSI_D[12]
N15
LSI_D[11]
M16
LSI_D[5]
J16
LSI_D[1]
G16
LSI_D[10]
M15
LSI_D[9]
L16
LSI_D[4]
J15
LSI_D[8]
L15
LSI_D[7]
K16
LSI_D[3]
H16
AOUT[26]
L1
AOUT[25]
M2
AOUT[24]
M1
AOUT[23]
L2
AOUT[22]
K1
AOUT[21]
K2
AOUT[20]
J1
AOUT[19]
J2
AOUT[18]
H1
AOUT[17]
H2
AOUT[16]
G1
AOUT[15]
G2
AOUT[14]
F1
AOUT[13]
F2
AOUT[12]
E1
AOUT[11]
E2
AOUT[10]
D1
AOUT[9]
D2
ROM_D[29]
R5
AOUT[8]
B1
AOUT[7]
A2
ROM_BA[23]
P12
ROM_BA[7]
T15
ROM_BA[4]
R13
ROM_D[28]
T5
ROM_D[24]
R1
AOUT[6]
B4
AOUT[0]
B7
ROM_BA[22]
N12
ROM_BA[19]
R9
ROM_BA[16]
T10
ROM_BA[13]
T11
ROM_BA[10]
P13
AOUT[5]
A4
ROM_BA[6]
R14
ROM_D[31]
R6
ROM_D[27]
N2
ROM_D[23]
P7
ROM_D[20]
P9
ROM_D[18]
T7
AOUT[3]
A5
AOUT[1]
A6
ROM_BA[21]
P10
ROM_BA[18]
T9
ROM_BA[15]
T12
ROM_BA[12]
R11
ROM_BA[9]
N14
ROM_BA[5]
T13
ROM_D[30]
T6
ROM_D[26]
N1
ROM_D[22]
P6
ROM_D[19]
R7
AOUT[4]
B5
AOUT[2]
B6
ROM_BA[20]
P11
ROM_BA[17]
R10
ROM_BA[14]
R12
ROM_BA[11]
N13
ROM_BA[8]
P14
IC103A
EPM570F256C5N(C11G)
Version = 1.0
Version = 1.0
C1094
0.1uF(B)
0.1uF(B)
CP307
C893
10uF(2
10uF(2
C904
0.1uF(B)
0.1uF(B)
R301
2.2KJ
2.2KJ
ROM_BA[2]
M9
ROM_BA[3]
M8
CLK
J5
SCL
H12
NC
F7
NC
F10
NC
F11
NC
F12
NC
D6
NC
D7
NC
D8
NC
D9
NC
D10
NC
E5
NC
E6
NC
E7
NC
E8
NC
E9
NC
E10
NC
E11
NC
E12
NC
F4
NC
F5
NC
F6
NC
L5
NC
L7
NC
L10
NC
L11
NC
L12
NC
M6
NC
M7
NC
M10
NC
M11
NC
M12
NC
N6
NC
N7
NC
N8
NC
N9
NC
N10
NC
N11
NC
K6
NC
K11
NC
K12
NC
K13
NC
H4
NC
H13
NC
J4
NC
J13
NC
G4
NC
G5
NC
G6
NC
G11
NC
G12
NC
G13
NC
K5
NC
K4
TCK
P3
TDI
L6
TDO
M5
TMS
N4
VCCIO1
C1
VCCIO1
H6
VCCIO1
J6
VCCIO1
P1
VCCIO1
T3
VCCIO1
L8
VCCIO1
L9
VCCIO1
T14
GNDINT
H9
GNDINT
J10
GNDINT
J8
GNDINT
H7
GNDIO
B2
GNDIO
B15
GNDIO
G7
GNDIO
G8
GNDIO
G9
GNDIO
G10
GNDIO
K7
GNDIO
K8
GNDIO
K9
GNDIO
K10
GNDIO
R2
GNDIO
R15
GNDIO
T1
GNDIO
T16
GNDIO
A16
GNDIO
A1
SDA
J12
ALE
H5
VCCIO2
P16
VCCIO2
J11
VCCIO2
H11
VCCIO2
C16
VCCIO2
A14
VCCIO2
F9
VCCIO2
F8
VCCIO2
A3
VCCINT
H8
VCCINT
H10
VCCINT
J7
VCCINT
J9
IC103C
EPM570F256C5N(C11G)
Version = 1.0
Version = 1.0
1
L
B
B
5
5
4
4
3
3
D
C
B
A
MFPC PWB (Adress Fetch & Separate)
MX-7001N CIRCUIT DIAGRAM / 回路図 2 – 24
A5
A12
A13
A14
A15
A13
A14
A15
A21
A0
A1
A2
A3
A1
A2
A3
A6
A7
A7
A4
A23
A16
A17
A18
A17
A18
A20
A25
A24
A26
ROM_BA2
ROM_BA3
ROM_BA4
ROM_BA5
ROM_BA6
ROM_BA7
ROM_BA8
ROM_BA9
ROM_BA10
ROM_BA11
ROM_BA12
ROM_BA13
ROM_BA14
ROM_BA15
ROM_BA16
ROM_BA17
ROM_BA18
ROM_BA19
ROM_BA20
ROM_BA21
ROM_BA22
ROM_BA23
ROM_BA3
ROM_BA4
ROM_BA5
ROM_BA6
ROM_BA7
ROM_BA8
ROM_BA9
ROM_BA10
ROM_BA11
ROM_BA12
ROM_BA13
ROM_BA14
ROM_BA15
ROM_BA16
ROM_BA17
ROM_BA18
ROM_BA19
ROM_BA20
ROM_BA21
ROM_BA22
ROM_BA23
CP_WE0
ROM_BD11
ROM_BD10
ROM_BD9
ROM_BD8
ROM_BD15
ROM_BD14
ROM_BD19
ROM_BD23
ROM_BD22
ROM_BD20
ROM_BD17
ROM_BD16
ROM_BD21
ROM_BD18
ROM_BD25
ROM_BD24
ROM_BD27
ROM_BD26
LSI_D15
LSI_D12
LSI_D14
LSI_D11
LSI_D13
LSI_D10
LSI_D2
LSI_D4
LSI_D5
LSI_D5
LSI_D3
LSI_D7
LSI_D6
LSI_D1
LSI_D0
LSI_D9
LSI_D8
CP_OE0
CP_WE3
CP_WE2
CP_WE1
CP_WE2
CP_WE1
CP_OE3
CP_OE1
CP_OE2
A19
A22
A8
A10
A11
A9
ROM_BD2
ROM_BD3
ROM_BD1
ROM_BD0
ROM_BD3
ROM_BD1
ROM_BD0
ROM_BD4
ROM_BD5
ROM_BD5
ROM_BD7
ROM_BD6
ROM_BD12
ROM_BD13
ROM_BD30
ROM_BD28
ROM_BD29
ROM_BD29
ROM_BD31
+3.3V
+3.3V
ND
ND
+3.3V
DGND
DGND
A[26:0]
{21,27,37,42,43,48,51}
ROM_BA[23:2] {25,26,51}
LBUS_FAXFL_WE {25,26}
LBUS_SRAM_WE {27,51}
LBUS_SRAM_WE {27,51}
LBUS_SRAM_OE {27,43}
ROM_BD[31:0] {25,26}
LSI_D[15:0] {27,37,42,43,48}
GPO_nSOFTRST_IF {43}
IF_nWAIT
{21}
ICU_nWAIT {37,48}
IMG_nWAIT {42}
LBUS_ROM_WE {25}
LBUS_ROM_OE {25}
LBUS_FAXFL_OE {25,26}
LBUS_FAXFL_OE {25,26}
T_JTCK2 {20,51,53}
T_JTMS2 {20,51,53}
2_JTAG_TDI {53}
2_JTAG_TDO {53}
2_JTAG_TDO {53}
LBUS_ASIC_OE {21,37,42,48}
LBUS_ASIC_WE {21,37,42,48}
MAX_SCL {20}
MAX_SDA {20}
MAX_SDA {20}
nDMA_CS0_1 {21,37}
nDMA_CS0_2 {21,48}
CP317
R741
22J
CP318
R299
2.2KJ
2.2KJ
CP320
R744
22J
CP319
R314
X_10KJ
X_10KJ
R323
X_10KJ
X_10KJ
R743
22J
R742
22J
R740
22J
895
0uF(2012)
CP321
1
2
L58
BLM18PG121SN1(1608)
BLM18PG121SN1(1608)
R302
2.2KJ
2.2KJ
R739
22J
CP322
R745
22J
R746
22J
893
0uF(2012)
1
2
L57
BLM18PG121SN1(1608)
BLM18PG121SN1(1608)
3
3
2
2
1
1
D
C
B
A
16/52 (18)
MX-7001N CIRCUIT DIAGRAM / 回路図 2 – 25
DGND
3V3SIN
DGND
+3.3V
DGND
+3.3V
3V3SIN
DGND
DGND
DGND
DGND
DGND
+3.3V
+3.3V
DGND
DGND
ICU_SCCLK
{31,41,49}
GPO_nSOFTRST_ICU
{38,43,49}
nANTI_ENB
{31}
nSSYNC_SIN
{31}
nHSYNC_SIN
{31}
LINGT_SIN
{31}
DOTGT_SIN
{31}
SIN_JTAG_TDI
{53}
TEST_JTMS3
{38,40,49,53}
SIN_ENABLE
{40}
For 9Pin
For 18Pin
For 29Pin
For 41Pin
R773
X_100J
R749
3
1
2
L60
BLM18PG121SN1(1608)
BLM18PG121SN1(1608)
C927
220pF
220pF
R748
3
R609
2.2KJ
2.2KJ
C931
0.1uF(B)
R750
3
R752
10KJ
10KJ
R
7
4
7
33J
C921
470pF
470pF
CP327
C929
0.1uF(B)
R615
10KJ
10KJ
C924
1uF(1608:B)
C926
10pF(CH)
10pF(CH)
C923
10uF(2012)
TDI
1
linegt_i
2
RSV
3
GND
4
dotgt_i
5
RSV
6
TMS
7
RSV
8
VCCIO
9
esdenb_i
10
GND
11
RSV
12
RSV
13
RSV
14
RSV
15
GND
1
6
VCCINT
1
7
ssyncB2_out
18
h
syncB2_out
1
9
line
g
t2_out
2
0
dot
g
t2_out
21
h
m
as
k_si
g
22
dualout_enb
23
GND
24
RSV
25
TCK
26
ssyncB_out
27
hsyncB_out
28
VCCIO
29
GND
30
RSV
31
TDO
32
linegt_out
33
RSV
34
dot
g
t_out
35
GND
3
6
pcl
k
3
7
GND
+
38
rstB
3
9
GND
+
4
0
VCCINT
41
ssyncB_i
42
RSV
43
h
syncB_i
44
IC31
EPM3064ATC44-10N(RSS1)
EPM3064ATC44-10N(RSS1)
C920
470pF
R753
10KJ
10KJ
C925
470pF
470pF
CP325
C922
100pF(CH)
100pF(CH)
C930
0.1uF(B)
R608
2.2KJ
2.2KJ
C928
0.1uF(B)
5
5
4
4
3
3
D
C
B
A
MFPC PWB (SCAN IN CPLD)
Click on the first or last page to see other MX-6201N / MX-7001N (serv.man45) service manuals if exist.