DOWNLOAD Sharp MX-6201N / MX-7001N (serv.man45) Service Manual ↓ Size: 18.45 MB | Pages: 127 in PDF or view online for FREE

Model
MX-6201N MX-7001N (serv.man45)
Pages
127
Size
18.45 MB
Type
PDF
Document
Service Manual
Brand
Device
Copying Equipment / MX6201 MX7001- Circuit Diagram
File
mx-6201n-mx-7001n-sm45.pdf
Date
PREV: Sharp MX-6201N / MX-7001N (serv.man44) Service Manual

Sharp MX-6201N / MX-7001N (serv.man45) Service Manual ▷ View online

MX-7001N  CIRCUIT DIAGRAM / 回路図  2 – 26
DGND
DGND
DGND
DGND
DGND
LINGT_SCN {41,49}
nSSYNC_SCN
{41,49}
nHSYNC_SCN
{41,49}
DOTGT_SCN {41,49}
TEST_JTCK3 {38,40,49,53}
SIN_JTAG_TDO {53}
33J
33J
33J
C1097
X_470pF
R616
2.2KJ
5
J
C1096
X_100pF
C1095
X_2200pF
C1098
X_100pF
3
3
2
2
1
1
D
C
B
A
17/52 (19)
MX-7001N  CIRCUIT DIAGRAM / 回路図  2 – 27
HCLK_SEL
CLKSEL
USB_D_DP
USB_D_DM
VBUSPAD
USB_H_DP
USB_H_DM
DGND
DGND
DGN
DGND
+3.3V
DGND
D
DGND
DGND
DGND
DGND
+3.3V
DGND
+3.3V
DGND
DGND
+3.3V
+3.3V
+3.3V
DGND
DGND
DGND
DGND
DGND
DGND
DGND
+5V_IN
+5V_IN
DGND
DGND
DGND
+3.3V
+3.3V
+3.3V
DGND
DGND
DGND
+1.8V
DGND
CPU_MODECLK_3.3V
{6}
IF_SYSCLK
{5}
GPIO_USBHPOWERO
GPI_nUSBOVERLOAD
GPO_USBHCLK_ENB
{43}
{5}
LBU
{13}
LBU
{13}
LBU
{13}
LBU
{13}
RSVIN_IMG4
{40}
RSVIN_IMG3
{40}
RSVIN_IO7
{43}
RSVIN_IO6
{43}
RSVIN_IO5
{43}
RSVIN_IF3
{22}
RSVIN_IF2
{22}
RSVIN_IF1
{22}
nIFASIC_RST
{18}
FAX1D
{54}
FAX1CS
{54}
FAX1D
{54}
FAX1CS
{54}
(USB B TYPE CONNECTOR)
H:PLL
L:External
H:100M
L:50M
SEL0
SEL1
(USB A TYPE CONNECTOR)
R341
4.7KJ
R322
6.81KF
VBUS
1
D-
2
D+
3
GND
4
FG
FG1
FG
FG2
CN8
UBR23-4K2200
L27
BLM18PG121SN1(1608)
C399
0.01uF
CP347
X_1KJ
R614
X_1KJ
R716
R312
10KJ
VBUS
1
D-
2
D+
3
GND
4
FG
FG1
FG
FG2
CN9
UAR27-4K5J00
8
7
2
6
3
5
4
1
BC92
0.1uFx4(B)
R305
X_1KJ
L51
BLM18PG121SN1(1608)
R691
47KJ
R326
10KJ
R477
1KJ
7
+
-
C398
47uF/16V(MVL/F60)
+
R334
15KJ
CP355
GP8
CONT
1
GND
2
OUT
3
VDD
4
X9
SG8002JF(48.0000MHz/ST MODE)
A
K
D5
1SS355
L24
BLM15AG121SN1(1005)
FA-365(1
X_1KJ
R612
CP349
R313
10KJ
R321
10J
CP328
CP351
CP344
A
K1
K2
D4
HZM6.2Z4MWA
X_1KJ
R718
X_1KJ
R718
BP53
CP353
CP356
1
1
2
2
3
3
4
4
L26
ACM2012-900-2P
CP331
R307
X_0J
CP329
R324
2.2KJ
CP368
X_1KJ
R714
R332 27F
C739
0.1uF(B)
CP330
R562
47KJ
C391
10uF(2012)
C397
10uF(2012)
CP357
R304
10KJ
R451
nanoSMDC110F(3216)
GP18
R325 X_10J
A
K1
K2
D7
HZM6.2Z4MWA
L25
BLM15AG121SN1(1005)
CP332
CP367
R333
15KJ
X_1KJ
R715
X_1KJ
R715
CP360
L29
BLM18PG121SN1(1608)
R342
X_2.2KJ
CP362
CP354
1
1
2
2
3
3
4
4
L28
ACM2012-900-2P
X_1KJ
R613
CP358
R308
X_0J
R373
2.2KJ
3
A
K
D6
1SS355
R335 X_10J
CP337
X_1KJ
R717
R331 27F
CP359
R303
10KJ
CTRLA
1
FLAGA
2
FLAGB
3
CTRLB
4
OUTB
5
GND
6
VDD
7
OUTA
8
IC53
BD6512F-E2
C390
0.01uF
5
5
4
4
3
3
D
C
B
A
MFPC PWB (IF ASIC : BTMC, I2C, RTC, SYSTEM, USB, UART)
MX-7001N  CIRCUIT DIAGRAM / 回路図  2 – 28
RTC_DATA
I2C_SDA
I2C_CLK
USB_H_DM
USB_H_DP
VBUSPAD
USB_D_DP
USB_D_DM
EEPROMWP
I2C_SDA
I2C_CLK
I2C_SDA
I2C_CLK
EEPROMWP
RTC_DATA
DGND
DGND
DGND
+3.3V
DGND
DGND
DGND
+3.3V
+3.3V
+3.3V
+1.8V
DGND
+3.3V
+3.3V
DGND
+1.8V_IFCORE
+1.8V_IFCORE
DGND
DGND
+3.3V
DGND
DGND
DGND
MODEDAT_3.3V {7}
TEST_JTRST1 {7,13,53}
TEST_JTMS2 {18,51,53}
RTC_CE
{18}
RTC_CLK
{27}
RTC_DATA {27}
WERON
{43}
OAD
{43}
CTS3
{32}
CTS4
{32}
RXD3
{32}
RXD4
{32}
RTS3
{32}
RTS4
{32}
TXD3
{32}
TXD4
{32}
LBUS_DMA_REQ0 {13}
LBUS_DMA_REQ1 {13}
IF_UART_CLK
{5}
LBUS_DMA_ACK0
LBUS_DMA_ACK1
LBUS_DMA_TC0
LBUS_DMA_TC1
RS232C_TXD {28}
RS232C_RTS {28}
RS232C_RXD
{28}
RS232C_CTS
{28}
FAX2D_RXD
{29}
FAX2CS_RXD
{29}
FAX2D_CTS
{29}
FAX2CS_CTS
{29}
FAX2D_TXD {29}
FAX2CS_TXD {29}
FAX2D_RTS {29}
FAX2CS_RTS {29}
CTS_EF
{30}
RTS_EF
{30}
TXD_EF
{30}
RXD_EF
{30}
PWM
{31}
RESET_GOOD {6}
V33_RTN_JIG1 {6}
IF_JTAG_TDO {53}
TEST_JTCK2 {18,51,53}
IF_JTAG_TDI {53}
GPO_I2CBTMC_WP {43}
MAX_SCL {18}
MAX_SDA {18}
AX1D_RXD
X1CS_RXD
FAX1D_TXD {54}
FAX1CS_TXD {54}
AX1D_CTS
AX1CS_CTS
FAX1D_RTS {54}
FAX1CS_RTS {54}
BLM15AG121SN1(1005)
C781
0.1uF(B)
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
CN10
X_BM08B-SRSS-TB
R344
X_33J
R343
X_33J
CP372
2
C822
0.01uF
CP363
L56
BLM15AG121SN1(1005)
L53
BLM15AG121SN1(1005)
CP343
C932
18pF(CH)
J
A0
1
A1
2
A2
3
VSS
4
SDA
5
SCL
6
WP
7
VCC
8
IC52
X_CAT24WC02(SOP8)
C820
1000pF
L52
BLM15AG121SN1(1005)
CP340
GP19
C41
0.1uF(B)
C964
1uF(1608:B)
C934
18pF(CH)
R329
33J
R329
33J
X13
-365(12.000MHz/12pF/50ppm)
R316
4.7KJ
C782
0.1uF(B)
R339
2.2KJ
CP346
GP9
C389
0.01uF
R340
2.2KJ
C827
0.1uF(B)
CP348
CP371
1
KP27
MODECLK
C22
MODESEL[0]
B24
MODESEL[1]
A24
MODESEL[2](PD)
B23
I2C_SDA
B22
LSI_IDDT
B05
LSI_SCAN_ENABLE
A05
LSI_TCK(PD)
C04
LSI_TDI(PU)
B04
LSI_TMS(PU)
A04
LSI_TN(PU)
D07
LSI_TRSTN(PU)
C06
RTC_DATA/I2C_SDA2(OD)
W26
CLKSEL
C25
SYSCLK
B26
XRESET
D24
TEST_MODE
C05
USB_H_CLK
G03
USB_H_DM
F01
USB_H_DP
E01
USB_D_CLK
M04
USB_D_DM
J01
USB_D_DP
K01
USB_REXT
J04
VBUSPAD
H02
CTS[1]
AD02
CTS[2]
AE01
CTS[3]
AC03
CTS[4]
AF02
CTS[5]
AE03
CTS[6]
AD04
CTS[7]
AF03
CTS[8]
AE04
RXD[1]
AD07
RXD[2]
AE07
RXD[3]
AF07
RXD[4]
AC08
RXD[5]
AD08
RXD[6]
AE08
RXD[7]
AF08
RXD[8]
AC09
UART_CLK0
AC02
UART_CLK1
AD01
XLBUS_DMA_ACK[0]
AE11
XLBUS_DMA_ACK[1]
AF11
XLBUS_DMA_TC[0]
AC01
XLBUS_DMA_TC[1]
AB03
MODEIN
A23
SCL
A22
LSI_PROCMON
A03
LSI_TDO
B06
PWM_OUT
B03
RTC_CE/I2C_SCL2
W24
RTC_CLK
W25
RTC_IO
V23
RTS[1]
AF04
RTS[2]
AD05
RTS[3]
AE05
RTS[4]
AF05
RTS[5]
AD06
RTS[6]
AE06
RTS[7]
AF06
RTS[8]
AC07
TXD[1]
AD09
TXD[2]
AE09
TXD[3]
AF09
TXD[4]
AD10
TXD[5]
AE10
TXD[6]
AF10
TXD[7]
AD11
TXD[8]
AC11
XLBUS_DMA_REQ[0]
AD12
XLBUS_DMA_REQ[1]
AC12
USB11_AVSS
F03
USB11_AVDD
G04
HCLK_SEL
Y26
VDDA
L03
VDDABIAS33
J03
VDDPLL18
M03
VDDSQUELCH18
L02
VDDXOSC18
N03
VSSXOSC
M02
VSSSQUELCH
L04
VSSPLL
L01
VSSABIAS
H01
VSSA
J02
XOUTPAD
M01
SYS_PLLVDD
A25
SYS_PLLVSS
C23
BTMC
I2C
LSI
PWM
RTC
SYSTEM
TEST PIN
USB1.1 HOST
USB2.0 DEVICE
UART
IC51A
IF ASIC
IF ASIC
IF ASIC 1/5
BTMC
I2C
LSI
RTC
IC51A
CP361
CP366
CP364
CP338
CP352
R338
X_2.2KJ
RJ3
X_0J
R756
33J
R330
33J
R330
33J
C821
10uF(2012)
C385
470pF
CP335
C761
0.1uF(B)
C42
0.1uF(B)
KP28
R755
33J
CP350
CP350
C823
0.1uF(B)
CP342
CP345
C40
0.01uF
C762
0.1uF(B)
C396
X_0.1uF(B)
CP339
R754
0J
0J
CP370
0
R360
X_33J
3
3
2
2
1
1
D
C
B
A
18/52 (20)
MX-7001N  CIRCUIT DIAGRAM / 回路図  2 – 29
A1
A2
A3
A4
A
7
A8
A5
A
6
A11
A
9
A1
0
A2
0
A21
A24
A25
A2
6
AD
0
AD1
AD2
AD3
AD4
AD5
AD
6
AD
7
AD8
AD
9
AD1
0
AD11
AD12
AD13
AD14
AD15
A2
0
A21
A25
A2
6
A24
+
3
.3V
A
[2
6
:0]
{18
,2
7,
3
7,
42
,43
,48
,51
}
AD
[31:
0]
{13
,18
,25
}
LBUS_DMA_CS
0
{13
}
LBUS_DMA_CS1
{13
}
IF_INT1
{7}
IF_nWAIT
{18
}
LBUS_GEN_CS3
{13
,18
}
nGEN_CS3_
0{
25
}
nDMA_CS
0
_1
{18
,3
7}
nGEN_CS3_1
{51
}
nGEN_CS3_2
{51
}
nGEN_CS3_4
{25
}
LBUS_ASIC_OE
{18
,3
7,
42
,48
}
LBUS_ASIC_WE
{18
,3
7,
42
,48
}
nGEN_CS3_
6{
25
}
nDMA_CS
0
_2
{18
,48
}
R52
0
4
7
KJ
R381
X_33J
R3
6
13
3
J
CP3
7
3
CP1
9
4
R34
6
33J
CP3
7
4
R543
4
7
KJ
CP3
7
8
CP1
9
2
R514
X_33J
LBUS_ADDR
[1
]
R
0
1
LBUS_ADDR
[2
]
R
0
2
LBUS_ADDR
[3
]
R
0
4
LBUS_ADDR
[4
]
R
0
3
LBUS_ADDR
[5
]
T
0
1
LBUS_ADDR
[6]
T
0
2
LBUS_ADDR
[7]
T
0
4
LBUS_ADDR
[8
]
T
0
3
LBUS_ADDR
[9]
U
0
1
LBUS_ADDR
[1
0]
U
0
2
LBUS_ADDR
[11
]
U
0
3
LBUS_DATA
[0]
V
0
1
LBUS_DATA
[1
]
V
0
2
LBUS_DATA
[2
]
V
0
4
LBUS_DATA
[3
]
V
0
3
LBUS_DATA
[4
]
W
0
1
LBUS_DATA
[5
]
W
0
2
LBUS_DATA
[6]
W
0
4
LBUS_DATA
[7]
W
0
3
LBUS_DATA
[8
]
Y
0
1
LBUS_DATA
[9]
Y
0
2
LBUS_DATA
[1
0]
Y
0
4
LBUS_DATA
[11
]
Y
0
3
LBUS_DATA
[12
]
AA
0
1
LBUS_DATA
[13
]
AA
0
2
LBUS_DATA
[14
]
AA
0
4
LBUS_DATA
[15
]
AA
0
3
XLBUS_DMA_CS
0
_IN
P
0
2
XLBUS_DMA_CS1_IN
P
0
3
XLBUS_OE
N
0
1
XLBUS_WE
P
0
1
LBUS_ADDR2
0
D
0
2
LBUS_ADDR21
C
0
1
LBUS_ADDR24
D
0
3
LBUS_ADDR25
C
0
2
LBUS_ADDR2
6
B
0
1
XLBUS_ROM_CS_IN
D
0
1
XLBUS_INTR
AB
0
2
XLBUS_WAIT
AB
0
1
XLBUS_D
0
CS1_OUT
E2
6
XLBUS_D
0
CS2_OUT
E25
XLBUS_D
0
CS3_OUT
D2
6
XLBUS_D1CS1_OUT
E24
XLBUS_D1CS2_OUT
D25
XLBUS_D1CS3_OUT
C2
6
XLBUS_RCS
0
_OUT
G25
XLBUS_RCS1_OUT
G23
XLBUS_RCS2_OUT
G24
XLBUS_RCS3_OUT
F2
6
XLBUS_RCS4_OUT
F25
XLBUS_RCS5_OUT
F23
XLBUS_RCS
6
_OUT
F24
CPU
I/F
CS
DECORDER
IC51B
IF
ASIC
<
Im
ple
m
entation
P
at
h
>
IF
AS
IC
2/5
CP2
00
CP3
77
8
1
7
2
6
3
5
4
BR228
3
3J
x4
R3
69
33J
R345
33J
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
MFPC
PWB
(IF
AS
IC
:Address
D
ec
oder
)
19
/52
(21)
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