Sharp ER-A771 (serv.man3) Service Manual ▷ View online
ER-A771VS
CIRCUIT DESCRIPTION
7 – 7
3) Pin description
Pin
No.
Name
I/O
Description
1
RF
ON
NU
2
JF
ON
NU
3
PCUTZ
ON
NU
4
FCUTZ
ON
NU
5
VFZ
ON
NU
6
STAMPZ
ON
NU
7
VIOZ
O
NU
8
VMEMZ
O
VRAM DECODER
9
SWAPZ
O
NU
10
RESZ
O6M
RESET
11
FROS1Z
O
FLASH ROM DECODER
12
FROMLZ
O
NU
13
POFF
IC
POWER OFF SIGNAL INPUT
14
INT1Z
ICU
INTERRUPT SIGNAL INPUT
15
HTS1
O
SERIAL OUT (CKDC INTERFACE)
16
SCK1
O
SERIAL CLOCK (CKDC INTERFACE)
17
STH1
IS
SERIAL IN (CKDC INTERFACE)
18
MCRINT
O
MCR INTERRUPT OUT
19
VWAITZ
IU
VGA WAIT INPUT
20
VDD
–
21
GND
–
22
MCRINTZ
O
MCR INTERRUPT OUT
23
VRESC
ON
TURNS ACTIVE WHEN
RESET&POWER DOWN IS MET
RESET&POWER DOWN IS MET
24
SLTMG
ICS
GND
25
SLRST
ICS
GND
26
ASZ
I
ADDRESS STROBE
27
RDZ
I
READ STROBE
28
WRZ
I
WRITE STROBE
29
PHAI
IS
SYSTEM CLOCK (9.83MHz)
30
RASPN1
O
SRAM DECODE1
31
RASPN1E
O
SRAM DECODE1 (EVEN)
32
RASPN12
Z
O
SRAM DECODE1 OR 2
33
GND
–
34
RASPAN2
O
SRAM DECODE2
35
RASPN2E
O
SRAM DECODE2 (EVEN)
36
VGALZ
O
NU
37
SDT1Z
O
NU
38
ID0
IO
DATA BUS
39
ID1
IO
DATA BUS
40
ID2
IO
DATA BUS
41
ID3
IO
DATA BUS
42
GND
–
43
ID4
IO
DATA BUS
44 ID5
IO
DATA
BUS
45
ID6
IO
DATA BUS
46
ID7
IO
DATA BUS
47
SSPRQZ
O
SSP REQUEST FOR CPU
48
RESETZ
ICS
MPCA RESET
49
INT2Z
ICU
INTERRUPT INPUT (/TPRRDY)
50
INT3Z
ICU
INTERRUPT INPUT (/TPTRDY)
51
RXDI
O
SERIAL OUT FOR CPU
52
TXDI
IS
SERIAL IN FROM CPU
53
SCKI
IU
SERIAL CLOCK FROM CPU
54
IRQ0Z
O
INTERRUPT SIGNAL FOR CPU
55
A0
I
ADDRESS BUS
56
A1
I
ADDRESS BUS
57
A2
I
ADDRESS BUS
58
A3
I
ADDRESS BUS
59
A4
I
ADDRESS BUS
60
A5
I
ADDRESS BUS
61
GND
–
62
VDD
–
63
A6
I
ADDRESS BUS
64
A7
I
ADDRESS BUS
65
A8
I
ADDRESS BUS
66
A9
I
ADDRESS BUS
67
A10
I
ADDRESS BUS
68
A11
I
ADDRESS BUS
69
A12
I
ADDRESS BUS
70
A13
I
ADDRESS BUS
71
A14
I
ADDRESS BUS
72
A15
I
ADDRESS BUS
73
A16
I
ADDRESS BUS
74
A17
I
ADDRESS BUS
75
A18
I
ADDRESS BUS
76
A19
I
ADDRESS BUS
77
A20
I
ADDRESS BUS
78
A21
I
ADDRESS BUS
79
A22
I
ADDRESS BUS
80
LCDCZ
O
NU
81
A23
I
ADDRESS BUS
82
TRGI
IS
NU
83
PTMG
O
NU
84
PRST
O
NU
85
INT4Z
ICU
NU
86
IPLONZ
IU
IPL SIGNAL FROM OPTION
CONNECTER
CONNECTER
87
MD1
ICU
TEST PIN
88
MD0
ICU
TEST PIN
89
TESTZ
ICU
TEST PIN
90
TPRRDYZ
O
NU
91
TPTRDYZ
O
NU
92
TPRDY
O
NU
93
RCVRDY1
IU
NU
94
RCVRDY2
IU
NU
95
RCO
O
NU
96
IRTX
O
NU
97
UASCK
O
CLOCK
98
UARXZ
O
DATA FOR CPU
99
UATXZ
IU
DATA FROM CPU
100
VDD
–
101
GND
–
102
IRRXZ
ICS
NU
Pin
No.
Name
I/O
Description
ER-A771VS
CIRCUIT DESCRIPTION
7 – 8
103
RCRXZ
ICS
NU
104
DAX1
OSCI
NU
105
DAX2
OSCO
NU
106
IPLON
O
IPL ON SIGNAL
107
MCR2Z
O
NU
108
WAITZ
O
WAIT FOR CPU
109
EXWAITZ
IU
EXTERNAL WAIT INPUT SIGNAL
110
RA18
O
NU
111
RA17
O
NU
112
GND
–
113
RA16
O
NU
114
RA15
O
NU
115
RDOZ
O8M
EXPANSION RD
116
WROZ
O8M
EXPANSION WR
117
EXINT3Z
ICS
EXPANSION INTERRUPT SIGNAL
118
EXINT2Z
ICS
EXPANSION INTERRUPT SIGNAL
119
EXINT1Z
ICS
EXPANSION INTERRUPT SIGNAL
120
EXINT0Z
ICS
EXPANSION INTERRUPT SIGNAL
121
OPTCSZ
O
BASE DECODE SIGNAL FOR
EXPANSION SLOT
EXPANSION SLOT
122
ROS1Z
O
NU
123
ROS2Z
O
NU
124
RAS2
O
NU
125
TPTXD
O
NU
126
TPRXD
ICS
NU
127
TPCKI
ICS
NU
128
DT4
ON
NU
129
DT3
ON
NU
130
DT2
ON
NU
131
DT1
ON
NU
132
GND
–
133
DT7
ON
NU
134
DT6
ON
NU
135
DT5
ON
NU
136
RJMTS
ON
NU
137
RJMTD
ON
NU
138
DT9
ON
NU
139
DT8
ON
NU
140
SYNC
IU
NU
141
ASKRXZ
ICS
NU
142
VDD
–
143
GND
–
144
RDD1
ICS
SERIAL IN FROM MCR TRACK1
145
RAS3
O
NU
146
CLS1
ICS
CARD SENSE ON MCR TRACK1
147
SLMTD
ON
NU
148
SLMTS
ON
NU
149
RCP1
ICS
CLOCK PULSE FROM MCR TRACK1
150
HTS2
O
SERIAL OUT
(OPTION CKDC INTERFACE)
(OPTION CKDC INTERFACE)
NU
151
SCK2
O
SERIAL CLOCK
(OPTION CKDC INTERFACE)
(OPTION CKDC INTERFACE)
NU
152
STH2
IS
SERIAL IN
(OPTION CKDC INTERFACE)
(OPTION CKDC INTERFACE)
NU
Pin
No.
Name
I/O
Description
153
TEST0
I
TEST PIN
154
TEST1
I
TEST PIN
155
TEST2
I
TEST PIN
156
RDD2
ICS
SERIAL IN FROM MCR TRACK1
157
CLS2
ICS
CARD SENSE ON MCR TRACK1
158
LCDWT
IU
NU
159
RCP2
ICS
CLOCK PULSE FROM MCR TRACK1
160
RASP
O
NU
I TTL
input
IS
TTL Schmidt input
IU
TTL pull up input
IC
CMOS input
ICS
CMOS Schmidt input
ICU
CMOS pull up input
IO
TTL I/O
O
Output 4mA
O8M
Output 8mA
ON
Nch open drain output
OSIC
Oscillation circuit input
OSCI
Oscillation circuit output
Pin
No.
Name
I/O
Description
ER-A771VS
CIRCUIT DESCRIPTION
7 – 9
2-3. OPC2
1) Pin configuration
1
SL00
2
SL01
3
SL02
4
SL10
5
SL11
6
SL12
7
SL20
8
SL21
9
SL22
10
SL30
11
SL31
12
13
13
/CD0
14
BRK0
15
TRNEMP0
16
RCVRDY0
17
TRNRDY0
18
/CTS0
19
RCVDT0
20
VCC
21
GND
22
/CI0
23
/RTS0
24
/CS0
25
/CD1
26
BRK1
27
TRNEMP1
28
RCVRDY1
29
TRNRDY1
30
/CTS1
31
32
33
32
33
/RTS1
34
35
36
35
36
TRNEMP2
37
RCVRDY2
38
TRNRDY2
39
CTS2Z
40
RCVDT2
160
MCLK
159
158
RSLCT1
157
RSLCT0
156
/RIN
155
/WIN
154
SYCBKD
153
TRNEMPD
152
RCVRDYD
151
TRNRDYD
150
/DSRD
149
/CTSD
148
RCVDTD
147
/RTSD
146
/DTRD
145
TRNDTD
144
/CSD
143
GND
142
VC
C
141
SYCBKC
140
TRNEMPC
139
RCVRDYC
138
TRNRDYC
137
/DSRC
136
/CTSC
135
RCVDTC
134
/RTSC
133
/DTRC
132
TRNDTC
131
/CSC
130
GND
129
SYCBKB
128
TRNEMPB
127
RCVRDYB
126
TRNRDYB
125
/DSRB
124
/CTSB
123
RCVDTB
122
/RTSB
121
/DTRB
41
/CI2
42
/CS2
43
/CD3
44
BR
K3
45
TRNEMP3
46
RCVRDY3
47
TRNRDY3
48
/CTS3
49
RCVDT3
50
/CI3
51
/CS3
52
D0
53
D1
54
D2
55
D3
56
GND
57
D4
58
D5
59
D6
60
D7
61
GND
62
VC
C
63
X1
64
X2
65
XOUT
66
TRCK
67
AB0
68
AB1
69
US1CH
70
PX
71
/POF
72
/RSRQ
73
/TRV
74
RXDATA0
75
TXE
76
/TRRQ
77
/TRQ1
78
/TRQ2
79
A0
80
A1
120
TRNDTB
119
/CSB
118
GND
117
SYCBKA
116
TRNEMPA
115
RCVRDYA
114
TRNRDYA
113
/DSRA
112
/CTSA
111
RCVDTA
110
/RTSA
109
/DTRA
108
TRNDTA
107
/CSA
106
UTST
105
DBTST
104
RCVCLK
103
TRNCLK
102
RES
101
GND
100
VCC
99
/W
98
/R
97
DB7
96
DB6
95
DB5
94
DB4
93
92
91
90
92
91
90
DB1
89
DB0
88
/RES
87
/WR
86
/RD
85
/OPTCS
84
A5
83
A4
82
A3
81
A2
GND
RST
SL32
RCVDT1
/CI1
/CS1
/CD2
DB2
DB3
ER-A771VS
CIRCUIT DESCRIPTION
7 – 10
2) Block diagram
3) Pin descriptions
USART
A
USART
B
USART
C
USART
D
USART
OPC1
DATA BUS
OPC1~USART
OPC2
Common input
BAUD RATE GENERATOR
BAUD RATE GENERATOR
Pin
NO.
Name
ER-A771
I/O
Description
1
SL00
VCC
ISU
RS-232/UNIT0
channel select
channel select
2
SL01
GND
ISU
3
SL02
GND
ISU
4
SL10
GND
ISU
RS-232/UNIT1
channel select
channel select
5
SL11
VCC
ISU
6
SL12
GND
ISU
7
SL20
GND
ISU
RS-232/UNIT2
channel select
channel select
8
SL21
GND
ISU
9
SL22
GND
ISU
10
SL30
GND
ISU
RS-232/UNIT3
channel select
channel select
11
SL31
GND
ISU
12
SL32
GND
ISU
13
/CD0
/DCD1
IS
RS-232 control signal
/CD input
/CD input
14
BRK0
BRK1
IS
RS-232 break signal
15
TRNEMP0
TRENMP1
IS
RS-232 transmission
buffer empty signal
buffer empty signal
16
RCVRDY0
RCVRDY1
IS
RS-232 data
reception enable signal
reception enable signal
17
TRNRDY0
TRNRDY1
IS
RS-232 transmission
enable signal
enable signal
18
/CTS0
/CTS1
IS
RS-232 clear to send signal
19
RCVDT0
RCVDT1
IS
RS-232 reception data
signal
signal
20
VCC
VCC
+5V
21
GND
GND
GND
22
/CI0
/CI1
IS
RS-232 control signal
/CI input
/CI input
23
/RTS0
/RTS1
O
RS-232 request to send
signal
signal
24
/CS0
/CS1
O
RS-232 chip select signal
25
/CD1
/DCD2
IS
RS-232 control signal
/CD input
/CD input
26
BRK1
BRK2
IS
RS-232 break signal
27
TRNEMP1
TRENMP2
IS
RS-232 transmission
buffer empty signal
buffer empty signal
28
RCVRDY1
RCVRDY2
IS
RS-232 data reception
enable signal
enable signal
29
TRNRDY1
TRNRDY2
IS
RS-232 transmission enable
signal
signal
30
/CTS1
/CTS2
IS
RS-232 clear to send signal
31
RCVDT1
/CLSIN
IS
RS-232 reception data
signal
signal
32
/CI1
VCC
IS
RS-232 control signal /CI
input
input
33
/RTS1
NC
O
RS-232 request to send
signal
signal
34
/CS1
/CS2
O
RS-232 chip select signal
35
/CD2
VCC
IS
+5V
36
TRNEMP2
GND
IS
RS-232 transmission buffer
empty signal
empty signal
37
RCVRDY2
GND
IS
RS-232 data reception
enable signal
enable signal
38
TRNRDY2
GND
IS
RS-232 transmission enable
signal
signal
Pin
NO.
Name
ER-A771
I/O
Description
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