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Model
ER-A771 (serv.man3)
Pages
77
Size
2.35 MB
Type
PDF
Document
Service Manual
Brand
Device
EPOS / Service Manual
File
er-a771-sm3.pdf
Date
PREV: Sharp ER-A771 (serv.man2) Service Manual

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ER-A771VS
CIRCUIT DESCRIPTION
7 – 3
2) Block diagram 
P47
P46
P45
P44
P43
P42
P41/TMCI
P40
P37
P36
P35
P34
P33
BREQ
BACK
WAIT
P27/A23
P26/A22
P25/A21
P24/A20
P23/A19
P22/A18
P21/A17
P20/A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AVCC
AVSS
MD2
MD1
MD0
RES
STBY
NMI
AS
RD
HWR
LWR
RFSH
EXTAL
XTAL
E
P17
P16
P15
P14
P13
P12
P11
P10
D15
D14
D13
D12
D11
D10
D9
D8
P57
P56
P55
P54
P53
P52
P51
P50
P67
P66
P65
P64
P63
P62
P61
P60
P73
P72
P71
P70
TXD2
RXD2
TXD1
RXD1
SCK2/IRQ3
SCK1/IRQ2
IRQ1
IRQ0
H8/500 CPU
DTC
Serial
communication
interface x 2ch
8bit timer
16bit free running
timer x 2ch
Refresh controller
Wait state
controller
A/D converter
Interruption controller
Clock
oscillator
Watch
dog timer
Data bus
Port 1
Data bus (Lower)
Data bus (Upper)
Address bus
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Address bus
X
ER-A771VS
CIRCUIT DESCRIPTION
7 – 4
3) Pin description
Pin 
No.
Symbol
Signal 
name
In/
Out
Function
1
/RES
/RESET
In
Reset signal 
2
NMI
NMI
In
Non-maskable interrupt input for SSP
interrupt input. 
3
VSS
GND
In
GND
4
D0
D0
I/O Data bus 
5
D1
D1
I/O Data bus 
6
D2
D2
I/O Data bus 
7
D3
D3
I/O Data bus 
8
D4
D4
I/O Data bus 
9
D5
D5
I/O Data bus 
10
D6
D6
I/O Data bus 
11
D7
D7
I/O Data bus 
12
D8
D8
I/O Data bus 
13
D9
D9
I/O Data bus 
14
D10
D10
I/O Data bus 
15
D11
D11
I/O Data bus 
16
D12
D12
I/O Data bus 
17
D13
D13
I/O Data bus 
18
D14
D14
I/O Data bus 
19
D15
D15
I/O Data bus 
20
VSS
GND
In
GND
21
A0
A0
Out Address bus 
22
A1
A1
Out Address bus 
23
A2
A2
Out Address bus 
24
A3
A3
Out Address bus 
25
A4
A4
Out Address bus 
26
A5
A5
Out Address bus 
27
A6
A6
Out Address bus 
28
A7
A7
Out Address bus 
29
A8
A8
Out Address bus 
30
A9
A9
Out Address bus 
31
A10
A10
Out Address bus 
32
A11
A11
Out Address bus 
33
A12
A12
Out Address bus 
34
A13
A13
Out Address bus 
35
A14
A14
Out Address bus 
36
A15
A15
Out Address bus 
37
VSS
GND
In
GND
38
A16
A16
Out Address bus 
39
A17
A17
Out Address bus 
40
A18
A18
Out Address bus 
41
A19
A19
Out Address bus 
42
A20
A20
Out Address bus 
43
A21
A21
Out Address bus 
44
A22
A22
Out Address bus
45
A23
A23
Out Address bus 
46
VSS
GND
In
GND
47
P30
/WAIT
In
Wait signal 
48
P31
/BACK
Out Bus control request acknowledge signal 
49
P32
/BREQ
In
Bus control request signal  
50
P33
DOPS
In
Drawer open signal 
51
P34
/DR0
Out Option drawer open signal 
52
P35
/DR1
Out Option drawer open signal 
53
P36
NC
NC NC
54
P37
NC
NC NC 
55
VCC
VCC
In
+5V 
56
P40
VCC
In
+5V 
57
P41
GND
In
GND 
58
P42
GND
In
GND 
59
P43
GND
In
GND 
60
P44
MCRINT
In
MCR interrupt signal 
61
P45
GND
In
GND 
62
P46
/SHEN
In
CKDC interface shift enable signal 
63
P47
GND
In
GND 
64
VSS
GND
In
GND 
65
P50
/ER
Out DTR signal for RS-232 CH8
66
P51
/DR
In
DSR signal for RS-232 CH8
67
P52
/CS
In
CTS signal for RS-232 CH8
68
P53
/CD
In
DCD signal for RS-232 CH8
69
P54
/RR
Out RR signal for RS-232 CH8
70
P55
/RS
Out RTS signal for RS-232 CH8
71
P56
/CI
In
RI signal for RS-232 CH8
72
P57
GND
Out GND
73
P60
/IPLON0
In
From IPL SW of ER-A7RS2
74
P61
/IPLON1
In
From IPL SW of ER-771
75
P62
/SRESET
In
TCP/IP RESET signal
76
P63
NORDY
In
Flash Memory ready (“H” active)
77
P64
FVPON Out Flash Memory write protect (“L” active)
78
P65
BANK
Out For IPL ROM
79
P66
/CLRES Out Clerk key reset output signal
80
P67
/STOP
Out System reset output signal
81
VSS
GND
In
GND
82
AVSS
GND
In
GND
83
P70
GND
In
GND
84
P71
GND
In
GND
85
P72
GND
In
GND
86
P73
GND
In
GND
87
AVCC
VCC
In
+5V
88
VCC
VCC
In
+5V
89
/IRQ0
/IRQ0
In
Interrupt signal 0
90
/IRQ1
/IRQ1
In
Interrupt signal 1 
91
/IRQ2
UASCK
In
Synchronizing shift clock signal for IR 
92
/IRQ3
SCKI
Out CKDC interface synchronizing shift
clock 
93
RXD1
/UARX
In
RXD signal for RS-232 CH8
94
TXD1
/UATX
Out TXD signal for RS-232 CH8 
95
RXD2
RXDI
In
CKDC interface shift input data 
96
TXD2
TXDI
Out CKDC interface shift output data 
97
VSS
GND
In
GND
98
EXTAL
EXTAL
In
Crystal oscillator connection 19.6MHz 
99
XTAL
XTAL
In
Crystal oscillator connection 19.6MHz 
100
VSS
GND
In
GND
101
X
#
Out System clock
102
E
NC
NC NC
103
/AS
/AS
Out Address strobe
104
RD
/RD
Out Read signal
105
/HWR
/HWR
Out Write signal (HIGH)
106
/LWR
/LWR
Out Write signal (LOW) 
107
/RFSH
/RFSH
Out Refresh cycle signal
108
VCC
VCC
In
+5V
109
MD0
IPLON0
In
From IPL SW of ER-A7RS2
110
MD1
IPLON0
In
From IPL SW of ER-A7RS2
111
MD2
/IPLON0
In
From IPL SW of ER-A7RS2
112
/STBY
VCC
In
+5V
Pin 
No.
Symbol
Signal 
name
In/
Out
Function
ER-A771VS
CIRCUIT DESCRIPTION
7 – 5
2-2. G.A.(MPCA8)
1) Pin configuration
1
RF
2
JF
3
PCUTZ
4
FCUTZ
5
VFZ
6
STAMPZ
7
VIOZ
8
VMEMZ
9
SWAPZ
10
RESZ
11
FROS1Z
12
13
POFF
14
INT1Z
15
HTS1
16
SCK1
17
STH1
18
MCRINT
19
VWAITZ
20
VDD
21
GND
22
MCRINTZ
23
VRESC
24
SLTMG
25
SLRST
26
ASZ
27
RDZ
28
WRZ
29
PHAI
30
RASPN1
31
32
33
GND
34
35
36
VGALZ
37
SDT1Z
38
ID0
39
ID1
40
ID2
160
RASP
159
158
LCDWT
157
CLS2
156
RDD2
155
TEST2
154
TEST1
153
TEST0
152
STH2
151
SC
K2
150
HTS2
149
RCP1
148
SLMTS
147
SLMTD
146
CLS1
145
RAS3
144
RDD1
143
GND
142
VD
D
141
ASKR
XZ
140
SYNC
139
DT8
138
DT9
137
RJMTD
136
RJMTS
135
DT5
134
DT6
133
DT7
132
GND
131
DT1
130
DT2
129
DT3
128
DT4
127
RJTMG
126
TPCKI
125
TPTXD
124
RAS2
123
ROS2Z
122
ROS1Z
121
OPTCSZ
41
ID3
42
GND
43
ID4
44
ID5
45
ID6
46
ID7
47
SSPR
QZ
48
RESETZ
49
INT2Z
50
INT3Z
51
RXDI
52
TXDI
53
SC
KI
54
IRQ0Z
55
A0
56
A1
57
A2
58
A3
59
A4
60
A5
61
GND
62
VD
D
63
A6
64
A7
65
A8
66
A9
67
A10
68
A11
69
A12
70
A13
71
A14
72
A15
73
A16
74
A17
75
A18
76
A19
77
A20
78
A21
79
A22
80
LCDCZ
120
EXINT0Z
119
EXINT1Z
118
EXINT2Z
117
EXINT3Z
116
WROZ
115
RDOZ
114
RA15
113
RA16
112
GND
111
RA17
110
RA18
109
EXWAITZ
108
WAITZ
107
MCR2Z
106
IPLON
105
DAX2
104
DAX1
103
RCRXZ
102
IRRXZ
101
GND
100
VDD
99
UATXZ
98
UARXZ
97
UASCK
96
IRTX
95
RCO
94
RCVRDY2
93
92
91
90
TPRRDYZ
89
TESTZ
88
MD0
87
MD1
86
IPLONZ
85
INT4Z
84
PRST
83
PTMG
82
TRGI
81
A23
RCVRDY1
RCP2
FROMLZ
RASPN1E
RASPN12Z
RASPN2
RASPN2E
TPTRDYZ
TPRDY
ER-A771VS
CIRCUIT DESCRIPTION
7 – 6
2) Block diagram
DROS1Z
RASPN1
IPLONZ
VMEMZ
RASPN1E
RASPN12Z
RASPN2
RASPN2E
D0-D7
WRZ
RDOZ
WROZ
PHAI
RESETZ
RESZ
RDZ
VRESC
POFFZ
ASZ
EXWAITZ
WAITZ
MCRINT
MCRINTZ
VWAITZ
CLS1
RCP1
RDD1
CLS2
RCP2
RDD2
TPTRDYZ
TPTXD
TPRXD
TPCKI
TPRDY
TPRRDYZ
SSPRQZ
TXDI
SCKI
RXDI
SCK1
STH2
HTS2
SCK2
STH2
HTS1
INT1Z
INT2Z
INT3Z
EXINT0Z
EXINT1Z
EXINT2Z
INT4Z
TESTZ
TEST0
TEST1
TEST2
MD0
MD1
IRQ02
EXINT3Z
DECODE
BUFFER
READ
WRITE
CONTROL
WAIT
CONTROL
MCR I/F
USART
X2
TOUCH PANEL I/F
USART
SSP COMPARISON
REGISTER
BAR
SERIAL
CHANNEL
SELECT
(for CKDC)
INT
CONTROL
TEST
LOGIC
M P C A 8
A23-A0
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