Panasonic KX-VC300CX / KX-VC600CX Service Manual ▷ View online
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KX-VC300CX/KX-VC600CX
4.2.10. Analog BD microphone Block diagram
4.2.11. Video Circuit
4.2.11.1. Outline
HD Visual Communication System (HD-Com) is connected between sites via internet.
Compressed Full HD (1080i) data of Site 1's input, such as from a camera, is sent to Site 2.
Also, compressed video from Site 2 is decoded and outputted to Site 1's monitor.
Compressed video received from network is decoded to 1080i video at the processor and is relayed to monitor via transceiver.
Input video such as from camera is sent to the processor via receiver and on to the network after it is decoded.
Compressed Full HD (1080i) data of Site 1's input, such as from a camera, is sent to Site 2.
Also, compressed video from Site 2 is decoded and outputted to Site 1's monitor.
Compressed video received from network is decoded to 1080i video at the processor and is relayed to monitor via transceiver.
Input video such as from camera is sent to the processor via receiver and on to the network after it is decoded.
Diagram 1 Usage scene of HD-Com and flow of video signal
Specification of video interface of HD-Com is as follows.
Table 1 Video interface list
Table 1 Video interface list
Diagram 2 Layout plan of Video interface (KX-VC600)
classification
Name
Type
Corresponding
resolution
Corresponding
Frequency
Input
VIDEOIN Main
HDMI #1
1920x1080i (1080i)
50, 59.94Hz
VIDEOIN Sub
HDMI #2
1920x1080i (1080i)
50, 59.94Hz
PC (RGB)
VGA-15P
640x480 (VGA)
60, 72, 75, 85Hz
800x600 (SVGA)
60, 72, 75, 85Hz
1024x768 (XGA)
60, 70, 75, 85Hz
Output
VIDEO OUT MONITOR
HDMI #3
1920x1080i (1080i)
50, 59.94Hz
VIDEO OUT Y-Pb/Cb-Pr/Cr
Component Video
1920x1080i (1080i)
50, 59.94Hz
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KX-VC300CX/KX-VC600CX
4.2.11.2. Function description of Video
Diagram 3 is Block diagram of video of KX-VC300.
Diagram 4 is Block diagram of video of KX-VC600.
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KX-VC300CX/KX-VC600CX
This part explains the receiver, processor, and transceiver.
1. Video receiver
1. Video receiver
Signal path differs for Receiver for VC300 and VC600 as indicated in the diagram.
VC600 each has its own separate Video receiver (IC403) for digital input (HDMI) and (IC407) for analog input (VGA) and has
the ability to process both digital and analog input at the same time.
VC300 on the other hand, it processes one selected video at a time, either digital or analog input, by one Video Receiver
(IC403).
VC600 each has its own separate Video receiver (IC403) for digital input (HDMI) and (IC407) for analog input (VGA) and has
the ability to process both digital and analog input at the same time.
VC300 on the other hand, it processes one selected video at a time, either digital or analog input, by one Video Receiver
(IC403).
The video input ports are: VIDEOIN MAIN(HDMI1), VIDEOIN SUB(HDMI2), PC RGB(VGA-15P).
Electronic requirements of VIDEO MAIN (Main port), VIDEOIN SUB (Sub port) matches the HDMI standards and the PC RGB
input (VGA port) are able to accept video with-in the prescribed format.
Electronic requirements of VIDEO MAIN (Main port), VIDEOIN SUB (Sub port) matches the HDMI standards and the PC RGB
input (VGA port) are able to accept video with-in the prescribed format.
Video data input from Main port or Sub port must be Full HD (1920X1080) complying with HDMI 1080i standards.
For example, video complying with 720p standards of HD (1280x720) will not be accepted. An alert will be displayed.
For example, video complying with 720p standards of HD (1280x720) will not be accepted. An alert will be displayed.
1080i Full HD video format
Video data input from VGA port must be VGA size (640x480), SVGA size (800x600), or XGA size (1024x768).
Only a portion of VESA timing standards are acceptable. The acceptable PC video formats are indicated in the table below.
Only a portion of VESA timing standards are acceptable. The acceptable PC video formats are indicated in the table below.
Acceptable PC video format (VGA port)
Each of the 3 input ports carries its own EEPROM (called EDID ROM).
EDID ROM stores information such as model name, the acceptable resolution and timing information and one of a kind ID.
Output equipment connected to HD-Com, reads this information from EDID-ROM when connected and the power is ON, it will
output video with appropriate resolution and timing.
EDID ROM stores information such as model name, the acceptable resolution and timing information and one of a kind ID.
Output equipment connected to HD-Com, reads this information from EDID-ROM when connected and the power is ON, it will
output video with appropriate resolution and timing.
2. Video processor
Video processor (IC1600) called PEAKS-PRO2 is the core processor.
It decodes compressed video received from network to 1080i video and sends it to transceiver.
It also encodes input video and sends it to network.
It decodes compressed video received from network to 1080i video and sends it to transceiver.
It also encodes input video and sends it to network.
The processor has a clock generation circuit necessary for the system.
1080i ,59.94Hz
1080i ,50Hz
CEA-861 Format No
No-5
No-20
Int/Prog
Interlace scan
Interlace scan
V active
1080 line
1080 line
Total lines
1125 line
1125 line
V blanking
22.5 line
22.5 line
V Frequency
59.939 Hz
50.000 Hz
H Frequency
33.716 kHz
28.125 kHz
Pixel Frequency
74.176 MHz
74.250 MHz
H total
2200 pixel
2640 pixel
H active
1920 pixel
1920 pixel
H blanking
280 pixel
720 pixel
Video format
Resolution
Frame rate
Horizontal scan
frequency
Pixel clock
H
V
Hz
KHz
MHz
VGA ,60Hz
640
480
59.941
31.469
25.175
VGA ,72Hz
72.810
37.861
31.500
VGA ,75Hz
75.000
37.500
31.500
VGA ,85Hz
85.008
43.269
36.000
SVGA ,60Hz
800
600
60.317
37.879
40.000
SVGA ,72Hz
72.188
48.077
50.000
SVGA ,75Hz
75.000
46.875
49.500
SVGA ,85Hz
85.062
53.674
56.250
XGA ,60Hz
1024
768
60.004
48.363
65.000
XGA ,70Hz
70.069
56.476
75.000
XGA ,75Hz
75.029
60.023
78.750
XGA ,85Hz
84.997
68.677
94.500
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KX-VC300CX/KX-VC600CX
3. Video transceiver
The output ports are: VIDEO OUT MONITOR (HDMI#3) and VIDEO OUT Y-Pb/Cb-Pr/Cr (Audio pin jack-3P).
Electrical requirements of VIDEO OUT MONITOR meets HDMI standards.
VIDEO OUT Y-Pb/Cr-Pr/Cr (Audio pin jack port) comply with CEA-770.3/SMPTE-274 standards.
Electrical requirements of VIDEO OUT MONITOR meets HDMI standards.
VIDEO OUT Y-Pb/Cr-Pr/Cr (Audio pin jack port) comply with CEA-770.3/SMPTE-274 standards.
The video transceiver can output uncompressed video data from the processor to monitor and Audio pin jack port simulta-
neously.
When idle, it sends video from one's input ports to one's output ports.
Video data output to monitor port is only Full HD (1920x1080).
Please be aware it cannot output the 720 HD standards (1280x720).
neously.
When idle, it sends video from one's input ports to one's output ports.
Video data output to monitor port is only Full HD (1920x1080).
Please be aware it cannot output the 720 HD standards (1280x720).
4. Basic explanation of Block diagram
• VIDEO IN MAIN HDMI port 1 (CN503)
HDMI type A connector of pin 19 that connect the main camera.
• VIDEO IN SUB HDMI port 2 (CN504)
HDMI type A connector of pin 19 that connect the sub camera.
• PC RGB port (CN501)
Connector of mini D-Sub pin 15, connects VGA port of personal computers.
• EDID ROM (IC501)
ROM that store EDID information connected to serial communication line of three total input port, two HDMI port and VGA port.
Connected equipment (camera and PC) will read this EDID information via cable and confirm the most appropriate resolution
and video timing available.
Connected equipment (camera and PC) will read this EDID information via cable and confirm the most appropriate resolution
and video timing available.
• PnP Support logic for RX
There is a mechanism to achieve plug and play for HDMI port and VGA port. To achieve this, there is a small discrete circuit.
Specifically, 5VP (5Volt Power from HDMI Source), its function is to detect 5Volt fed from camera. DDC2 communication function
for HD Communication to transmit receivable video format to camera and PC (for both HDMI and VGA). And a third, HPD (Hot
Plug Detect) function for HD Communication required by camera to retrieve EDID via DDC.
Specifically, 5VP (5Volt Power from HDMI Source), its function is to detect 5Volt fed from camera. DDC2 communication function
for HD Communication to transmit receivable video format to camera and PC (for both HDMI and VGA). And a third, HPD (Hot
Plug Detect) function for HD Communication required by camera to retrieve EDID via DDC.
• Video receiver LSI (IC403, IC407)
As a result of HDMI digital input and RGB analog input, this LSI selected data of single circuit will be digitalized to 8 bit each of
luminance and croma information. This video information of a total of 16 bit is sent to the next step by synchronizing to video
clock of 74MHz along with horizontal and vertical synchronization signal.
luminance and croma information. This video information of a total of 16 bit is sent to the next step by synchronizing to video
clock of 74MHz along with horizontal and vertical synchronization signal.
• FPGA device (IC601)
This LSI mainly processes mapping to 1920x1080 Full HD size of video resolution of either one of the following 3 types, XGA
(1024x768), SVGA (800x600), VGA (640x480), input from VGA port. HDMI video data input pass-through without any change.
For FPGA device, 8 bit of luminance and croma information is sent to the next step (processor), synchronizing to video clock of
74MHz along with horizontal and vertical synchronization signal.
(1024x768), SVGA (800x600), VGA (640x480), input from VGA port. HDMI video data input pass-through without any change.
For FPGA device, 8 bit of luminance and croma information is sent to the next step (processor), synchronizing to video clock of
74MHz along with horizontal and vertical synchronization signal.
• Video frame buffer memory (IC703)
Working memory required for processing video input from VGA port to FPGA device.
• VCXO clock generators (IC1803)
IC to produce video audio clock
• VIDEO OUT MONITOR HDMI port 3 (CN701)
HDMI type A connector of pin 19 that connect digital HDMI monitor.
• HDMI transceiver (IC701)
This device receives 8 bit of luminance and croma information from processor and converts to HDMI output data.
• DC/DC for MONITOR HDMI port (IC702 (or IC704))
This power IC supplies 5V/50mA to HDMI output port.
• VIDEO OUT Y-Pb/Cb-Pr/Cr Audio pin jack 3P (CN1201)
Component video output of Audio pin jack pin 3 to connect to analog video monitor and projector.
• Analog transceiver (IC1203)
This device amplifies analog video signal from processor, 1 bit of luminance information and 2 bit of croma information to gener-
ate a drive force of 75 ohm load. Output of this device will be connected in series to condenser. The video signal which DC elec-
tricity was removed by condenser is outputted to the component video.
Converts to drive HDMI output data.
ate a drive force of 75 ohm load. Output of this device will be connected in series to condenser. The video signal which DC elec-
tricity was removed by condenser is outputted to the component video.
Converts to drive HDMI output data.
• PnP Support logic for TX
Monitor port has a mechanism to ensure plug and play. To achieve this, there is a discrete circuit. Specifically, 5V feed circuit that
produce 5Volt voltage that is fed to monitor. DDC communications function for monitor to retrieve receivable video format to mon-
itor.
produce 5Volt voltage that is fed to monitor. DDC communications function for monitor to retrieve receivable video format to mon-
itor.
• Main processor (IC1600)
Main processor called PEAKS-PRO2. This device carries out a large portion of video processing.
• Local memory (IC1901, IC1902, IC2001, IC2002)
Working memory of PEAKS-PRO2. It is also used as frame buffer to temporarily store processing video.
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