DOWNLOAD Panasonic UF-885 / UF-895 Service Manual ↓ Size: 22.48 MB | Pages: 127 in PDF or view online for FREE

Name: Panasonic UF-885 / UF-895
Brand: Panasonic
SKU: 24740
Rating: 4 (1 reviews)

Model: UF-885 UF-895
Pages: 127
Size: 22.48 MB
Type: PDF
Document: Service Manual / Other
Brand: Panasonic
Device: Fax / LASER
File: uf-885-uf-895.pdf
Date: 2018-11-20

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37
67
IRQ4
I
Maskable interrupt request pins. Allows selection of level input and edge input.
68
IRQ3
I
Maskable interrupt request pins. Allows selection of level input and edge input.
69
IRQ2
I
Maskable interrupt request pins. Allows selection of level input and edge input.
70
IRQ1
I
Maskable interrupt request pins. Allows selection of level input and edge input.
72
IRQ0
I
Maskable interrupt request pins. Allows selection of level input and edge input.
73
D15
I/O
32bit bidirectional data bus.
74
D14
I/O
32bit bidirectional data bus.
75
D13
I/O
32bit bidirectional data bus.
76
D12
I/O
32bit bidirectional data bus.
78
D11
I/O
32bit bidirectional data bus.
80
D10
I/O
32bit bidirectional data bus.
81
D9
I/O
32bit bidirectional data bus.
82
D8
I/O
32bit bidirectional data bus.
83
D7
I/O
32bit bidirectional data bus.
84
D6
I/O
32bit bidirectional data bus.
86
D5
I/O
32bit bidirectional data bus.
88
D4
I/O
32bit bidirectional data bus.
89
D3
I/O
32bit bidirectional data bus.
90
D2
I/O
32bit bidirectional data bus.
91
D1
I/O
32bit bidirectional data bus.
92
D0
I/O
32bit bidirectional data bus.
99
Vcc
I
Connects to power supply.
100
PA16
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
101
WAIT
I
Input causes insertion of wait cycles into the bus cycle during external space 
access.
107
CK
O
Supplies the system clock to peripheral devices.
108
RES
I
Power-on reset when low.
109
PE0
I/O
General purpose input/output portpins.Each bit can be designated for input/out-
put.
110
PE1
I/O
General purpose input/output portpins.Each bit can be designated for input/out-
put.
111
PE2
I/O
General purpose input/output portpins.Each bit can be designated for input/out-
put.
113
PE3
I/O
General purpose input/output portpins.Each bit can be designated for input/out-
put.
114
PE4
I/O
General purpose input/output portpins.Each bit can be designated for input/out-
put.
115
PE5
I/O
General purpose input/output portpins.Each bit can be designated for input/out-
put.
116
PE6
I/O
General purpose input/output portpins.Each bit can be designated for input/out-
put.
118
AN0
I
Analog signal input pins.
119
PF1
I
General purpose input port pins.
120
PF2
I
General purpose input port pins.
121
PF3
I
General purpose input port pins.
122
PF4
I
General purpose input port pins.
123
PF5
I
General purpose input port pins.
125
PF6
I
General purpose input port pins.
126
PF7
I
General purpose input port pins.
130
RXD0
I
SCI0, SCI1 receive data input pins. (RxD1 is used for data transfer during boot 
mode of F-ZTAT)
131
TXD0
I
SCI0, SCI1 transmit data output pins. (TxD1 is used for data transfer during boot 
mode of F-ZTAT)
132
SCK0
I/O
SCI0, SCI1 clock input/output pins.
133
RXD1
I
SCI0, SCI1 receive data input pins. (RxD1 is used for data transfer during boot 
mode of F-ZTAT)
134
TXD1
I
SCI0, SCI1 transmit data output pins. (TxD1 is used for data transfer during boot 
mode of F-ZTAT)
136
SCK1
I/O
SCI0, SCI1 clock input/output pins.
137
PE7
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
138
PE8
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
139
PE9
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
140
PE10
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
142
PE11
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
143
PE12
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
144
PE13
I/O
General purpose input/output port pins. Each bit can be designated for input/out-
put.
Pin No.
Pin Name
Type
Description

38
3.1.2
Sub CPU (uPD780058)
14, 26, 
28, 35, 
40, 42, 
44, 45, 
61, 63, 
71, 77, 
79, 85, 
87, 93-
98, 102-
106, 112, 
117, 124, 
127-129, 
135, 141
-
-
Not used.
Pin No.
Pin Name
Type
Description
40
VDD
V
+5V for digital circuit
55
AVDD
V
+5V Power for A/D Converter
56
AVREF
V
Reference Voltage for A/D Converter
35
nRESET
I
Hardware reset
42
X1
I
Main system clock (7.68MHz)
41
X2
I
Main system clock
45
nTSTIN
I
Test pattern S/W
44
XT2
-
-
36
nHSYNCA
I
LSU HSYNC
37
nESEN
I
Exit sensor
38
nRSENA
I
Timing sensor
39
nPCHK1
I
Paper detect sensor
57
nCMDA
I
Command data
58
nSTAA
O
Status data
59
nSCLKA
I
Serial clock
60
nCCHK1
I
Cassette detect sensor
61
nPMRY
I
LSU polygon motor ready
62
nSDIA
I
Reserve for option
63
nSDOA
O
Reserve for option
64
nSCKA
O
Reserve for option
1
nLDCTL
O
LSU HSYNC Control
2
nLDON
O
LSU laser-diode control
3
pPMCK
O
-
4
nFNRDT
I
Fan motor ready
5
PMMP3
O
Main motor control
6
PMMP2
O
Main motor control
7
PMMP1
O
Main motor control
8
PMMP0
O
Main motor control
47
THERM
I
Fuser temp. detection
48
+24LVL
I
Door open detection
49
TONER
I
Toner empty detection
50
nPRDY
O
Printer ready
51
nPRNTA
I
Print start
52
nCBSYA
I
Command busy
53
nSBSY
O
Status busy
54
nVSYNC
O
Vertical SYNC
27
nSIZE23
I
Reserve for option
28
nSIZE22
I
Reserve for option
29
nSIZE21
I
Reserve for option
30
nCCHK2
I
2nd cassette detect sensor
31
nPCHK2
I
2nd cassette paper detect sensor
32
pADF2
O
2nd cassette paper feed solenoid
33
pOPRST
O
Reserve for option
34
nSSRA
O
Fuser halogen lamp control
18
pTR0
O
HVPS control
19
pTR1
O
HVPS control
20
nPMON
O
LSU polygon motor start
21
nSIZE13
I
Reserve for option
22
nSIZE12
I
Reserve for option
23
nSIZE11
I
Reserve for option
25
nOP
I
2nd option detection
26
nPDOR2
I
2nd option jam door
10
pFAN0
O
Fan control (LOW)
11
pFAN1
O
Fan control (HIGH)
12
pADF1
O
Paper feed solenoid
13
pCOUNT
O
Reserve for option
14
pMPOW
O
Mecha power (+24VM) ON
Pin No.
Pin Name
Type
Description

39
3.1.3
MSC (Main System Controller)
15
pCR0
O
HVPS control
16
pCR1
O
HVPS control
17
pDR0
O
HVPS control
43
IC (VPP)
V
Internal GND
46
AVSS
V
GND for A/D converter
24
VSS
V
GND for digital circuit
9
VSS
V
GND for digital circuit
Pin No.
Pin Name
Type
Description
1
VCC
I
Power
2
NIODACK0
O
Triple state output (IoI=2mA)
3
NIODACK1
O
Triple state output (IoI=2mA)
4
GND
O
Ground
5
NIODACK4
O
Triple state output (IoI=2mA)
6
NIODACK5
O
Triple state output (IoI=2mA)
7
NIODACK6
O
Triple state output (IoI=2mA)
8
NIODACK7
O
Triple state output (IoI=2mA)
9
CPUCLKO
O
Output (IoI=2mA)
10
NIORD
O
Triple state output (IoI=8mA)
11
NIOWRL
O
Triple state output (IoI=8mA)
12
NIOWRH
O
Triple state output (IoI=8mA)
13
NAO
O
Output (IoI=2mA)
14
IOA1
O
Output (IoI=4mA)
15
VCC
I
Power
16
IOA2
O
Output (IoI=4mA)
17
IOA3
O
Output (IoI=4mA)
18
GND
O
Ground
19
NCS00
O
Triple state output (IoI=2mA)
20
NCS01
O
Triple state output (IoI=2mA)
21
NCS02
O
Triple state output (IoI=2mA)
22
NCS03
O
Triple state output (IoI=2mA)
23
NCS04
O
Triple state output (IoI=2mA)
24
NCS05
O
Triple state output (IoI=2mA)
25
NCS07
O
Triple state output (IoI=2mA)
26
NCS08
O
Triple state output (IoI=2mA)
27
NCS09
O
Triple state output (IoI=2mA)
28
NCS0A
O
Triple state output (IoI=2mA)
29
NCS0B
O
Triple state output (IoI=2mA)
30
NCS0C
O
Triple state output (IoI=2mA)
31
NCS0D
O
Triple state output (IoI=2mA)
32
TXD2
O
Output (IoI=2mA)
33
TXD3
O
Output (IoI=2mA)
34
SCK2
I/O
TTL Schimidt input/output with pull-down resistance (IoI=2mA)
35
SCK3
I/O
TTL Schimidt input/output with pull-down resistance (IoI=2mA)
36
RXD2
I
TTL level input with pull-down resistance
37
RXD3
I
TTL level input with pull-down resistance
38
NMIR0
I
TTL level input
39
MIR1
I
TTL level input
40
MIR2
I
TTL level input
41
MIR4
I
TTL level input
42
NMIR6
I
TTL level input
43
VCC
I
Power
44
NACK1
I
TTL level input
45
NWAIT1
I
TTL level input
46
GND
I
Ground
47
NWAIT2
I
TTL level input
48
NWAIT3
I
TTL level input
49
NWAIT5
I
TTL level input
50
IODREQ0
I
TTL level input with pull-down resistance
51
IODREQ1
I
TTL level input with pull-down resistance
52
IODREQ4
I
TTL level input with pull-down resistance
53
IODREQ5
I
TTL level input with pull-down resistance
54
IODREQ6
I
TTL level input with pull-down resistance
55
IODREQ7
I
TTL level input with pull-down resistance
56
VPPON
I
TTL level input
57
VCC
I
Power
58
IN5V1
I
TTL level input
59
IN5V2
I
TTL level input
60
GND
I
Ground
61
VCC
I
Power
Pin No.
Pin Name
Type
Description

40
62
IN5V3
I
TTL level input
63
IN5V4
I
TTL level input
64
GND
O
Ground
65
IN5V5
I
TTL level input
66
IN5V6
I
TTL level input
67
IN5V7
I
TTL level input
68
IN5V8
I
TTL level input
69
IN5V9
I
TTL level input
70
IN5V10
I
TTL level input
71
IOD0
I/O
TTL level input/output (IoI=8mA)
72
IOD1
I/O
TTL level input/output (IoI=8mA)
73
IOD2
I/O
TTL level input/output (IoI=8mA)
74
IOD3
I/O
TTL level input/output (IoI=8mA)
75
VCC
I
Power
76
IOD4
I/O
TTL level input/output (IoI=8mA)
77
IOD5
I/O
TTL level input/output (IoI=8mA)
78
GND
O
Ground
79
IOD6
I/O
TTL level input/output (IoI=8mA)
80
IOD7
I/O
TTL level input/output (IoI=8mA)
81
IOD8
I/O
TTL level input/output (IoI=8mA)
82
IOD9
I/O
TTL level input/output (IoI=8mA)
83
IOD10
I/O
TTL level input/output (IoI=8mA)
84
IOD11
I/O
TTL level input/output (IoI=8mA)
85
IOD12
I/O
TTL level input/output (IoI=8mA)
86
IOD13
I/O
TTL level input/output (IoI=8mA)
87
IOD14
I/O
TTL level input/output (IoI=8mA)
88
IOD15
I/O
TTL level input/output (IoI=8mA)
89
VCC
I
Power
90
GND
O
Ground
91
VCC
O
Power
92
GND
I
Ground
93
XOUT
O
Crystal  oscillator output pin.
94
XIN
I
Crystal  oscillator input pin.
95
TM
I
TTL level input with pull-down resistance
96
POFCLSEL
I
TTL level input
97
NRAS
I
TTL level input
98
NCASL
I
TTL level input
99
NCASH
I
TTL level input
100
NMRAS1
O
Output (IoI=3mA)
101
NMRAS2
O
Output (IoI=3mA)
102
NMRAS3
O
Output (IoI=3mA)
103
VCC
O
Power
104
NMRAS4
O
Output (IoI=3mA)
105
NMWR
O
Output (IoI=3mA)
106
GND
O
Ground
107
NMRD
O
Output (IoI=3mA)
108
NMCASL
O
Output (IoI=3mA)
109
NMCASH
O
Output (IoI=3mA)
110
MA1
O
Output (IoI=3mA)
111
MA2
O
Output (IoI=3mA)
112
MA3
O
Output (IoI=3mA)
113
MA4
O
Output (IoI=3mA)
114
MA5
O
Output (IoI=3mA)
115
MA6
O
Output (IoI=3mA)
116
MA7
O
Output (IoI=3mA)
117
VCC
O
Power
118
MA8
O
Output (IoI=3mA)
119
MA9
O
Output (IoI=3mA)
120
GND
O
Ground
121
VCC
O
Power
122
MA10
O
Output (IoI=3mA)
123
MA11
O
Output (IoI=3mA)
124
GND
O
Ground
125
MA12
O
Output (IoI=3mA)
126
D0
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
127
D1
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
128
D2
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
129
D3
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
130
GND
O
Ground
131
D4
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
132
D5
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
133
D6
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
134
D7
I/O
TTL level Input/Output with pull-down resistance (IoI=3mA)
135
VCC
O
Power
Pin No.
Pin Name
Type
Description

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