Sony STR-ZA1000ES / STR-ZA2000ES / STR-ZA3000ES Service Manual ▷ View online
STR-ZA1000ES/ZA2000ES/ZA3000ES
STR-ZA1000ES/ZA2000ES/ZA3000ES
41
41
6-3. BLOCK DIAGRAM - AMP Section -
C
FL
SL
>010B
FL, SL, SBL, C
PRE DRIVE
Q770, 772,
774, 775
LIMITER
Q752, 753
BOOSTER
Q751
CURRENT
DETECT
Q754, 755
PRE DRIVE
Q820, 822,
824, 825
LIMITER
Q802, 803
BOOSTER
Q801
CURRENT
DETECT
Q804, 805
SBL
PRE DRIVE
Q570, 572,
574, 575
LIMITER
Q552, 553
BOOSTER
Q551
CURRENT
DETECT
Q554, 555
PRE DRIVE
Q620, 622,
624, 625
LIMITER
Q602, 603
BOOSTER
Q601
CURRENT
DETECT
Q604, 605
PROTECTOR
Q510 – 512,
515, 516
D600
D550
D800
D750
D513
PROTECT
OR
47
TEMP1
100
R
Y_SPK_FRONT
35
R
Y_SPK_SUR
33
R
Y_SPK_SB
32
R
Y_SPK_C
34
LIMITTER
89
SYSTEM CONTROLLER
IC8002 (3/6)
FRONT A
L
R
RY491
–2
RELAY DRIVE
Q499
+
–
–
R-CH
TB441
+
–
–
TB491
SURROUND
L
R
RY691
–2
RELAY DRIVE
Q699
+
–
–
R-CH
TB641
+
–
–
TB691
: AUDIO
SIGNAL PATH
R-ch is omitted due to same as L-ch.
SURROUND BACK
(FRONT HIGH/FRONT B/BI-AMP/ZONE 2)
L
CENTER
R
RY791
–2
RELAY DRIVE
Q799
+
–
–
R-CH
TB741
RY591
–2
RELAY DRIVE
Q599
+
–
–
TB541
+
–
–
TB791
BOOSTER
Q750
BOOSTER
Q800
BOOSTER
Q550
BOOSTER
Q600
D8001
D8002
TH501
TEMP2
99
TH502
SPEAKERS
IMPEDANCE USE 6 – 16
:
(Page 40)
STR-ZA1000ES/ZA2000ES/ZA3000ES
STR-ZA1000ES/ZA2000ES/ZA3000ES
42
42
6-4. BLOCK DIAGRAM - ANALOG VIDEO Section -
J6004
VIDEO
VIDEO IN
AUX
VIDEO IN
VIDEO INPUT SELECTOR
IC6014
VOUT5
MONITOR
VIDEO OUT
ZONE 2
VIDEO OUT
93
77
YOUT3 69
PBOUT3 60
PROUT3 51
VOUT1 83
VOUT2 82
VIN6
94 VIN7
PBIN6
YIN6
IN 1
(BD/DVD)
J6007
YOUT1 71
PBOUT1 62
J6008 (2/2)
PROUT1 53
J6008 (1/2)
Y
P
B
P
R
Y
P
B
P
R
22
35
PRIN6
39
YIN5
21
PBIN5
34
PRIN5
40
COMPONENT
DETECT
Q001 – 003
COMPONENT VIDEO
ASSIGNABLE
(INPUT ONLY)
IN 2
(VIDEO)
COMPONENT VIDEO
MONITOR OUT
Y
P
B
P
R
: VIDEO
SIGNAL PATH
VIDEO A/D CONVERTER
IC6000
35 AIN1
49 AIN6
48 AIN5
47 AIN4
49 AIN6
48 AIN5
47 AIN4
VS 64
HS/CS 2
LCC 20
FIELD/DE 63
20
20
XTAL1
21
XTAL
22
X6000
28.63636MHz
28 – 25, 19 – 12,
8 – 5, 62 – 59
P0 – P19
VS
DE
C[0] – C[9], Y[0] – Y[9]
LCC
HS
>011B
C[0] – C[9], Y[0] – Y[9],
HS, VS, DE, LCC
5 6
SDA
SCL
V_SEL_SDA
V_SEL_SCK
95
comp-det
94
96
53
SDA
TA
ADV7181C_SDA
116
54
SCLK
ADV7181C_SCK
117
1
/INT
ADV7181C_INT
115
29
/PWRDWN
ADV7181C_PWRDWN
119
51
/RESET
ADV7181C_RESET
118
VIDEO SYSTEM CONTROLLER
IC3003 (2/5)
(Page 43)
STR-ZA1000ES/ZA2000ES/ZA3000ES
STR-ZA1000ES/ZA2000ES/ZA3000ES
43
43
6-5. BLOCK DIAGRAM - HDMI INPUT Section -
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
18
+5V POWER
13
CEC
HDMI RECEIVER
IC5001
CN5001
12 RX0P
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
8 RXCP
7 RXCN
7 RXCN
76 DSDA
75 DSCL
75 DSCL
38 TX_HPD
3
69 68
RPWR5V
CSDA
CSCL
TX0P 43
TX0N 42
TX1P 45
TX1N 44
TX2P 47
TX2N 46
TXCN 40
TXCP 41
HDMI TRANSCEIVER
IC3502 (1/2)
50 R4X0+
49 R4X0–
52 R4X1+
51 R4X1–
54 R4X2+
53 R4X2–
48 R4XC+
47 R4XC–
49 R4X0–
52 R4X1+
51 R4X1–
54 R4X2+
53 R4X2–
48 R4XC+
47 R4XC–
92 DSDA4
93 DSCL4
93 DSCL4
94 CBUS_HPD4
95 R4PWR5V
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
HDCP 2.2
(SAT/CATV)
IN 2
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
18
+5V POWER
13
CEC
42 R3X0+
41 R3X0–
44 R3X1+
43 R3X1–
46 R3X2+
45 R3X2–
40 R3XC+
39 R3XC–
41 R3X0–
44 R3X1+
43 R3X1–
46 R3X2+
45 R3X2–
40 R3XC+
39 R3XC–
88 DSDA3
89 DSCL3
89 DSCL3
90 CBUS_HPD3
91 R3PWR5V
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
HDCP 2.2
(STB)
IN 3
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
(STB)
IN 3
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
18
+5V POWER
13
CEC
CN3500
23 R1X0+
22 R1X0–
25 R1X1+
24 R1X1–
27 R1X2+
26 R1X2–
21 R1XC+
20 R1XC–
80 DSDA1
81 DSCL1
82 CBUS_HPD1
83 R1PWR5V
22 R1X0–
25 R1X1+
24 R1X1–
27 R1X2+
26 R1X2–
21 R1XC+
20 R1XC–
80 DSDA1
81 DSCL1
82 CBUS_HPD1
83 R1PWR5V
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
(SA-CD/CD)
IN 5
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
18
+5V POWER
13
CEC
31 R2X0+
30 R2X0–
33 R2X1+
32 R2X1–
35 R2X2+
34 R2X2–
29 R2XC+
28 R2XC–
84 DSDA2
85 DSCL2
86 CBUS_HPD2
87 R2PWR5V
30 R2X0–
33 R2X1+
32 R2X1–
35 R2X2+
34 R2X2–
29 R2XC+
28 R2XC–
84 DSDA2
85 DSCL2
86 CBUS_HPD2
87 R2PWR5V
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
18
+5V POWER
13
CEC
CN3800
13 R0X0+
12 R0X0–
15 R0X1+
14 R0X1–
17 R0X2+
16 R0X2–
11 R0XC+
10 R0XC–
12 R0X0–
15 R0X1+
14 R0X1–
17 R0X2+
16 R0X2–
11 R0XC+
10 R0XC–
76 DSDA0
77 DSCL0
77 DSCL0
78 CBUS_HPD0
79 R0PWR5V
79 R0PWR5V
HDMI
IN 6 (GAME)
[4K]
LEVEL SHIFT
IC3800
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
18
+5V POWER
13
CEC
CN3502
60 RX50+
59 RX50–
62 RX51+
61 RX51–
64 RX52+
63 RX52–
58 RX5C+
57 RX5C–
97 DSDA5
98 DSCL5
99 CBUS_HPD5
59 RX50–
62 RX51+
61 RX51–
64 RX52+
63 RX52–
58 RX5C+
57 RX5C–
97 DSDA5
98 DSCL5
99 CBUS_HPD5
100 R5PWR5V
8 RG_RX_INT_0
10 RG_RX_RESET_0
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
(BD/DVD)
IN 1
20 34
INT
RESETN
67 66
CSDA
CSCL
HDMI_SDA
HDMI_SCK
138 137
68
69
INT
RESET
SP
AR
TA_INT
SP
AR
TA_RST
124
125
102
VCC33OUT
RESET SWITCH
Q3000
I2C_SDA
I2C_SCL
CEC
>012B
I2C_SDA,
I2C_SCL,
CEC
VIDEO SYSTEM CONTROLLER
IC3003 (3/5)
SERIAL FLASH
IC5000
64
SPI_MISO
63
SPI_MOSI
60
SPI_CLK
61
SPI_CS0
DO (IO1)
2
DI (IO0)
5
CLK
6
CS
1
HDMI RECEIVER
IC5002
12 RX0P
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
8 RXCP
7 RXCN
7 RXCN
76 DSDA
75 DSCL
75 DSCL
38 TX_HPD
3
69 68
RPWR5V
CSDA
CSCL
TX0P 43
TX0N 42
TX1P 45
TX1N 44
TX2P 47
TX2N 46
TXCN 40
TXCP 41
20 34
INT
RESETN
SERIAL FLASH
IC5006
64
SPI_MISO
63
SPI_MOSI
60
SPI_CLK
61
SPI_CS0
DO (IO1)
2
DI (IO0)
5
CLK
6
CS
1
9 HSYNC
8 VSYNC
7 DE
8 VSYNC
7 DE
172 IDCK
20
20
VS
DE
DE
C[0] – C[9],
Y[0] – Y[9]
Y[0] – Y[9]
LCC
HS
>011B
C[0] – C[9], Y[0] – Y[9],
HS, VS, DE, LCC
HS, VS, DE, LCC
161 – 171,
174 – 171, 1 – 6
D0 – D19
RESET SWITCH
Q3002
9 RG_RX_INT_1
11 RG_RX_RESET_1
RESET SWITCH
Q3001
(ZA1000ES/ZA2000ES)
(ZA3000ES)
(ZA3000ES)
(ZA2000ES)
CN5002
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
(GAME)
IN 3
(ZA1000ES)
CN3501
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
(VIDEO)
IN 4
HDMI
[4K]
ASSIGNABLE
(INPUT ONLY)
(STB)
IN 4
(ZA2000ES/ZA3000ES)
(ZA2000ES/ZA3000ES)
(ZA1000ES)
: AUDIO
: VIDEO
SIGNAL PATH
133 SD0_IN/SPDIFO_IN
132 SCK0_IN/GPIO10
131 WS0_IN/GPIO11
132 SCK0_IN/GPIO10
131 WS0_IN/GPIO11
WS0_IN
SCK0_IN
SD0_IN
>006B
SD0_IN, SCK0_IN,
WS0_IN
WS0_IN
129
MUTEOUT/GPIO9
>008B
HDMI_ERROR
(Page 39)
(Page 39)
(Page 42)
(Page 44)
Ver. 1.1
STR-ZA1000ES/ZA2000ES/ZA3000ES
STR-ZA1000ES/ZA2000ES/ZA3000ES
44
44
6-6. BLOCK DIAGRAM - HDMI OUTPUT Section -
102
(PROG_VURX)
101
(PROG_VUTX)
UART_VU/SEL2
UART_SEL2/VU
6
RG_TX_INT_0
2
RG_TX_RESET_0
>014B
UART_SEL2/VU, UART_VU/SEL2
B18 RX_0P
A18 RX_0N
B19 RX_1P
A19 RX_1N
B20 RX_2P
A20 RX_2N
B17 RX_CP
A17 RX_CN
C16 RX_HPD
A18 RX_0N
B19 RX_1P
A19 RX_1N
B20 RX_2P
A20 RX_2N
B17 RX_CP
A17 RX_CN
C16 RX_HPD
B12 XTALP
AA15 DDR_CK
B8
A8
A8
MISO1
MOSI1
MOSI1
ADV8003_SPSF_DIN
ADV8003_SPSF_DOUT
ADV8003_SPSF_DOUT
135
134
134
RG_TX_SDA
RG_TX_SCK
RG_TX_SCK
3
4
4
C8
SCK1
D8
C10
/CS1
INT0
D10
INT1
D11
C11
C11
INT2
PDN
A11
/RESET
ADV8003_SPSF_SCK
133
ADV8003_SPI_CS
128
ADV8003_INT0
132
ADV8003_INT1
131
ADV8003_INT2
130
ADV8003_P_DOWN
139
ADV8003_RESET
136
K22
K23
K23
J22
J23
J23
H22
H23
H23
L22
L23
J20
L23
J20
K20
L20
TX1_0+
TX1_0–
TX1_1+
TX1_1–
TX1_2+
TX1_2–
TX1_0–
TX1_1+
TX1_1–
TX1_2+
TX1_2–
TX1_C+
TX1_C–
TX1_C–
DDC1_SDA
DDC1_SCL
HPD_TX1
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
CN5012
HDMI
[4K]
HDCP 2.2
ARC
OUT A
VIDEO SYSTEM CONTROLLER
IC3003 (4/5)
CK
DDR_DQ [0] –
DDR_DQ [15]
DDR_DQ [15]
DQ0 – DQ15
A0 – A12
DDR_A [0] –
DDR_A [12]
DDR_A [12]
16
16
13
Y15 DDR_/CK
AB15 DDR_CKE
AB13 DDR_BA [0]
AC13 DDR_BA [1]
AC14 DDR_BA [2]
AA13 DDR_/CS
AB14 DDR_/RAS
Y13 DDR_/CAS
AC15 DDR_/WE
AA19 DDR_DM [1]
AB17 DDR_DQS [1]
AC18 DDR_/DQS [1]
AA20 DDR_DM [0]
AB22 DDR_DQS [0]
AC22 DDR_/DQS [0]
AB15 DDR_CKE
AB13 DDR_BA [0]
AC13 DDR_BA [1]
AC14 DDR_BA [2]
AA13 DDR_/CS
AB14 DDR_/RAS
Y13 DDR_/CAS
AC15 DDR_/WE
AA19 DDR_DM [1]
AB17 DDR_DQS [1]
AC18 DDR_/DQS [1]
AA20 DDR_DM [0]
AB22 DDR_DQS [0]
AC22 DDR_/DQS [0]
AB6 DDR_DM [3]
Y7 DDR_DQS [3]
AA7 DDR_/DQS [3]
AB4 DDR_DM [2]
AB4 DDR_DM [2]
Y3 DDR_DQS [2]
AA4 DDR_/DQS [2]
13
J8
/CK K8
CKE K2
BA0 L2
BA1 L3
BA2 L1
BA1 L3
BA2 L1
/CS L8
/RAS K7
/CAS L7
/CAS L7
/WE K3
UDM B3
UDQS B7
/UDQS A8
LDM F3
LDQS F7
/LDQS E8
SD-RAM
IC3203
SD-RAM
IC3200
CK
DDR_DQ [16] –
DDR_DQ [31]
DDR_DQ [31]
DQ0 – DQ15
A0 – A12
16
13
J8
/CK K8
CKE K2
BA0 L2
BA1 L3
BA2 L1
BA1 L3
BA2 L1
/CS L8
/RAS K7
/CAS L7
/CAS L7
/WE K3
UDM B3
UDQS B7
/UDQS A8
LDM F3
LDQS F7
/LDQS E8
VIDEO PROCESSOR
IC3202
HDMI TRANSCEIVER
IC3502 (2/2)
SERIAL FLASH
IC5009
64
SPI_MISO
63
SPI_MOSI
60
SPI_CLK
61
SPI_CS0
DO (IO1)
2
DI (IO0)
5
CLK
6
CS
1
SERIAL FLASH
IC3206
B10
MISO2
B9
MOSI2
A9
SCK2
A10
/CS2
SO
2
SI
5
SCK
6
/CS
1
12 RX0P
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
8 RXCP
7 RXCN
7 RXCN
76 DSDA
75 DSCL
75 DSCL
4 RX_HPD
69 CSDA
68 CSCL
20 INT
34 RESETN
68 CSCL
20 INT
34 RESETN
43
42
45
44
47
46
41
40
67
66
38
42
45
44
47
46
41
40
67
66
38
TX0P
TX0N
TX1P
TX1N
TX2P
TX2N
TXCP
TXCN
TDSDA
TDSCL
TX_CBUS_HPD
14
RESERSE (NC)
13
CEC
D7
SDA
C7
SCL
HDMI TRANSMITTER
IC5010
RY001
RELAY
DRIVE
Q001
CEC DATA
SWITCH
Q8005 – 8008
CEC_RX
CEC_TX
CEC_PCONT
>013B
CEC_PCONT,
CEC_TX, CEC_RX
I2C_SDA
I2C_SCL
CEC
>012B
I2C_SDA, I2C_SCL, CEC
>002B
ARC_SPDIF
7
DATA0+
9
DATA0–
4
DATA1+
6
DATA1–
1
DATA2+
3
DATA2–
10
CLOCK+
12
CLOCK–
16
SDA (5V)
15
SCL (5V)
19
HOT PLUG DET
CN5013
HDMI
[4K]
HDCP 2.2
(ZONE 2)
OUT B
HDMI
[4K]
(ZONE 2)
OUT B
155
154
157
156
159
158
153
152
154
157
156
159
158
153
152
109
110
110
105
T0X0+
T0X0–
T0X1+
T0X1–
T0X2+
T0X2–
T0X0–
T0X1+
T0X1–
T0X2+
T0X2–
T0XC+
T0XC–
T0XC–
TXDSDA1
TXDSCL1
TX_HPD0
114
XTALIN
145
144
147
146
149
148
143
142
144
147
146
149
148
143
142
108
T1X0+
T1X0–
T1X1+
T1X1–
T1X2+
T1X2–
T1X0–
T1X1+
T1X1–
T1X2+
T1X2–
T1XC+
T1XC–
T1XC–
TX_HPD1
T1X0–
T1X1+
T1X1+
T1X0+
OUT1_SDA
T1X1–
T1X2–
T1XC–
T1XC+
T1X2+
OUT1_HPD
OUT1_SDL
T1X0–
T1X1+
T1X1+
T1X0+
OUT1_SDA
T1X1–
T1X2–
T1XC–
T1XC+
T1X2+
OUT1_HPD
OUT1_SDL
B4 AUD_IN [0]
A4 AUD_IN [1]
A5 AUD_IN [2]
B5 AUD_IN [3]
C4 AUD_IN [4]
A6 AUD_IN [5]
D6 MCLK
C6 SCLK
C5 DSD_CLK
A4 AUD_IN [1]
A5 AUD_IN [2]
B5 AUD_IN [3]
C4 AUD_IN [4]
A6 AUD_IN [5]
D6 MCLK
C6 SCLK
C5 DSD_CLK
124
126
127
128
126
127
128
130
122
121
125
125
SDO_0/DL0
SDO_1/DR1/GPIO6
SDO_2/DL1/GPIO7
SDO_3/DR2/GPIO8
SPDIF0_OUT/DL2
SCK0/DDCK
WS0_OUT/DR0
MCLK
136
SD1_IN/SD1_OUT/S
PDIF1_IN/
SPDIF1_OUT
SD1
SD2
SD0
SD3
BCK
SPDIF1_OUT
LRCK
SPDIF
MCK
>001B
SD0 – SD3, SPDIF, BCK,
LRCK, MCK, SPDIF1_OUT
CLOCK
BUFFER
IC3501
X3500
27MHz
UART_VU/MU, UART_MU/VU, MD0_MU/VU,
ENDFLAG_VU/MU, RESET_MU/VU
63
UART TX (VU2MU)
62
UART RX (MU2VU)
49
INTIX
RESET_MU/VU
UART_MU/VU
UART_VU/MU
69
MD0
MD0_MU/VU
64
ENDFLAG_VU/MU
ENDFLAG_VU/MU
>015B
–1
7
RG_TX_INT_1
5
RG_TX_RESET_1
HDMI TRANSMITTER
IC5011
12 RX0P
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
11 RX0N
14 RX1P
13 RX1N
16 RX2P
15 RX2N
8 RXCP
7 RXCN
7 RXCN
76 DSDA
75 DSCL
75 DSCL
4 RX_HPD
TX0P 43
TX0N 42
TX1P 45
TX1N 44
TX2P 47
TX2N 46
TXCN 40
TXCP 41
20 34
INT
RESETN
SERIAL FLASH
IC5013
64
SPI_MISO
63
SPI_MOSI
60
SPI_CLK
61
SPI_CS0
DO (IO1)
2
DI (IO0)
5
CLK
6
CS
1
(ZA1000ES/ZA2000ES)
(ZA1000ES/ZA2000ES)
(ZA3000ES)
67
66
38
66
38
TDSDA
TDSCL
TX_CBUS_HPD
(ZA1000ES/ZA2000ES)
(ZA3000ES)
RESET SWITCH
Q3003
RESET SWITCH
Q3004
X1
71
X0
70
X3000
4MHz
69 CSDA
68 CSCL
68 CSCL
: AUDIO
: VIDEO
SIGNAL PATH
(Page 47)
(Page 39)
(Page 39)
(Page 43)
(Page 47)
(Page 47)
Ver. 1.1
Click on the first or last page to see other STR-ZA1000ES / STR-ZA2000ES / STR-ZA3000ES service manuals if exist.