Sharp XG-NV1E (serv.man18) Service Manual ▷ View online
XG-NV1U
61
8-7-21. Subaddress 14 (DATA BYTE 167 to 160)
Horizontal synchronization begin 60 Hz (HS6B)
8-7-20. Subaddress 13 (DATA BYTE 158 to 152)
Luminance contrast control
CONT7 CONT6 CONT5 CONT4 CONT3 CONT2 CONT1 CONT0
1.999 Maximum
0
1
1
1
1
1
1
1
70 CCIR-level
0
1
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0 luminance off
0
0
0
0
0
0
0
0
-1 inverse luminance
1
1
0
0
0
0
0
0
-2 inverse luminance
1
0
0
0
0
0
0
0
GAIN
CONTROL BITS
HS6B7
HS6B6
HS6B5
HS6B4
HS6B3
HS6B2
HS6B1
HS6B0
+191
-382
1
0
1
1
1
1
1
1
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
-64
+128
1
1
0
0
0
0
0
0
DECIMAL
DELAY TIME
MULTIPLIER
(step size = 2/LLC)
CONTROL BITS
8-7-22. Subaddress 15 (DATA BYTE 175 to 168)
Horizontal synchronization stop 60 Hz (HS6S)
HS6S7
HS6S6
HS6S5
HS6S4
HS6S3
HS6S2
HS6S1
HS6S0
+191
-382
1
0
1
1
1
1
1
1
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
-64
+128
1
1
0
0
0
0
0
0
DECIMAL
DELAY TIME
MULTIPLIER
(step size = 2/LLC)
CONTROL BITS
8-7-23. Subaddress 16 (DATA BYTE 183 to 176)
Horizontal clamping begin 60 Hz (HC6B)
HC6B7
HC6B6
HC6B5
HC6B4
HC6B3
HC6B2
HC6B1
HC6B0
+127
-254
0
1
1
1
1
1
1
1
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
-128
+256
1
0
0
0
0
0
0
0
DECIMAL
DELAY TIME
MULTIPLIER
(step size = 2/LLC)
CONTROL BITS
8-7-24. Subaddress 17 (DATA BYTE 191 to 184)
Horizontal clamping stop 60 Hz (HC6S)
HC6S7
HC6S6
HC6S5
HC6S4
HC6S3
HC6S2
HC6S1
HC6S0
+127
-254
0
1
1
1
1
1
1
1
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
-128
+256
1
0
0
0
0
0
0
0
DECIMAL
DELAY TIME
MULTIPLIER
(step size = 2/LLC)
CONTROL BITS
XG-NV1U
62
8-7-25. Subaddress 18 (DATA BYTE 199 to 192)
Horizontal synchronization start after PHI1 60 Hz (HP6I)
DECIMAL
DELAY TIME
MULTIPLIER
(step size = 2/LLC)
CONTROL BITS
HP6I7
HP6I6
HP6I5
HP6I4
HP6I3
HP6I2
HP6I1
HP6I0
+127
↓
+98
+97
-97
-98
↓
-128
0
1
1
1
1
1
1
1
↓
↓
↓
↓
↓
↓
↓
↓
0
1
1
0
0
0
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
1
1
1
1
0
0
1
1
1
1
0
↓
↓
↓
↓
↓
↓
↓
↓
1
0
0
0
0
0
0
0
forbidden ;
outside available central
counter range
outside available central
counter range
-32µs
(max. negative value)
(max. negative value)
+31.7µs
(max. positive value)
(max. positive value)
forbidden ;
outside available central
counter range
outside available central
counter range
BRIG7
BRIG6
BRIG5
BRIG4
BRIG3
BRIG2
BRIG1
BRIG0
255 (bright)
1
1
1
1
1
1
1
1
139 (CCIR-level)
1
0
0
0
1
0
1
1
128
1
0
0
0
0
0
0
0
0 (dark)
0
0
0
0
0
0
0
0
OFFSET
CONTROL BITS
8-7-26. Subaddress 19 (DATA BYTE 207 to 200)
Luminance brightness control
XG-NV1U
63
8-8. I
2
C-Bus Detail (Continued)
DUAD slave receiver (SU 20H to 32H)
8-8-1. Subaddress 20 (DATA BYTE 007 to 000)
Analog control #1
FUNCTION
CONTROL BITS
Analog input select 2 (AINS2) ; data bit D0
Analog input AI22 selected
AINS2 = 0
Analog input AI21 selected
AINS2 = 1
Analog input select 3 (AINS3) ; data bit D1
Analog input AI32 selected
AINS3 = 0
Analog input AI31 selected
AINS3 = 1
Analog input select 4 (AINS4) ; data bit D2
Analog input AI42 selected
AINS4 = 0
Analog input AI41 selected
AIND4 =1
Analog function select (FUSE) ; data bits D4 and D3
FUSE1 = 0 ; FUSE0 = 0
FUSE1 = 0 ; FUSE0 = 0
Amplifier active
FUSE1 = 1 ; FUSE0 = 0
Amplifier plus anti-alias filter active
FUSE1 = 0 ; FUSE0 = 1
Analog input disable 2 (AIND2) ; data bit D5
Analog inputs 2 enabled
AIND2 = 0
Analog inputs 2 disabled
AIND2 = 1
Analog input disable 3 (AIND3) ; data bit D6
Analog inputs 3 enabled
AIND3 = 0
Analog input 3 disabled
AIND3 = 1
Analog input disable 4 (AIND4); data bit D7
Analog inputs 4 enabled
AIND4 = 0
Analog input 4 disabled
AIND4 = 1
Amplifier plus anti-alias filter bypassed
XG-NV1U
64
8-8-2. Subaddress 21 (DATA BYTE 015 to 008)
Analog control #2
FUNCTION
CONTROL BITS
Reference select channel 2 (REFS2) ; data bit D0
Automatic clamping active
REFS2 = 0
Reference level selected
REFS2 = 1
Reference select channel 3 (REFS3) ; data bit D1
Automatic clamping active
REFS3 = 0
Reference level selected
REFS3 = 1
Reference select channel 4 (REFS4) ; data bit D2
Automatic clamping active
REFS4 = 0
Reference level selected
REFS4 = 1
MUXC select channel 24 (MS24) ; data bit D3
Analog MUX2 controlled by MX24
MS24 = 0
Analog MUX2 controlled by MUXC
MS24 = 1
Analog MUX2 control (MX24) ; data bits D5 and D4
Adder mode
MX241 = 0 ; MX240 = 0
Channel 2 on ; channel 4 off
MX241 = 0 ; MX240 = 1
Channel 2 off ; channel 4 on
MX241 = 1 ; MX240 = 0
Both channels off
MX241 = 1 ; MX240 = 1
MUXC select channel 34 (MS34) ; data bit D6
Analog MUX3 controlled by MX34
MS34 = 0
Analog MUX3 controlled by MUXC
MS34 = 1
Vertical blanking control off (VBCO) ; data bit D7
Vertical blanking on
VBCO = 0
Vertical blanking off
VBCO = 1
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