Panasonic KX-PX1EX Service Manual ▷ View online
25
KX-PX1EX
368
Y5 VDP-
CLKIN
Display pixel clock
input
input
Input the basic clock to generate
the display pixel clock output
the display pixel clock output
CPU_PP05
For HEAD Clock Gener-
ato
For generating the head
transfer clock
ato
For generating the head
transfer clock
in
13
N1 VDR[0]/
AVPP[16]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
N.C.
Not used
out
14
P1 VDR[1]AV
PP[17]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
N.C.
Not used
out
113
P2 VDR[2]/
AVPP[18]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
N.C.
Not used
out
204
P3 VDR[3]/
AVPP[19]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
N.C.
Not used
out
287
P4 VDR[4]/
AVPP[20]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
CL170
Not used
out
362
P5 VDR[5]/
AVPP[21]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
CL169
Not used
out
15
R1 VDR[6]/
AVPP[22]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
CL168
Not used
out
114
R2 VDR[7]/
AVPP[23]
R component out-
put/Cr component
output/GPIO
put/Cr component
output/GPIO
Video data output for display/
common use with GPIO
common use with GPIO
CL167
Not used
out
367
W5 VDVSYNC Vertical
synchro-
nous signal output
Synchronous signal output for
display
display
Head (STB#)_
VSYNC
VSYNC
For making Head Data
Strobe
Strobe
out
8
H1 VSS
GND
GND
GND
22
AB1 VSS
GND
GND
GND
37
AF12 VSS
GND
GND
GND
56
AA26 VSS GND
GND
GND
82
A20 VSS
GND
GND
GND
96
A6 VSS
GND
GND
GND
127
AE5 VSS
GND
GND
GND
195
E3 VSS
GND
GND
GND
203
N3 VSS
GND
GND
GND
223
AD12 VSS
GND
GND
GND
229
AD18 VSS
GND
GND
GND
233
AD22 VSS
GND
GND
GND
241
V24 VSS
GND
GND
GND
279
F4 VSS
GND
GND
GND
288
R4 VSS
GND
GND
GND
290
U4 VSS
GND
GND
GND
293
Y4 VSS
GND
GND
GND
305
AC13 VSS GND
GND
GND
306
AC14 VSS GND
GND
GND
308
AC16 VSS GND
GND
GND
312
AC20 VSS GND
GND
GND
318
Y23 VSS
GND
GND
GND
320
V23 VSS
GND
GND
GND
325
N23 VSS
GND
GND
GND
327
L23 VSS
GND
GND
GND
329
J23 VSS
GND
GND
GND
331
G23 VSS
GND
GND
GND
333
E23 VSS
GND
GND
GND
344
D13 VSS
GND
GND
GND
346
D11 VSS
GND
GND
GND
348
D9 VSS
GND
GND
GND
352
D5 VSS
GND
GND
GND
359
L5 VSS
GND
GND
GND
361
N5 VSS
GND
GND
GND
371
AB6 VSS
GND
GND
GND
373
AB8 VSS
GND
GND
GND
pin
No.
pin
assign
ment
Name of
the CPU
the CPU
terminal
VDE
VDD
Signal name
of the CPU
(IC3) on the
main board
Purpose of the signal
I/O
26
KX-PX1EX
375
AB10 VSS
GND
GND
GND
394
R22 VSS
GND
GND
GND
405
E21 VSS
GND
GND
GND
408
E18 VSS
GND
GND
GND
410
E16 VSS
GND
GND
GND
412
E14 VSS
GND
GND
GND
178
B17 WE#
Write
Enable
Assertion is made during the
write cycle
write cycle
CPWE#
IC5FROM_*W
E(WE#)
IC5FROM_*W
E(WE#)
for Flash ROM writing
ROM write
ROM write
out
pin
No.
pin
assign
ment
Name of
the CPU
the CPU
terminal
VDE
VDD
Signal name
of the CPU
(IC3) on the
main board
Purpose of the signal
I/O
27
KX-PX1EX
4.5.2.
Mechanical CPU for IC8
Pin
Signal Name
Standard function
Act.
Purpose
I/O
R/W
1
P60/SCL0
General port/I2C communication
clock
clock
-
I
2
C communication clock
I
R/W
2
P61/SDA0
General port/I
2
C communication
data
-
I
2
C communication data
IO
R/W
3
P62/ (FR_RST#)
General port
L
Reset signal to each FRV of the MAIN and IP
"L": Reset
"L": Reset
O
W
4
P63/
(HEAD_THRM_ER
R)
(HEAD_THRM_ER
R)
General port
-
Detection of abnormal Head temperature (ther-
mistor voltage 3V)
mistor voltage 3V)
I
R
5
P33/ (FANON)
General port/interruption/timer
L
Fan ON/OFF (L: ON)
O
W
6
P75/ (CASRSV)
General port
-
Not used
I
R
7
P74/(CAS1)
General port
-
CAS1, CAS0
→ 00: Wide, 01: K size, 10: L
size, 11: no cassette
I
R
8
P73/ (CAS0)
General port
-
I
R
9
P72/ (INKRSV)
General port
-
Not used
I
R
10
P71/(INK1)
General port
-
INK1, INK0
→ 00: Wide, 01: L size, 10: K size,
11: no cassette
I
R
11
P70/ (NK0)
General port
-
I
R
12
P32/INTP3
General port/interruption
L
PX1/PX10 KEY_POWER "L":ON
I
R
13
P31/INTP2
General port/interruption
L
IP_DETECT "L": detection
I
R
14
P30/INTP1
(FRIRQ#)
(FRIRQ#)
General port/interruption
L
Print_CPU interruption (interruption input)
I
R
15
P17/ (MDM2) IN2
General port/timer
-
MD motor control IN2, IN1
→ 11: Break, 01:
Down, 10: Up, 00: Stop
O
W
16
P16/ (MDM1) N1
General port/interruption/timer
-
O
W
17
P15/TOH (PSM-
VREF)
VREF)
General port/timer
-
Vref setting of the PS motor (PWM output)
O
W
18
P14/RxD6
(RXD78K)
(RXD78K)
General port/serial IF
-
Serial communication received data (for writing
FROM)
FROM)
I
R
19
P13/TxD6
(TXD78K)
(TXD78K)
General port/serial IF
-
Serial communication transmitted data (for writ-
ing FROM)
ing FROM)
O
W
20
P12/ (PSM2) IN2
General port/serial IF
-
PS motor control IN2, IN1
→ 11: Break, 01:
Paper feeding, 10: Pullback, 00: Stop
O
W
21
P11/ (PSM1) IN1
General port/serial IF
-
O
W
22
P10/ (PSMSPD)
General port/serial IF
-
Not used(10k Pull-UP)
O
W
23
AVREF
Analog reference voltage
-
24
AVSS
Analog GND
-
25
P27/ANI7 (INK-
BAND)
BAND)
General port/analog input
A
Ink band detection (analog input)
I
R
26
P26/ANI6 (PTOP)
General port/analog input
A
Paper top detection (analog input)
I
R
27
P25/ANI5 (THRM) General port/analog input
A
Thermal head temperature detection (analog
input)
input)
I
R
28
P24/ANI4
General port/analog input
A
FAN error detection Voltage drop detection
(analog input)
(analog input)
I
R
29
P23/ANI3
General port/analog input
A
3.3V detection in the IP system (analog input)
(detect in the High mode)
(detect in the High mode)
I
R
30
P22/ANI2
General port/analog input
A
3.3V detection in the MAIN system (analog
input) (detect in the High mode)
input) (detect in the High mode)
I
R
31
P21/(MDSEN)
General port/analog input
A
MODE sensor
I
R
32
P20/(MDINI)
General port/analog input
A
MODE initial detection (0: home position)
I
R
33
P130/ (VTHON)
General port
H
VTH ON/OFF Control "H": ON
Output “L” at the time of power on and resetting
78K to avoid the instantaneous on-state of Vth.
Output “L” at the time of power on and resetting
78K to avoid the instantaneous on-state of Vth.
O
W
34
P01/TI010
General port/timer
-
Remote Control Input signal (Capture interrup-
tion control)
tion control)
I
R
35
P00/TI000
(FGSEN)
(FGSEN)
General port/timer
-
FG sensor (input capture)
I
R
36
P140/INTP6
(PWRON)
(PWRON)
General port/interruption
H
Power ON/OFF Control
78K
78K
→ ON/OFF control of DC/DC (3.3/1.4V)
"0": FOFF / "1": FON
Take the FRV port and the OR gate from the
design prototype
Take the FRV port and the OR gate from the
design prototype
O
W
37
P120/
(FGSENRSV)
(FGSENRSV)
General port/interruption
-
FG sensor interruption detection (Main control
of the FG sensor)
of the FG sensor)
I
R
38
P41/ (78KIRQ1#)
General port
L
Interruption request 1_Reserved (to the Print
CPU)
CPU)
O
W
28
KX-PX1EX
39
P40/ (78KIRQ0#)
General port
L
Interruption request 0 (to the Print CPU)
O
W
40
*RESET
Reset input
L
ICE_RESET
Reset input signal from the MAIN microcom-
puter
Reset input signal from the MAIN microcom-
puter
I
41
P124/(SYS_ERR) General port
L
SYS_ERR
When control of the ERROR_LED is disabled
due to a problem with the MAIN microcom-
puter, the lighting control of ERROR_LED is
performed by the SUB microcomputer
When control of the ERROR_LED is disabled
due to a problem with the MAIN microcom-
puter, the lighting control of ERROR_LED is
performed by the SUB microcomputer
O
R
42
P123(iPOWER-
OFF)
OFF)
General port
H
POWER OFF request “H”: Enable (a request is
made)/ ”L” : Disable
Output a power off request to the CPU for the
display control system of PX10
made)/ ”L” : Disable
Output a power off request to the CPU for the
display control system of PX10
O
R
43
FLMD0
Programming mode
H
Flash write mode inside 78K (during writing:
High)
High)
I
44
P122/X2
General port/oscillation
-
Clock oscillator (10MHz)(10MHz)
O
45
P121/X1
General port/oscillation
-
Clock oscillator (10MHz)(10MHz)
I
46
REGC
Built-in regulator
Condenser terminal for the inside power supply
regulator
regulator
-
47
VSS
GND
GND
-
48
VDD
Power supply
3.3v power supply
-
Pin
Signal Name
Standard function
Act.
Purpose
I/O
R/W
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