Panasonic KX-NSX1000 / KX-NSX2000 (serv.man2) Service Manual ▷ View online
81
KX-NSX1000/KX-NSX2000
N20
O
Test pin for debug
N21
O
Test pin for debug
N22
O
Test pin for debug
P1
GXB_TX1N
O
OPEN
P2
GXB_TX1P
O
OPEN
P3
-
Connect to 2.5V
P4
MSEL3
I
Conect to 2.5V
P5
MSEL1
I
GND
P6
-
Connect to 1.2V
P7
-
Connect to 2.5V
P8
-
Connect to 1.2V
P9
-
GND
P10
I/O
OPEN
P11
-
GND
P12
-
Connect to 1.2V
P13
CEX_WDT
I/O
Device Clear input (unused)
P14
I/O
OPEN
P15
I/O
OPEN
P16
-
GND
P17
-
Connect to 1.2V
P18
-
GND
P19
-
Connect to 3.3V
P20
I/O
OPEN
P21
-
GND
P22
O
Test pin for debug
R1
-
GND
R2
-
GND
R3
-
Connect to 2.5V
R4
-
Connect to 1.2V
R5
I
Connect to 2.5V
R6
-
GND
R7
-
Connect to 1.2V
R8
nSTATUS
O
Pull up
R9
I/O
OPEN
R10
I/O
OPEN
R11
I/O
OPEN
R12
-
GND
R13
I/O
OPEN
R14
I/O
OPEN
R15
I/O
OPEN
R16
I/O
OPEN
R17
I/O
OPEN
R18
-
Connect to 3.3V
R19
DSP#1_CARD_ID[4]
I
DSP#1 CARD ID Bit4
R20
DSP#1_CARD_ID[5]
I
DSP#1 CARD ID Bit5
R21
DSP#1_CARD_ID[6]
I
DSP#1 CARD ID Bit6
R22
O
Test pin for debug
T1
GXB_RX1N
I
GND with other pin by register
T2
GXB_RX1P
I
GND with other pin by register
T3
-
Connect to 1.2V
T4
-
GND
T5
-
Connect to 2.5V
T6
I
Connect to 2.5V
T7
I/O
OPEN
T8
I/O
OPEN
T9
I/O
OPEN
T10
-
Connect to 1.2V
T11
I/O
OPEN
T12
-
Connect to 1.2V
T13
I/O
OPEN
T14
I/O
OPEN
T15
I/O
OPEN
T16
I/O
OPEN
T17
I/O
OPEN
T18
I/O
OPEN
T19
DSP#1_CARD_ID[0]
I
DSP#1 CARD ID Bit0
T20
DSP#1_CARD_ID[1]
I
DSP#1 CARD ID Bit1
Pin No.
Signal Name
I/O
Function
82
KX-NSX1000/KX-NSX2000
T21
DSP#1_CARD_ID[2]
I
DSP#1 CARD ID Bit2
T22
DSP#1_CARD_ID[3]
I
DSP#1 CARD ID Bit3
U1
-
GND
U2
-
GND
U3
-
GND
U4
-
Connect to 1.2V
U5
CONF_DONE
O
Pull up
U6
PLL5_CLKOUTP
I/O
OPEN
U7
PLL6_CLKOUTP
I/O
OPEN
U8
-
Connect to 3.3V
U9
-
Connect to 3.3V
U10
-
GND
U11
-
Connect to 3.3V
U12
I/O
OPEN
U13
-
Connect to 3.3V
U14
I/O
OPEN
U15
I/O
OPEN
U16
-
Connect to 1.2V
U17
-
GND
U18
I/O
OPEN
U19
-
Connect to 2.5V
U20
DSP#1_TDM0_CK_DSP
O
DSP#1 TDM Bus 0 clock output
U21
-
GND
U22
DSP#1_TDM0_DX_DSP
O
DSP#1 TDM Bus 0 Data output
V1
CEX_PCIE_RX2_N_FPGA
O
PCI Express Recieve Input
V2
CEX_PCIE_RX2_P_FPGA
O
PCI Express Recieve Input
V3
-
Connect to 1.2V
V4
-
Connect to 2.5V
V5
-
GND
V6
PLL5_CLKOUTN
I/O
OPEN
V7
PLL6_CLKOUTN
I/O
OPEN
V8
-
GND
V9
I/O
OPEN
V10
-
Connect to 3.3V
V11
-
GND
V12
-
Connect to 3.3V
V13
I/O
OPEN
V14
-
GND
V15
-
Connect to 3.3V
V16
-
Connect to 3.3V
V17
-
Connect to 3.3V
V18
-
Connect to 1.2V
V19
-
GND
V20
DSP#1_TDM0_FS_DSP
O
DSP#1 TDM Bus 0 Frame Sync
V21
DSP#1_D[0]
I/O
DSP#1 Data Bus Bit0
V22
DSP#1_TDM0_RX_DSP
I
DSP#1 TDM Bus 0 Data input
W1
-
GND
W2
-
GND
W3
-
Connect to 2.5V
W4
I/O
OPEN
W5
L2SW#1_P1_YELLOW
O
L2SW#1 P1 Yellow LED drive signal
W6
L2SW#1_C1_LED_FPGA
I
L2SW#1 C1 LED signal input
W7
FPGA_RESETn_L2SW#2
O
Reset signal for L2SW#2
W8
FPGA_INIT_DONE
O
FPGA configuration done signal
W9
L2SW#2_P3_YELLOW
O
L2SW#2 P3 Yellow LED drive signal
W10
I/O
OPEN
W11
FPGA_L2SW#2_MDC
O
MDC output for L2SW#2
W12
FPGA_CLK_25M_L2SW
O
25MHz clock output for L2SW
W13
DSP#1_nINT_DSP1
I
Interrupt signal from DSP#1/DSP1
W14
DSP#1_DSP_nRST
O
Reset signal for DSP#1
W15
DSP#1_A[6]
O
DSP#1 Address Bus Bit6
W16
VREFB4N1
I/O
OPEN
W17
DSP#1_A[1]
O
DSP#1 Address Bus Bit1
W18
DSP#1_D[15]
I/O
DSP#1 Data Bus Bit15
W19
DSP#1_D[11]
I/O
DSP#1 Data Bus Bit11
W20
DSP#1_D[3]
I/O
DSP#1 Data Bus Bit3
W21
DSP#1_D[2]
I/O
DSP#1 Data Bus Bit2
Pin No.
Signal Name
I/O
Function
83
KX-NSX1000/KX-NSX2000
W22
DSP#1_D[1]
I/O
DSP#1 Data Bus Bit1
Y1
CEX_PCIE_TX2_N_FPGA
I
PCI Express Transmit data -
Y2
CEX_PCIE_TX2_P_FPGA
I
PCI Express Transmit data +
Y3
NC
-
NC
Y4
FPGA_L2SW#1_MDIO_DIR
O
Direction control signal for L2SW#1 MDIO buffer
Y5
L2SW#1_P0_GREEN
O
L2SW#1 P0 Green LED drive signal
Y6
L2SW#1_INTn_FPGA
I
Interrupt signal from L2SW#1
Y7
L2SW#1_P1_LED_FPGA
I
L2SW#1 P1 LED signal input
Y8
L2SW#2_C1_LED_FPGA
I
L2SW#2 C1 LED signal input
Y9
L2SW#2_P4_LED_FPGA
I
L2SW#2 P4 LED signal input
Y10
L2SW#2_P4_GREEN
O
L2SW#2 P4 Green LED drive signal
Y11
FPGA_L2SW#2_MDIO
I/O
L2SW#2 MDIO input/output
Y12
FPGA_CLK_25M_LANC
O
25MHz clock for LANC
Y13
DSP#1_nINT_DSP0
I
interrupt signal from DSP#1/DSP0
Y14
DSP#1_nRST_PORT_PHY
O
DSP#1 PHY reset signal
Y15
DSP#1_A[7]
O
DSP#1 Address Bus Bit7
Y16
DSP#1_A[3]
O
DSP#1 Address Bus Bit3
Y17
DSP#1_nRD
O
DSP#1 Read Enable
Y18
DSP#1_nBE0
O
DSP#1 Lower Byte Enable
Y19
DSP#1_D[12]
I/O
DSP#1 Data Bus Bit12
Y20
DSP#1_D[8]
I/O
DSP#1 Data Bus Bit8
Y21
-
GND
Y22
DSP#1_CARDID_nOE
O
DSP#1 CARD ID Output Enable
Pin No.
Signal Name
I/O
Function
84
KX-NSX1000/KX-NSX2000
15.1.2.
IC15/16 (L2SW I/O Signal)
Network 10/100/1000 PHY Interface(Port 0 to 4)
Port Status LEDs(Ports o to 4)
Pin No.
Signal Name
I/O
Function
63
P4_MDIP[0]
I/O
Media Dependent Interface[0]
53
P3_MDIP[0]
I/O
31
P2_MDIP[0]
I/O
21
P1_MDIP[0]
I/O
11
P0_MDIP[0]
I/O
62
P4_MDIN[0]
I/O
52
P3_MDIN[0]
I/O
30
P2_MDIN[0]
I/O
20
P1_MDIN[0]
I/O
10
P0_MDIN[0]
I/O
60
P4_MDIP[1]
I/O
Media Dependent Interface[1]
50
P3_MDIP[1]
I/O
28
P2_MDIP[1]
I/O
18
P1_MDIP[1]
I/O
8
P0_MDIP[1]
I/O
59
P4_MDIN[1]
I/O
49
P3_MDIN[1]
I/O
27
P2_MDIN[1]
I/O
17
P1_MDIN[1]
I/O
7
P0_MDIN[1]
I/O
58
P4_MDIP[2]
I/O
Media Dependent Interface[2]
48
P3_MDIP[2]
I/O
26
P2_MDIP[2]
I/O
16
P1_MDIP[2]
I/O
6
P0_MDIP[2]
I/O
57
P4_MDIN[2]
I/O
47
P3_MDIN[2]
I/O
25
P2_MDIN[2]
I/O
15
P1_MDIN[2]
I/O
5
P0_MDIN[2]
I/O
55
P4_MDIP[3]
I/O
Media Dependent Interface[3]
45
P3_MDIP[3]
I/O
23
P2_MDIP[3]
I/O
13
P1_MDIP[3]
I/O
3
P0_MDIP[3]
I/O
54
P4_MDIN[3]
I/O
44
P3_MDIN[3]
I/O
22
P2_MDIN[3]
I/O
12
P1_MDIN[3]
I/O
2
P0_MDIN[3]
I/O
Pin No.
Signal Name
I/O
Function
124
P4_LED
O
Parallel multiplexed LED Outputs-one for each PHY port.
123
P3_LED
121
P2_LED/LED_SEL[1]
120
P1_LED/LED_SEL[0]
119
P0_LED/JUMBO
1
EE_DOUT/EE_IO/
C3_LED
C3_LED
I/O
Serial EEPROM data out from a 4-wire EEPROM device or Serial EEPROM
data I/O to/from a 2wire EEPROM device and Column 3 for the LEDs.
data I/O to/from a 2wire EEPROM device and Column 3 for the LEDs.
128
EE_CS/C2_LED/
EE_WE
EE_WE
O
Serial EEPROM chip select and Column 2 for the LEDs.
126
EE_CLK/C1_LED/
FD_FLOW
FD_FLOW
O
Serial EEPROM clock and Column 1 for the LEDs.
125
EE_DIN/C0_LED/
HD_FLOW
HD_FLOW
O
Serial EEPROM data into the 4-wire EEPROM devices and Column 0 for the
LEDs.
LEDs.
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