Panasonic KX-NSX1000 / KX-NSX2000 (serv.man2) Service Manual ▷ View online
69
KX-NSX1000/KX-NSX2000
12.3.7.
DSP TDM Highway bus signal
12.3.8.
FPGA Configuration ROM Interface
Signal name
(Test Point)
Waveform
Signal name
(Test Point)
Waveform
DSP#1_TDM0_CK_DSP
(CN9 – 73pin)
(CN9 – 73pin)
DSP#1_TDM0_FS_DSP
(CN9 – 72pin)
(CN9 – 72pin)
DSP#1_TDM0_DX_DSP
(CN9 – 70pin)
(CN9 – 70pin)
DSP#1_TDM0_RX_DSP
(CN9 – 71pin)
(CN9 – 71pin)
No.061
DSP#1_TDM0_FS_DSP
(CN9 – 72pin)
(CN9 – 72pin)
No.062
DSP#1_TDM0_CK_DSP
(CN9 – 73pin)
(CN9 – 73pin)
No.063
2v/div
200ns/div
500m
v/div
40ns/div
VIH=2.0V
VIL=0.8V
500m
v/div
100ns/div
VIH=2.0V
VIL=0.8V
Signal name
(Test Point)
Waveform
Signal name
(Test Point)
Waveform
CS to DCLK
CS
(IC20 – 7pin)
(IC20 – 7pin)
DCLK
(IC20 – 16pin)
(IC20 – 16pin)
SI
(IC20 – 15pin)
(IC20 – 15pin)
SO
(IC20 – 8pin)
(IC20 – 8pin)
No.071
SI to DCLK
CS
(IC20 – 7pin)
(IC20 – 7pin)
DCLK
(IC20 – 16pin)
(IC20 – 16pin)
SI
(IC20 – 15pin)
(IC20 – 15pin)
SO
(IC20 – 8pin)
(IC20 – 8pin)
No.072
SO to DCLK
CS
(IC20 – 7pin)
(IC20 – 7pin)
DCLK
(IC20 – 16pin)
(IC20 – 16pin)
SI
(IC20 – 15pin)
(IC20 – 15pin)
SO
(IC20 – 8pin)
(IC20 – 8pin)
No.074
DCLK
(IC20 – 16pin)
(IC20 – 16pin)
No.073
10ns/div
1V/div
70
KX-NSX1000/KX-NSX2000
12.3.9.
FPGA MOH Flash Interface
10ns/div
2v/div
10ns/div
2v/div
10ns/div
2v/div
Signal name
(Test Point)
Waveform
Signal name
(Test Point)
Waveform
SCLK
(IC18 – 6pin)
(IC18 – 6pin)
No.081
SI hold
CS
(IC18 – 1pin)
(IC18 – 1pin)
SCLK
(IC18 – 6pin)
(IC18 – 6pin)
SI
(IC18 – 5pin)
(IC18 – 5pin)
SO
(IC18 -2pin)
(IC18 -2pin)
No.084
SO setup
CS
(IC18 – 1pin)
(IC18 – 1pin)
SCLK
(IC18 – 6pin)
(IC18 – 6pin)
SI
(IC18 – 5pin)
(IC18 – 5pin)
SO
(IC18 -2pin)
(IC18 -2pin)
No.085
Read timing
CS
(IC18 – 1pin)
(IC18 – 1pin)
SCLK
(IC18 – 6pin)
(IC18 – 6pin)
SI
(IC18 – 5pin)
(IC18 – 5pin)
SO
(IC18 -2pin)
(IC18 -2pin)
No.082
SO hold
CS
(IC18 – 1pin)
(IC18 – 1pin)
SCLK
(IC18 – 6pin)
(IC18 – 6pin)
SI
(IC18 – 5pin)
(IC18 – 5pin)
SO
(IC18 -2pin)
(IC18 -2pin)
No.086
SI setup
CS
(IC18 – 1pin)
(IC18 – 1pin)
SCLK
(IC18 – 6pin)
(IC18 – 6pin)
SI
(IC18 – 5pin)
(IC18 – 5pin)
SO
(IC18 -2pin)
(IC18 -2pin)
No.083
10ns/div
1v/div
10ns/div
2v/div
71
KX-NSX1000/KX-NSX2000
12.3.10. L2SW MDIO
12.3.11. L2SW RGMII
100ns/div
500mv/
d
iv
1v/div
200ns/div
Ts=200ns
Th=210ns
200ns/div
Ts=200ns
Th=200ns
1v/div
Signal name
(Test Point)
Waveform
Signal name
(Test Point)
Waveform
MDC
L2SW#1 MDC
(IC15 70pin)
(IC15 70pin)
No.091
Read timing
FPGA_
L2SW#1_MDIO
(IC42 – 3pin)
L2SW#1_MDIO
(IC42 – 3pin)
FPGA_
L2SW#1_MDC
(IC47 – 1pin)
L2SW#1_MDC
(IC47 – 1pin)
No.092
Write timing
FPGA_
L2SW#1_MDIO
(R638)
L2SW#1_MDIO
(R638)
FPGA_L2SW#1_
MDC_1R8V
(R639)
MDC_1R8V
(R639)
No.093
Signal name
(Test Point)
Waveform
Signal name
(Test Point)
Waveform
L2SW#2_P5_
RGMII_TXC
(IC15 – 108pin)
RGMII_TXC
(IC15 – 108pin)
L2SW#2_P5_
RGMII_TX_CTRL
(IC15 – 109pin)
RGMII_TX_CTRL
(IC15 – 109pin)
L2#2_P5_
RGMII_TXD[0]
(IC15 – 111pin)
RGMII_TXD[0]
(IC15 – 111pin)
No.101
L2SW#1_P6_
RGMII_TXC
(IC15 – 105pin)
RGMII_TXC
(IC15 – 105pin)
L2SW#1_P6_
RGMII_TX_CTRL
(IC15 – 104pin)
RGMII_TX_CTRL
(IC15 – 104pin)
L2#1_P6_
RGMII_TXD[0]
(IC16 – 88pin)
RGMII_TXD[0]
(IC16 – 88pin)
No.102
L2SW#1_P5_
RGMII_TXC
(IC16 – 108pin)
RGMII_TXC
(IC16 – 108pin)
L2SW#1_P5_
RGMII_TX_CTRL
(IC16 – 109pin)
RGMII_TX_CTRL
(IC16 – 109pin)
L2#1_P5_
RGMII_TXD[0]
(IC16 - 111pin)
RGMII_TXD[0]
(IC16 - 111pin)
No.104
L2SW#2_P6_
RGMII_TXC
(IC16 – 105pin)
RGMII_TXC
(IC16 – 105pin)
L2SW#2_P6_
RGMII_TX_CTRL
(IC16 – 104pin)
RGMII_TX_CTRL
(IC16 – 104pin)
L2#2_P6_
RGMII_TXD[0]
(IC15 - 88pin)
RGMII_TXD[0]
(IC15 - 88pin)
No.103
1V/div
4ns/div
1V/div
4ns/div
1V/div
4ns/div
1V/div
4ns/div
72
KX-NSX1000/KX-NSX2000
12.3.12. Power Supply Board
339V(DC) (@AC240Vin)
11 s
14.5V
AC 240Vin
11 s
500V
AC 240Vin
(1)
15.8V(DC)
(2)
32V(DC)
(5)
27V(DC)
(7)
(3)
(4)
3.3 s
32V
(6)
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