Sony KE-37XS910 / KE-42XS910 / KE-MX37A1 / KE-MX37N1 / KE-MX37S1 Service Manual ▷ View online
– 1 –
1 OUTLINE
The module is a plasma display module which can be designed in there is no fan in addition to a
general feature of the plasma display such as a flat type, lightness, and high-viewing-angle and
terrestrial magnetism.
general feature of the plasma display such as a flat type, lightness, and high-viewing-angle and
terrestrial magnetism.
1.1 PANEL DIMENSION
1.2 FEATURE
1. For high definition television by ALIS method
2. For FAN Less design(Low consumption electric power)
3. Flat type・Lightness
4. Customizing of module equipped with communication function
921.6
994
585
522.24
Pixel pitch(horizontal)
Sub- pixel pitch(horizontal)
0.90mm
0.30mm
0.
51 mm
Pi
xe
lp
itc
h(
V
e
rt
ic
a
l)
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
– 2 –
1.3 SPECIFICATION
1.3.1
Functional specification
Specification
Item
NO
UC-5X
Module size
1
994 × 585 × 66mm
Externals
Weight
2 16kg
Display size
3
921.60 × 522.24mm
(42inch: 16:9)
Resolution
4
1024 × 1024 pixel
Pixel pitch
5
0.90(H) × 0.51(V)mm
Display panel
Sub pixel pitch
6
0.30(H) × 0.51(V)mm
Color Grayscale(standard)
7
RGB each color 256 Grayscale
White(display load Ratio 100%)
8 140cd/
m
2
BrightNess
White(display load Ratio 1%,standard)
9
(1000) cd/ m
2
Chromaticity
Coordinates
Coordinates
(x,y)、white 10%
10 (0.300,0.300)
Contrast
Contrast in Darkroom(60Hz)
11 (1000:1)
Video signal (RGB each color)
12 LVDS(10bit)
Data signal
Dot clock(max)
13 52MHz
Horizontal Sync Signal(max)
14 50KHz(LVDS)
Sync Signal
Vertical Sync Signal
15
50Hz ± 1.9 / 60 ± 1.7Hz (LVDS)
Input voltage/current
16 +3.3/+5/+75-90/+50-65V
DC
,
0.05/6/4/2A
Powersupply
Standby electric power(max)
17 1W
Noise
Shade noise at 18dB(A) or less
18
25dB(A) or less
Temperature(operation)
19
0 ~ 45
°C
Temperature(storage)
20
0 ~ 45
°C
Humidity(operation)
21
20 ~ 85 %RH (no condensation)
Guarantee
environment
environment
Humidity(storage)
22
20 ~ 80 %RH (no condensation)
*It is made to give priority when there is a delivery specification according to the customer.
– 3 –
1.3.2
Display quality specification
Specification
Item
NO
UC-51 (Standard)
Total number (subpixel)
1
15 or less
Density (subpixel/cm
2
)
2
2 or less
(
However,1 continuousness or less)
Non-lighting cell
defect
defect
Size (H x V) (subpixel)
3
1x2 or less, Or 2x1 or less
Total number (subpixel)
4
6 or less(each color 2 or less)
Non-extinguishing
cell defect
cell defect
Density (subpixel/ cm
2
)
5
Each color 2 cells max
(
However,1 continuousness or less)
Flickering lighting cell defect
(sub pixel/cm
(sub pixel/cm
2
)
6
5 or less
Flickering cell defect
Flickering non-extinguishing cell defect
7
Number on inside of
Non-extinguishing cell defect
High intensity cell
defect
defect
Twice or more bright point
8 0
White block of 10% load [9 point] (%)
9
20 or less
Brightness variation
In area adjacent 20mm [White] (%)
10
10 or less
Color variation
White block of 10% load [9 point]
11
X: Average
± 0.015
y: Average
± 0.015
*It is made to give priority when there is a delivery specification according to the customer.
– 4 –
1.3.3
I/O Interface Specification
(1) I/O Signal
No.
Item
Signal Name
Number
of
signals
I/O
Form
Content of definition
Video Signal
Timing Signal
Timing Signal
RA-
RA+
RB-
RB+
RC-
RC+
RD-
RD+
RE-
RE+
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Input
LVDS
Differential
Differential serial data signal.
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal.
Input video and timing signals after
differential serial conversion using a
dedicated transceiver.
The serial data signal is transmitted
seven times faster than the base
signal.
Clock
RXCLKIN-
RXCLKIN+
1
1
1
Input
LVDS
Differential
Differential clock signal.
Input the clock signal after
differential conversion using a
dedicated transceiver.
The clock signal is transmitted at
the same speed as the base signal.
Input the clock signal after
differential conversion using a
dedicated transceiver.
The clock signal is transmitted at
the same speed as the base signal.
1
Di
sp
la
y d
a
ta
Power down
Signal
Signal
PDWN 1 Input
LVTTL
Low :LVDS receiver outputs are all
“L”.
High: Input signals are active.
“L”.
High: Input signals are active.
SDA 1 I/O
Communication
SCL 1
I/O
LVTTL
(I
2
C)
I
2
C bus serial data communication
signal.
Communication with the control
MPU of this product is enabled.
Communication with the control
MPU of this product is enabled.
CPUGO 1 Input
LVTTL
Low power consumption mode of
the control MPU of this product is
released.
the control MPU of this product is
released.
PDPGO 1 Input
LVTTL
“High”: This product is started.
(CPUGO=“High” Effective)
(CPUGO=“High” Effective)
2
M
P
U
C
o
mmunication / C
ontrol
Control
IRQ 1
Output
LVTTL
It changes into "Low"
→ "High"
when this product enters the
undermentioned state.
1. Vcc/Va/Vs output decrease
2. Circuit abnormality detection
undermentioned state.
1. Vcc/Va/Vs output decrease
2. Circuit abnormality detection
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