Sony KE-37XS910 / KE-42XS910 / KE-MX37A1 / KE-MX37N1 / KE-MX37S1 Service Manual ▷ View online
– 21 –
Setting [hex]
Sub
Address
Data
bit
Symbol
Item
Function
RANGE
INITIAL
value
7-5
-
<no use>
-
40
4-0
GAM08
[12: 8]
00~FF 03
7-2
GAM08
[7: 2]
Reverse
γ
correction 08
Reverse
γ coefficient value is set.
Input Output value of 64 [LSB]
41
1-0
-
<no use>
-
00~FF 04
7-6
-
<no use>
-
42
5-0
GAM09
[13: 8]
00~FF 04
7-4
GAM09
[7: 4]
Reverse
γ
correction 09
Reverse
γ coefficient value is set.
Input Output value of 80 [LSB]
43
3-0
-
<no use>
-
00~FF F0
7-6
-
<no use>
-
44
5-0
GAM11
[13: 8]
00~FF 07
7-4
GAM11
[7: 4]
Reverse
γ
correction 10
Reverse
γ coefficient value is set.
Input Output value of 96 [LSB]
45
3-0
-
<no use>
-
00~FF 60
7-6
-
<no use>
-
46
5-0
GAM11
[13: 8]
00~FF 0A
7-4
GAM11
[7: 4]
Reverse
γ
correction 11
Reverse
γ coefficient value is set.
Input Output value of 112 [LSB]
47
3-0
-
<no use>
-
00~FF 50
7-6
-
<no use>
-
48
5-0
GAM12
[13: 8]
00~FF 0D
7-4
GAM12
[7: 4]
Reverse
γ
correction 12
Reverse
γ coefficient value is set.
Input Output value of 128 [LSB]
49
3-0
-
<no use>
-
00~FF D0
7-6
-
<no use>
-
4A
5-0
GAM13
[13: 8]
00~FF 16
7-4
GAM13
[7: 4]
Reverse
γ
correction 13
Reverse
γ coefficient value is set.
Input Output value of 160 [LSB]
4B
3-0 -
<no
use> -
00~FF A0
7-6
-
<no use>
-
4C
5-0
GAM14
[13: 8]
00~FF 21
7-4
GAM14
[7: 4]
Reverse
γ
correction 14
Reverse
γ coefficient value is set.
Input Output value of 192 [LSB]
4D
3-0
-
<no use>
-
00~FF E0
7-6
-
<no use>
-
4E
5-0
GAM15
[13: 8]
00~FF 2F
7-4
GAM15
[7: 4]
Reverse
γ
correction 15
Reverse
γ coefficient value is set.
Input Output value of 224 [LSB]
4F
3-0
-
<no use>
-
00~FF 90
7
-
<no use>
-
50
6-0
GAM16
[14: 8]
00~FF 40
7-5
GAM16
[7: 5]
Reverse
γ
correction 16
Reverse
γ coefficient
Input Output value of 256 [LSB]
51
4-0
-
<no use>
-
00~FF 00
– 22 –
Setting [hex]
Sub
Address
Data
bit
Symbol
Item
Function
RANGE
INITIAL
value
E5 7-0
UVrs
USER
Vrs
Setting Vrs voltage Standard
equation: Vrs=2.99*UVrs/255
equation: Vrs=2.99*UVrs/255
00~AA
Adjusted
in factory
in factory
E6 7-0
UVra
USER
Vra
Setting Vra voltage Standard
equation: Vra=2.99*UVra/255
equation: Vra=2.99*UVra/255
00~AA
Adjusted
in factory
in factory
7-3
－
－
Be sure to use the display with the
setting fixed to 0.
setting fixed to 0.
0 0
2 RCLVr
UVrs/UVra
RECALL
Resetting the UVrs, UVra in both of
register and EEPROM to the initial
value by setting RCLVr to 1.
register and EEPROM to the initial
value by setting RCLVr to 1.
This setting automatically returns to
0 after resetting the UVrs,Uvra.
0 after resetting the UVrs,Uvra.
0:Normal
1: UVrs,UVra
initialized
0
1 EWRVr
UVrs/UVra
Write
Storing the UVrs,UVra in register
to EEPROM by setting EWRVr to 1.
to EEPROM by setting EWRVr to 1.
This setting automatically returns to
0 after resetting the UVrs,UVra.
0 after resetting the UVrs,UVra.
0:Normal
1: UVrs,UVra
stored in EEPROM
0
FE
0
－
－
Be sure to use the display with the
setting fixed to 0.
setting fixed to 0.
0 0
7-1
－
－
Be sure to use the display with the
setting fixed to 0.
setting fixed to 0.
0 0
FF
0 DSET
Data
setup
When the DSETEN setting is 1,
setting this bit causes all the register
setups that have been set up to now,
to be reflected to the operation status
of this product. They are reflected
from the next field after this bit is
accepted.
setting this bit causes all the register
setups that have been set up to now,
to be reflected to the operation status
of this product. They are reflected
from the next field after this bit is
accepted.
0: Normal
1: Execute
0
– 23 –
3.3.2
Function of X-SUS Board
(1) DC/DC power supply block
Vs (+85V) → Vw (+185V) / Vx (+55V)
Vcc (+5V) → XFve (+18V, floating) / Ve (+17V)
(2) X switching block
Switching during address period
Switching during sustain period
Switching during reset period
(3) Current detector block
Isx (sustain) current detection
Iax (address) current detection
(4) Voltage detector block
Vs (sustain) voltage detection
Va (address) voltage detection
3.3.3
Function of Y-SUS Board
(1) DC/DC power supply block
Vcc (+5V) →YFve (+18V, floating) / Ve (+17V)
(2) Switching block
Switching during address period
Switching during sustain period
Switching during reset period
(3) Current detector block
Isy (sustain) current detection
Isp (SDM) current detection
– 24 –
3.4 PROTECTION FUNCTION
State of protection operation
(√:State change、
、
、
、
There is no change at the blank.)
Reactivation
condition when
abnormal content
is excluded
Abnormality part
State
Vw,
Vx
Vs
Va Vex Vey Vcc Vpr
Va
ux
ux
AC
Re-turn
ing on
PFCgo
Reset
Overvoltage Stop(no
latch)
√
√
√
√
√
√
√
Vw
Overcurrent Delay
Latch
√
√
√
√
√
√
√
Yes Yes
Overvoltage Stop(no
latch)
√
√
√
√
√
√
√
Yes Yes
Vx
Overcurrent Delay
Latch
√
√
√
√
√
√
√
Yes Yes
Overvoltage Latch
√
√
√
√
√
√
√
Yes Yes
Low voltage
Latch
√
√
√
√
√
√
√
Yes Yes
Vs
Overcurrent Delay
Latch
√
√
√
√
√
√
√
Yes Yes
Overvoltage Latch
√
√
√
√
√
√
√
Yes Yes
Low voltage
Latch
√
√
√
√
√
√
√
Yes Yes
Va
Overcurrent Delay
Latch
√
√
√
√
√
√
√
Yes Yes
Overvoltage Stop(no
latch) √
√
√
√
√
√
√
Yes Yes
Vex
Vey
Overcurrent
Voltage
pendency(no
latch)
pendency(no
latch)
√
√
√
√
√
√
√
Yes Yes
Overvoltage Latch
√
√
√
√
√
√
√
Yes Yes
Vcc
Overcurrent Delay
Latch
√
√
√
√
√
√
√
Yes Yes
Overvoltage Latch
√
√
√
√
√
√
√
√
√
Yes
Vpr1
Overcurrent Delay
Latch
√
√
√
√
√
√
√
√
√
Yes
Vpr2 Overcurrent Delay
Latch
√
√
√
√
√
√
√
√
√
Yes
Overvoltage Latch
√
√
√
√
√
√
√
√
√
Yes
Vaux
Overcurrent
(Note 2)
(Note 2)
Voltage
pendency(no
latch)
pendency(no
latch)
√
√
√
√
√
√
√
PSU
Heat
sink
Heat
sink
Temperature Latch
√
√
√
√
√
√
√
√
√
Yes
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