DOWNLOAD Sony BDP-CX7000ES Service Manual ↓ Size: 9.16 MB | Pages: 127 in PDF or view online for FREE

Model
BDP-CX7000ES
Pages
127
Size
9.16 MB
Type
PDF
Document
Service Manual
Brand
Device
DVD
File
bdp-cx7000es.pdf
Date
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Sony BDP-CX7000ES Service Manual ▷ View online

BDP-CX7000ES
29
Holder (table sensor 400)
S tight,  screw 
(PTTWH3 
u 6)
Turn
400D table assy
Fig. 6
4. DISC  DETECT  SENSOR  ADJUSTMENT
This step is following “3. TABLE SENSOR ADJUSTMENT”.
This adjustment is using a long driver from the hole of the chassis 
(do not detach the chassis).
Procedure:
1.  The connection of the oscilloscope is confi rmed.
2.  It is confi rmed that there is no disk in the table, press the [
X
] 
button, and the table is rotated. 
3.  It is confi rmed that the waveforms like Fig. 7.
4.  The screw (PTTWH3X6) that is the fi xation of the bracket 
(sensor 400) is loosened (the screw is not detached).
5.  The bracket is moved right and left (refer to Fig. 8). Wave-
forms relative position changes, and adjusted that waveforms 
position becomes a center (refer to Fig. 9).
6.  The screw of step 4 is fi xed in the state of step 5. 
CHK_DSENS
CHK_HHOUT
CH2
CH1
Fig. 7
Holder (table sensor 400)
S tight,  screw 
(PTTWH3 
u 6)
Rotate
400D table assy
Fig. 8
CHK_HHOUT
CHK_DSENS
CH2
CH1
Should be at the center.
Fig. 9
5. SENSOR  LEVEL  ADJUSTMENT
This step is following “4. DISC DETECT SENSOR ADJUST-
MENT”.
Procedure:
1.  RV1001 on the IMD (ES) board (refer to page 26 “1-3. Wiring 
for adjustment”) is adjusted so that the width of the CHK_
DSENS signal may increase to twice that of CHK_HHOUT 
signal (refer to Fig. 10).
2.  Press the [
x
] button, the adjustment is end.
CHK_DSENS
CHK_HHOUT
CH2
CH1
A
A = 2 
u B
B
Fig. 10
BDP-CX7000ES
30
SECTION  5
ELECTRICAL  ADJUSTMENT
In making adjustment, adjustment related parts arrangement.
This section describes procedures and instructions necessary for 
adjusting electrical circuits in this set.
Instruments required:
1) Color monitor TV
2)  Oscilloscope 1 or 2 phenomena, band width over 100 MHz, 
with delay mode
3)  Standard commander (RM-ADP036)
ADJUSTMENT  OF  VIDEO  SYSTEM
1.  Composite Video Level Adjustment (VP-062EJ BOARD)
Mode
Video output test in service mode
Signal
Color bar
Test point
VIDEO OUT connector
（
75 
Ω terminated）
Instrument
Oscilloscope
Adjusting ele-
ment
RV701
Specifi cation
1.00 ± 0.05 Vp-p
Adjusting method:
1)  In the service mode initial menu [1] Diag 
→ Audio Video Test 
→ [ENT] Gen. TONE & Color Bar 
 
Video output test, set so that color bar are generated.
2)  Adjust the RV701 to attain 1.00 ± 0.05 Vp-p
1.00 ± 0.05 Vp-p
Fig. 1
Adjustment location:
2.  Component Video Output Y Adjustment (VP-062EJ BOARD)
Mode
Video output test in service mode
Signal
Color bar
Test point
VIDEO OUT connector
（
75 
Ω terminated）
Instrument
Oscilloscope
Adjusting ele-
ment
RV702
Specifi cation
1.00 ± 0.05 Vp-p
Adjusting method:
1)  In the service mode initial menu [1] Diag 
→ Audio Video Test 
→ [ENT] Gen. TONE & Color Bar 
 
Video output test, set so that color bar are generated.
2)  Adjust the RV702 to attain 1.00 ± 0.05 Vp-p
1.00 ± 0.05 Vp-p
Fig. 2
 
– VP-062EJ Board (Component Side) –
IC703
RV702
RV701
Component video output Y 
adjustment
Composite video level
adjustment
BDP-CX7000ES
BDP-CX7000ES
31
31
SECTION  6
DIAGRAMS
6-1.  BLOCK  DIAGRAM - BD/DVD Section -
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(Page 32)
(Page 33)
(Page 38)
(Page 33)
(Page 32)
BDP-CX7000ES
BDP-CX7000ES
32
32
6-2.  BLOCK  DIAGRAM - VIDEO CONTROL Section -
IC204
DIGITAL VIDEO FORMAT CONVERTER
IC401
FPGA
IC1002
LVDS DRIVER
IC1003
CLOCK
CONDITIONER
IC301
DDR SD-RAM
IC402
CONFIGURATION
ROM
IC105
BUFFER
DT1[8] – DT1[15]
HD0[10] – HD0[19]
DT1[0] – DT1[7]
E3P_HD
E3P_VD
E3P_VCK
GLUE_XCS
HDE1_XCS
E3P_CSI0_EDEN1_XCS
HDE2_XCS
E3P_CSI0_EDEN2_XCS
I2C_400k_SDA
I2C_400k_SCL
KYOTO_XRST
GLB_XRST
GLB_XRST
CEC
2 DATA
E3P_Y2 – 9
C656DT[0] – C656DT[7]
MAD[0] – MAD[11]
A0 – A7, A8(AP), A9 – A11
MDT[0] – MDT[6], MAD[7],
MDT[8] – MDT[11], MAD[12],
MDT[13], MAD[14],
MDT[15] – MDT[31] 
DQ0 – DQ31
HD0[0] – HD0[9]
E3P_C2 – 9
CSI_DO
12
OUT7
8 IN7
CSI_CK
14
OUT5
6 IN5
CSI_DI
9
IN8
11 OUT8
IC101
CLOCK BUFFER
DT1_HS
DT1_VS
DT1_CK
SDA
SCL
RESETZ
XTAL1
XTAL2
HDMI_HS
HDMI_VS
HDMI_CK
C656HS
C656VS
C656CK
DPCLK4
CLK0
DATA0
CLK3
C656FD
WEZ
CASZ
RASZ
CS1Z
CKE
CLKZ
CLK
/WE
/CAS
/RAS
/CS
CKE
/CK
CK
U13, U14
N4, M5
BA0, BA1
BA0, BA1
V3, V5, V7, V9
B2, H13, H2, B13
DQS[0] – DQS[3]
DQS0 – DQS3
X201
20MHz
DEV_CLRn 
SW3.3V
6 DCLK
DCLK
E3P_CSI0_DO
E3P_CSI0_CKO
E3P_CSI0_DI
1 nCS
nCSO
5 ASDI
ASDO
INT_DONE
X401
27MHz
2 DI1
5 DATAuWire
4 CLKuWire
DPCLK7
DPCLK2
6 LEuWire
12 LD
28 OSCIN
29 OSCIN*
7
DO1+
8
DO1-
IC1005
LVDS RECEIVER
5 OUT
17 CLKout1
18 CLKout1*
3
N+
4
N-
Q401, 402
INITIAL SWITCH
GLUE_EDEN1_HS
GLUE_EDEN1_VS
GLUE_EDEN1_VCK
GLUE_EDEN1_Y0 – 9
GLUE_EDEN1_C0 – 9
DPCLK1
GLUE_EDEN2_HS
GLUE_EDEN2_VS
GLUE_EDEN2_VCK
GLUE_EDEN2_Y0 – 9
GLUE_EDEN2_C0 – 9
GLUE_VDAC_HS
GLUE_VDAC_VS
GLUE_VDAC_VCK
GLUE_VDAC_V00 – 07
EDEN2_GLUE_HS
EDEN2_GLUE_VS
EDEN2_GLUE_VCK
GLUE_CSI0_DI
GLUE_CSI0_CKO
GLUE_CSI0_XCS
GLUE_CSI0_DO
G
A
F
I
K
J
H
48
29
28
47
49
50
54
68
52
SYSTEM CONTROLLER
IC1001 (1/4)
IM_SDI
CEC_IN
CEC_OUT
IM_SDO
IM_SCK
IM_CS
STERT_BIT
SYSCON_REQ
SYSCON_RST
EMMA_XRST
EMMA_XRST
CEC DATA SWITCH
Q5001 – 5004
nCONFIG
EMMA_CSI0_DO
EMMA_CSI0_CKO
D
E
L
IF_SDI
IF_SDO
IF_SCK
XIF_CS
IF_START_BIT
XIF_RST
A12
D10
B12
R18
P17
C5
B4
C4
V13
V14
R17
R13
T13
T12
U12
A16
B15
A15
B14
D18
E16
E15
C3
CONF_DONE
K17
V13
V12
U12
T12
J3
C4
D16
E16
E17
D18
D17
J16
H17
H18
H7
L1
J1
K6
J2
E5
V15
U14
U15
B5
D4
D8
D7
E7
A9
C9
D9
B8
A4
B4
U16
V10
U10
T10
F1
D1
D2
IC901
BUFFER
IC403
AND GATE
L3
L2
M2
N2
N12
M12
M11
8
8
10
10
8
10
8
10
10
10
: VIDEO
SIGNAL PATH
(Page 31)
(Page 34)
(Page 31)
(Page 35)
(Page 33)
(Page 33)
(Page 33)
(Page 33)
(Page 33)
(Page 33)
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