Sony XES-Z50 Service Manual ▷ View online
– 69 –
Pin No.
Pin Name
I/O
Function
39
SOA
O
40
SOB
O
41
VSS
—
Ground terminal
42
TST1
I
Input terminal for the test Not used (fixed at “L”)
43
TST2
I
Input terminal for the test Not used (fixed at “L”)
44
TST3
I
Input terminal for the test Not used (fixed at “L”)
45
TST4
I
Input terminal for the test Not used (fixed at “L”)
46
VDD
—
Power supply terminal (+3.3V)
47
TST5
I
Input terminal for the test Not used (fixed at “L”)
48
TST6
I
Input terminal for the test Not used (fixed at “L”)
49
VSS
—
Ground terminal
50
MD00
I/O
51
VSS
—
Ground terminal
52
MD01
I/O
53
MD02
I/O
54
MD03
I/O
55
VSS
—
Ground terminal
56
MD04
I/O
57
MD05
I/O
58
MD06
I/O
59
MD07
I/O
60
VDD
—
Power supply terminal (+3.3V)
61
VSS
—
Ground terminal
62
MD08
I/O
63
MD09
I/O
64
MD10
I/O
65
MD11
I/O
66
VDD
—
Power supply terminal (+3.3V)
67
MD12
I/O
68
MD13
I/O
69
MD14
I/O
70
MD15
I/O
71
VSS
—
Ground terminal
72
RAS
O
73
MA09
O
74
MA10
O
Address signal output terminal Not used (open)
75
MA11
O
76
VDD
—
Power supply terminal (+3.3V)
77
MA12
O
Address signal output terminal Not used (open)
Serial audio data output terminal
IC101: Serial data (for front speaker) output terminal
IC201: Serial data (for sub-woofer speaker) output terminal
IC101: Serial data (for front speaker) output terminal
IC201: Serial data (for sub-woofer speaker) output terminal
Serial audio data output terminal
IC101: Serial data (for rear speaker) output terminal
IC201: Not used (open)
IC101: Serial data (for rear speaker) output terminal
IC201: Not used (open)
IC101: Two-way data bus with the D-RAM (IC102)
IC201: Two-way data bus with the D-RAM (IC202)
IC201: Two-way data bus with the D-RAM (IC202)
IC101: Two-way data bus (LSB) with the D-RAM (IC102)
IC201: Two-way data bus (LSB) with the D-RAM (IC202)
IC201: Two-way data bus (LSB) with the D-RAM (IC202)
IC101: Two-way data bus with the D-RAM (IC102)
IC201: Two-way data bus with the D-RAM (IC202)
IC201: Two-way data bus with the D-RAM (IC202)
IC101: Two-way data bus with the D-RAM (IC102)
IC201: Two-way data bus with the D-RAM (IC202)
IC201: Two-way data bus with the D-RAM (IC202)
IC101: Two-way data bus with the D-RAM (IC102)
IC201: Two-way data bus with the D-RAM (IC202)
IC201: Two-way data bus with the D-RAM (IC202)
IC101: Two-way data bus (MSB) with the D-RAM (IC102)
IC201: Two-way data bus (MSB) with the D-RAM (IC202)
IC201: Two-way data bus (MSB) with the D-RAM (IC202)
IC101: Row address strobe signal output to the D-RAM (IC102)
IC201: Row address strobe signal output to the D-RAM (IC202)
IC201: Row address strobe signal output to the D-RAM (IC202)
– 70 –
Pin No.
Pin Name
I/O
Function
78
MA13
O
79
MA14
O
Address signal output terminal Not used (open)
80
MA15
O
81
VSS
—
Ground terminal
82
MA00
O
83
MA01
O
84
VSS
—
Ground terminal
85
MA02
O
86
MA03
O
87
VDD
—
Power supply terminal (+3.3V)
88
MA04
O
89
MA05
O
90
VSS
—
Ground terminal
91
VSS
—
Ground terminal
92
MA06
O
93
MA07
O
94
VSS
—
Ground terminal
95
MA08
O
96
MA16
O
Address signal output terminal Not used (open)
97
MA17
O
Address signal output terminal Not used (open)
98
VDD
—
Power supply terminal (+3.3V)
99
WE
O
100
OE
O
101
VSS
—
Ground terminal
102
ROM-CE
O
Chip enable signal output terminal Not used (open)
103
CAS
O
104
VSS
—
Ground terminal
105
DEND
O
Internal operation monitor output terminal Not used (open)
106
VDD
—
Power supply terminal (+3.3V)
107
PEND
O
Internal operation monitor output terminal Not used (open)
108
ENC0
O
109
ENC1
O
Internal operation monitor output terminal Not used (open)
110
ENC2
O
111
VSS
—
Ground terminal
112
STOP
O
Internal operation monitor output terminal Not used (open)
113
HOLD
O
Internal operation monitor output terminal Not used (open)
114
OVF
O
Overflow monitor output terminal at the operation “H”: overflow Not used (open)
115
LIM
O
Fixed/float conversion limiter output terminal “H”: limiter on Not used (open)
116
BTIA
I
Bit input terminal Not used (fixed at “L”)
117
BTIB
I
Bit input terminal Not used (fixed at “L”)
118
BTOA
O
Bit output terminal Not used (open)
119
BTOB
O
Bit output terminal Not used (open)
120
VDD
—
Power supply terminal (+3.3V)
IC101: Address signal output to the D-RAM (IC102)
IC201: Address signal output to the D-RAM (IC202)
IC201: Address signal output to the D-RAM (IC202)
IC101: Address signal output to the D-RAM (IC102)
IC201: Address signal output to the D-RAM (IC202)
IC201: Address signal output to the D-RAM (IC202)
IC101: Address signal output to the D-RAM (IC102)
IC201: Address signal output to the D-RAM (IC202)
IC201: Address signal output to the D-RAM (IC202)
IC101: Address signal output to the D-RAM (IC102)
IC201: Address signal output to the D-RAM (IC202)
IC201: Address signal output to the D-RAM (IC202)
IC101: Address signal output to the D-RAM (IC102)
IC201: Address signal output to the D-RAM (IC202)
IC201: Address signal output to the D-RAM (IC202)
IC101: Write enable signal output to the D-RAM (IC102)
IC201: Write enable signal output to the D-RAM (IC202)
IC201: Write enable signal output to the D-RAM (IC202)
IC101: Output enable signal output to the D-RAM (IC102)
IC201: Output enable signal output to the D-RAM (IC202)
IC201: Output enable signal output to the D-RAM (IC202)
IC101: Column address strobe signal output to the D-RAM (IC102)
IC201: Column address strobe signal output to the D-RAM (IC202)
IC201: Column address strobe signal output to the D-RAM (IC202)
– 71 –
DSP BOARD IC301 HD6473048-DSP01 (MASTER CONTROLLER)
Pin No.
Pin Name
I/O
Function
1
VDD
—
Power supply terminal (+5V)
2
PW-ON
O
Output of power on/off control signal for the system power supply (digital/analog power
supply, amp remote etc.) “H”: power on
supply, amp remote etc.) “H”: power on
3
S-OUT
O
Serial data output to the EEPROM (IC302), input selector (IC415), digital signal processor
(IC601 CXD2710R), and electrical volume (IC1106, 1206, 1306)
(IC601 CXD2710R), and electrical volume (IC1106, 1206, 1306)
4
S-CKO
O
Serial data transfer clock signal output to the input selector (IC415), digital signal processor
(IC601 CXD2710R), and electrical volume (IC1106, 1206, 1306)
(IC601 CXD2710R), and electrical volume (IC1106, 1206, 1306)
5
DSPRST
O
Reset signal output to the digital signal processor (IC101, 201 CXD2711Q/IC601
CXD2710R), and digital filter (IC1101, 1201, 1301) “L”: reset
CXD2710R), and digital filter (IC1101, 1201, 1301) “L”: reset
6
2710-CE
O
Chip enable signal output to the digital signal processor (IC601 CXD2710R)
7
EE-CKO
O
Serial data transfer clock signal output to the EEPROM (IC302)
8
SP-CE
O
Chip enable signal output to the input selector (IC415)
9
DSP-RDY
I
Input of ready signal at data transfer from the digital signal processor (IC101, 201 CXD2711Q)
The start cause interruption occurs by a falling edge
The start cause interruption occurs by a falling edge
10
VPP
I
Not used (fixed at “L”)
11
GND
—
Ground terminal
12
S-OUT (TX)
O
UART (Universal Asynchronous Receiver/Transmitter) transmit output of the master bus
controller (CN12)
controller (CN12)
13
UNISO
O
Serial data output to the bus interface (IC306) (for SONY bus)
14
S-IN (RX)
I
UART (Universal Asynchronous Receiver/Transmitter) receive input of the master bus
controller (CN12)
controller (CN12)
15
UNISI
I
Serial data input from the bus interface (IC306) (for SONY bus)
16
NIL
I
Not used (fixed at “L”)
17
UNICKI
I
Serial data transfer clock signal input from the bus interface (IC306) (for SONY bus)
18
D0
I/O
19
D1
I/O
20
D2
I/O
21
D3
I/O
22
VSS
—
Ground terminal
23
D4
I/O
24
D5
I/O
25
D6
I/O
26
D7
I/O
27
D8
I/O
28
D9
I/O
29
D10
I/O
30
D11
I/O
31
D12
I/O
32
D13
I/O
33
D14
I/O
34
D15
I/O
35
VDD
—
Power supply terminal (+5V)
36
A0
O
Address signal output terminal In this set, the chip enable signal output to the digital signal
processor (IC101 CXD2711Q)
processor (IC101 CXD2711Q)
37
A1
O
Address signal output to the flash memory (IC401, 402), and chip enable signal output to the
digital signal processor (IC201 CXD2711Q)
digital signal processor (IC201 CXD2711Q)
Two-way data bus with the flash memory (IC401)
Two-way data bus with the flash memory (IC401)
Two-way data bus with the digital signal processor (IC101, 201 CXD2711Q) and flash
memory (IC402)
memory (IC402)
– 72 –
Pin No.
Pin Name
I/O
Function
38
A2
O
39
A3
O
40
A4
O
41
A5
O
42
A6
O
43
A7
O
44
VSS
—
Ground terminal
45
A8
O
46
A9
O
47
A10
O
48
A11
O
49
A12
O
50
A13
O
51
A14
O
52
A15
O
53
A16
O
54
A17
O
55
A18
O
56
A19
O
57
VSS
—
Ground terminal
58
MUTE
O
Relay drive signal output for the speaker protect relay (RY1101, 1201, 1301)
At output of “L”, the relay is turned on to apply muting
At output of “L”, the relay is turned on to apply muting
59
SMUTE
O
Soft mute control signal output to the electrical volume (IC1106, 1206, 1306) “H”: mute on
60
EMP-O
O
Emphasis control signal output to the digital filter (IC1101, 1201, 1301) “H”: emphasis on
61
NCO
O
System clock signal output terminal Not used (open)
62
STBY
I
Standby signal input terminal Fixed at “H” in this set
63
SYSRES
I
System reset signal input from the reset signal generator (IC303) and bus interface (IC306) (for
SONY bus) “L”: reset For several hundreds msec. after the power supply rises, “L” is input,
then it changes to “H”
SONY bus) “L”: reset For several hundreds msec. after the power supply rises, “L” is input,
then it changes to “H”
64
BU-IN
I
Backup power supply detect signal input terminal (used also to reset standby)
65
VSS
—
Ground terminal
66
X-IN
I
System clock input terminal (14.74 MHz)
67
EX-IN
I
System clock input terminal (14.74 MHz)
68
VDD
—
Power supply terminal (+5V)
69
AS
O
Address strobe signal output terminal Not used (open)
70
RD
O
Strobe signal output for data reading to the digital signal processor (IC101, 201 CXD2711Q)
and flash memory (IC401, 402)
and flash memory (IC401, 402)
71
HWR
O
Strobe signal output for upper byte data writing to the digital signal processor (IC101, 201
CXD2711Q) and flash memory (IC402)
CXD2711Q) and flash memory (IC402)
72
LWR
O
Strobe signal output for lower byte data writing to the flash memory (IC401)
73
MD0
I
Input terminal for setting microcomputer operation mode (fixed at “L”)
74
MD1
I
Input terminal for setting microcomputer operation mode (fixed at “H”)
75
MD2
I
Input terminal for setting microcomputer operation mode (fixed at “H”)
76
AVDD
—
Power supply terminal (+5V) (for A/D conversion)
77
AVREF
I
Reference voltage input terminal (+5V) (for A/D conversion)
78
NIH
I
Fixed at “H” in this set
Address signal output to the flash memory (IC401, 402)
Address signal output to the flash memory (IC401, 402)
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