DOWNLOAD Sony HCD-ZX10 / MHC-ZX10 Service Manual ↓ Size: 7.92 MB | Pages: 75 in PDF or view online for FREE

Model
HCD-ZX10 MHC-ZX10
Pages
75
Size
7.92 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
hcd-zx10-mhc-zx10.pdf
Date

Sony HCD-ZX10 / MHC-ZX10 Service Manual ▷ View online

21
CD SECTION
Note :
1. CD Block is basically designed to operate without adjustment.
Therefore, check each item in order given.
2. Use YEDS-18 disc (3-702-101-01) unless otherwise indicated.
3. Use an oscilloscope with more than 10M
Ω impedance.
4. Clean the object lens by an applicator with neutral detergent
when the signal level is low than specified value with the
following checks.
S-Curve Check
Procedure :
1. Connect oscilloscope to TP (FEO).
2. Connect between TP (FEI) and TP (VC) by lead wire.
3. Connect between TP (AGCCON) and TP (GND) by lead wire.
4. Turn Power switch on.
5. Load a disc (YEDS-18) and actuate the focus search. (In
consequence of open and close the disc tray, actuate the focus
search)
6. Confirm that the oscilloscope waveform (S-curve) is
symmetrical between A and B. And confirm peak to peak level
within 4 ±1 Vp-p.
7. After check, remove the lead wire connected in step 2 and 3.
Note : • Try to measure several times to make sure than the ratio
of A : B or B : A is more than 10 : 7.
• Take sweep time as long as possible and light up the
brightness to obtain best waveform.
RF Level Check
Procedure :
1. Connect oscilloscope to TP (RF).
2. Connect between TP (AGCCON) and TP (GND) by lead wire.
3. Turned Power switch on.
4. Load a disc (YEDS-18) and playback.
5. Confirm that oscilloscope waveform is clear and check RF signal
level is correct or not.
6. After check, remove the lead wire connected in step 2.
BD board
Oscilloscope
TP(FEO)
TP(VC)
symmetry
S-curve waveform
within 4 
±1Vp-p
A
B
TP(RF)
TP(VC)
BD board
oscilloscope
Note: Clear RF signal waveform means that the shape “
◊” can be
clearly distinguished at the center of the waveform.
RF signal waveform
E-F Balance (1 Track jump) Check
Procedure:
1. Connect oscilloscope to TP (TEO) and TP (VC) board.
2. Turned Power switch on.
3. Load a disc (YEDS-18) and playback the number five track.
4. Press the  u  button. (Becomes the 1track jump mode.)
5. Confirm that the level B and A (DC voltage) on the oscilloscope
waveform.
1 track jump waveform
Specification level:      x 100=less than ±22%
6. After check, remove the lead wire connected in step 1.
RF PLL Free-run Frequency
Procedure :
1. Connect frequency counter to test point (XPCK) with lead wire.
2. Turned Power switch on.
3.
Put the disc (YEDS-18) in to play the number five track.
Confirm that reading on frequency counter is 4.3218MHz.
VOLT/DIV : 200mV
TIME/DIV : 500ns
level : 1.45 
± 0.3Vp-p
oscilloscope
BD board
TP (TEO)
TP (VC)
+
0V
Center of
waveform
B
Symmetry
A (DC voltage)
level=1.3
±0.6Vp-p
A
B
+
frequency counter
BD board
TP (XPCK)
22
TP
(XPCK)
TP
(TEO)
TP
(FEO)
TP
(FEI)
TP
(RF)
TP
(VC)
TP
(DGND)
TP
(AGCCON)
1
12
24
1
20
21
40
60
80
41
61
IC101
IC103
Adjustment Location:
[BD BOARD] (Conductor Side)
HCD-ZX10
23
23
SECTION 6
DIAGRAMS
6-1. CIRCUIT BOARDS LOCATION
TRANS board
PANEL board
MAIN board
FRONT AMP board
CD SW board
LEAF SW board
HP board
SUB PANEL board
AUDIO board
TUNER UNIT
SUB TRANS board
CLAMP MOTOR board
SENSOR 2 board
SENSOR board
OUT SW board
INT/COUNT SW board
LOAD MOTOR board
CONNECTOR board
IN SW board
BD board
THIS NOTE IS COMMON FOR PRINTED WIRING
BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is printed
in each block.)
For schematic diagrams.
Note:
• All capacitors are in µF unless otherwise noted.  pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in 
Ω and 
1
/
4
 
W or less unless otherwise
specified.
f
: internal component.
• 2 : nonflammable resistor.
• 1 : fusible resistor.
• C : panel designation.
For printed wiring boards.
Note:
• X : parts extracted from the component side.
• Y : parts extracted from the conductor side.
a
: Through hole.
• b : Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
• U : B+ Line.
• V : B– Line.
• H : adjustment for repair.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
• Voltages are taken with a VOM (Input impedance 10 M
Ω).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
F
: FM
g : VIDEO/MD (AUDIO)
E
: PB (DECK A)
d
: PB (DECK B)
G
: REC (DECK B)
m
: CHROMA
n : Y
o : VIDEO
J
: CD
c
: digital out
I : PHONO
• Abbreviation
CND : Canadian model.
Note: The components identified by mark 0 or dotted line
with mark 0 are critical for safety.
Replace only with part number specified.
Caution:
Pattern face side: Parts on the pattern face side seen from the
(Side B)
pattern face are indicated.
Parts face side:
Parts on the parts face side seen from the
(Side A)
parts face are indicated.
• Indication of transistor
C
B
These are omitted.
E
Q
B
These are omitted.
C
E
B
These are omitted.
C
E
HCD-ZX10
24
24
6-2. BLOCK DIAGRAMS
– BD SECTION –
E
F
A
B
C
D
DRIVE
Q101
LD
RF EQ 
AMP
SUMMING
AMP
RF
ERROR
AMP
FOCUS
ERROR
AMP
TRACKING
APC LD 
AMP
VC 
BUFFER
VC 
REF 
RF AMP
IC103
DIGITAL SERVO
DIGITAL SIGNAL PRCESSOR
IC101
IC781
LASER
DIODE
DETECTOR
OPTICAL PICK-UP BLOCK
(KSM-213DAP/Z-NP)
A
C
D
B
E
F
LD
POWER
PD
LD
PD
LD
A
C
D
B
E
F
TE 
FE
RFD 
RFI
ASYMMETRY 
CORRECTION
AUTO
SEQUENCER
SERVO
INTEG- 
RATOR
DIGITAL 
PLL
EFM 
DEMODULATOR
SUB CODE
PROCESSOR
ERROR
CORRECTOR
INTERNAL BUS
16K 
RAM
D/A
INTERFACE
DIGITAL 
CD DIGITAL 
OUT 
OPTICAL 
OUT
DOUT 
SERVO 
INTERFACE
DIGITAL
CLV
LD ON 
OP AMP
ANALOG SW
A/D
CONVERTER
PWM
GENERATOR
TRACKING
PWM
GENERATOR
FOCUS
PWM
GENERATOR
SLED
PWM
GENERATOR
VC 
TRACKING 
SERVO
FOCUS 
SERVO
SLED 
SERVO
SERVO DSP
TFDR
TRDR
FFDR
FRDR
SFDR
SRDR
MDP
D OUT
S STOP
RFDC
FE
TE
SE
CPU 
INTERFACE
SENS
DATA
XLAT
CLOK
CLOCK 
GENERATOR
XTAI
XTAO
M
M
TRACKING
COIL
FOCUS
COIL
SLED
MOTOR
M102
SPINDLE
MOTOR
M101
T+
T
F+
F
SD+
SD
SP+
SP
FOCUS/TRACKING COIL DRIVE
SPINDLE/SLED MOTOR DRIVE
IC102
VC
TFDR
TRDR
FFDR
FRDR
SFDR
SRDR
XRST
MUTE
09
S101 
LIMIT SW
SQCK
XRST
SENS
DATA
SCLK
XLT
CLK
SCOR
SQSO
SCOR
SUBQ
SQCK
HOLD
XRST
RF AC
ASYI
ASYO
CONTROL SIGNAL
BLOCK
SERVO 
BLOCK
VCC
VC
SYSCON/SERVO
      SECTION
• SIGNAL PATH
            : CD
            : VIDEO
            : Digital out
(Page 25)
B
  MAIN
SECTION
(Page 26)
A
5
7
8
6
11
10
3
4
23
24
27
25
20
22
21
12
13
17
14
16
51
48
49
43
38
41
39
40
31
30
33
32
29
28
26
60
72
71
66
70
8
67
20
7
6
5
2
1
9
27
3
14 
1
11
12
13
14
18
17
16
15
2
3
5
6
INTEG- 
RATOR
SERIAL IN
INTERFACE
OVER SAMPLING
DIGITAL
FILTER
3rd ORDER
NOISE SHAPER
PWM
L OUT
TIMING
LOGIC
X101
16.9344MHz
XLON
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