Sony HCD-V909AV / MHC-V909AV Service Manual ▷ View online
— 90 —
Pin Name
PDCLK
V
SS
VSYNC
HSYNC
SO
FID
V
DD
XIICEN
Pin No.
57
58
59
60
61
62
63
64
I/O
O
–
O
O
O
O
–
I
Function
13.5MHz pixel data clock output pin.
This clock is obtained by 1/2 frequency-dividing SYSCLK.
Used only in the 16-bit pixel data mode
Digital ground
V.sync signal output
H.sync signal output
The functions of this pin are selected by Pin 64 XIICEN.
When the XIICEN pin is “H”, sets into the SONY SIO mode, and becomes the S0 serial-
out output pin.
When the XIICEN pin is “L”, this pin is not used and sets into high impedance (Not used)
Field ID output.
When control register bit “FDS”=“1”, “L” indicates the first field and “H” indicates the
second field.
When control register bit “FDS”=“0”, “H” indicates the first field and “L” indicates the
second field
Digital power supply
Serial interface mode selection input pin. Pulled-up.
When “L”, Pins 48 to 50, and 61 set into the I
2
C-BUS mode.
When “H”, Pins 48 to 50, and 61 set into the SONY SOP mode
— 91 —
• IC701 MECHANISM CONTROL (HD6433032SK12F)/VIDEO board
Function
Input/output terminal exchanging data bus 0 with IIC interface (IC901)
Input/output terminal exchanging data bus 1 with IIC interface (IC901)
Input/output terminal exchanging data bus 2 with IIC interface (IC901)
Input/output terminal exchanging data bus 3 with IIC interface (IC901)
Outputs command acknowledge to IIC interface (IC901)
Outputs command output pulses to IIC interface (IC901)
Serial data latch pulse output to Video D/A converter (IC401)
Serial data latch pulse output to Audio D/A converter (IC101)
Not used
Sub Q 80bit input (CXD2545Q)
SQSO readout clock output (CXD2545Q)
Ground
Data bus input/output (IC201, 751)
Connect to the power supply (+5V)
Address bus output (IC201, 751)
Ground
Address bus output (IC201, 751)
Address bus output (Not used)
Addres bus output (IC772)
Address bus output (Not used)
BUS control wait input (IC201)
Operation mode setting terminal (Connected to +5V)
Operation mode setting terminal (Connected to ground)
System clock output (Not used)
Shifts to the hardware standby mode when the standby terminal becomes “Low”.
(Unable to use H level fixed) (Connected to +5V)
Set into reset when the reset input pin becomes “Low”. (IC901)
Requests mask disable interruption. (Unable to use H level fixed) (Connected to +5V)
Ground
Connected to the Crystal oscillator. The EXTAL pin is also able to input external clocks.
(10 MHz)
Connected to the Crystal oscillator. (10 MHz)
Power supply (+5V)
When the address strobe pin is “Low”, indicates that address outputs on the address bus
are valid. (IC772)
When the read pin is “Low”, indicates that the external addresses space is in the read state.
(IC201, 751)
When the read pin is “Low”, indicates that the external addresses space is in the write
state and the data bus are valid. (IC201, 751)
Reset output (Not used)
A/D converter (Pin62-69) ground
Color-bar test input (“L” = test)
AFADJ test input (“L” = test)
ADJ test input (“L” = test)
Internal state (SENSE) monitor input (CXD2545Q)
Audio D/A converter select mode setting terminal (Connected to +5V)
NTSC/PAL output mode setting terminal (0V : NTSC, 1.5V : AUTO, 3V : PAL)
Ground
Not used
A/D converter (Pin62-69) reference voltage input (Connected to +5V)
I/O
I/O
I/O
I/O
I/O
O
O
O
O
–
I
O
–
I/O
–
O
–
O
O
O
O
I
I
I
O
I
I
I
–
I
I
–
O
O
O
O
–
I
I
I
I
I
I
–
I
I
Pin Name
CMD0
CMD1
CMD2
CMD3
SACK
QINT
VDAC-XLAT
DF-XLAT
P90/TXD
SUBQ
SQCK
V
SS
D0 to D7
V
CC
A0 to A7
V
SS
A8 to A12
A13 to A16
A17, A18
A19
WAIT
MD0
MD1
φ
STBY
RESET
NM1
V
SS
EXTAL
XTAL
V
CC
AS
RD
WR
RESO
AV
SS
TEST0
TEST1
TE
SENS
DAC-SELECT
NPIN
VSS
VREQ
VREF
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13 to 20
21
22 to 29
30
31 to 35
36 to 39
40, 41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
— 92 —
Pin No.
68
69
70
71
72
73
74
75
76
77
78
79
80
Function
A/D converter (Pin62-29) power supply (Connected to +5V)
Check LED control (Error : flashing)
Interruption request input from MPEG decoder
Subcode sync input (CXD2545Q)
Inputs command request from IIC interface (IC901)
Serial data output
Mute output (“H” = mute)
Laser diode ON/OFF output
Latch output (CXD2545Q)
SENS serial data reading clock output (CXD2545Q)
Serial data clock output
Connected to +5V
Not used
I/O
–
O
I
I
I
O
O
O
O
O
O
I
–
Pin Name
AV
CC
CHECK-LED
XHIRQ
SCOR
MREQ
DATA
AMUTE
LDON
XLT
SCLK
CLK
NR-SEL
—
— 93 —
Connected to ground
Connected to ground
X’ tall (5MHz)
X’ tall (5MHz)
Power supply +5V
Not used
Connected to +5V
System reset input
Not used (Fixed at “L”)
CD-BUS interrupt input
Not used (Fixed at “L”)
Power supply +5V
Power supply +5V
Connected to ground
Ground
Input/output terminal exchanging data bus 0 with mecha-con, (IC901)
Input/output terminal exchanging data bus 1 with mecha-con, (IC901)
Input/output terminal exchanging data bus 2 with mecha-con, (IC901)
Input/output terminal exchanging data bus 3 with mecha-con, (IC901)
Connected to ground
Ground
Connected to ground
Output command request to mecha-con. (IC701)
Input command acknowledge from mecha-con. (IC701)
Not used (Fixed at “L”)
Connected to ground
Serial data output (IC271, 301)
Serial clock output (IC271, 301)
Serial latch output to OSD (IC271)
Not used
Not used
Video CD section reset output
Not used
Not used
Serial data input from master control (IC701)
Serial clock input from master control (IC701)
Connected to ground
Not used
Not used
Not used
Chip select output to noise reduction (IC301)
Connected to ground
Ground
Connected to ground
Connected to ground
Connected to ground
Connected to ground
Connected to ground
1 to 8
9
10
11
12
13
14
15
16, 17
18
19 to 22
23
24
25 to 32
33
34
35
36
37
38, 39
40
41, 42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57 to 64
65
66
67
68
69, 70
71
72, 73
74 to 81
82 to 85
86 to 93
94 to 100
P80 to P87
TEST
X2
X1
VDD
XT2
XT1
RESET
PO0, PO1
QINT
PO3 to PO6
VDD
AVDD
P10 to P17
AVSS
CMD0
CMD1
CMD2
CMD3
P24, P25
VSS
P26, P27
MREQ
SACK
CDGM
P93
MDATA
MCLK
OS-XLAT
G-XLAT
G-XRST
CD-XRST
CDPOW
DOUT
IIC-DATA
IIC-CLK
P40 to P47
NRON
LEVEL0
LEVEL1
NR-XCS
P54, P55
VSS
P56, P57
P60 to P67
P100 to P103
P30 to P37
P150 to P156
I
–
O
I
–
–
–
I
I
I
I
–
–
I
–
I/O
I/O
I/O
I/O
I
–
I
O
I
I
I
O
O
O
O
O
O
O
O
I
I
I
O
O
O
O
I
I
I
I
I
I
I
• IC901 IIC INTERFACE (uPD780016YGF-012-3BA)/VIDEO board
I/O
Function
Pin No.
Pin Name
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