DOWNLOAD Sony BDV-L600 / BDV-L800 / BDV-L800M / HBD-L600 / HBD-L800 / HBD-L800M Service Manual ↓ Size: 6.81 MB | Pages: 109 in PDF or view online for FREE

Model
BDV-L600 BDV-L800 BDV-L800M HBD-L600 HBD-L800 HBD-L800M
Pages
109
Size
6.81 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
bdv-l600-bdv-l800-bdv-l800m-hbd-l600-hbd-l800-hbd-.pdf
Date
PREV: Sony BDV-L600 / BDV-L800 / BDV-L800M / SS-TSL600 / SS-TSL800 Service Manual

Sony BDV-L600 / BDV-L800 / BDV-L800M / HBD-L600 / HBD-L800 / HBD-L800M Service Manual ▷ View online

HBD-L600/L800/L800M
HBD-L600/L800/L800M
33
33
SECTION  5
DIAGRAMS
5-1.  BLOCK  DIAGRAM - SERVO Section -
: VIDEO
: DISC PLAY
: USB
: LAN
: WIRELESS LAN
TXVP_0
A2
TXVN_0
B3
6
4
3
1
BD DECODER
IC101 (1/4)
BD DRIVE
(BSX-2)
RFIP
K1
BD_RF+
RFIN
K2
L1
L2
BD_RF-
INA
G2
B
INB
G1
A
INC
H2
D
IND
H1
C
INE
K3
G
INF
K4
H
ING
J4
E
INH
J3
F
REIC_TRAYIN#
V6
LOAD END SW
FETRAYOUT_
V5
UNLOAD END SW
FEGIO2
T2
LOAD SW
FECFREQ
P5
SDIO
FEOSCEN
R5
SCLK
FECMOD
R3
SEN_LDD
FPDODVD
E2
TEST_V
FEGIO5
U1
MODE_A
FEGAINSW1
T1
MODE_B
FEGIO7
W3
LDEN
B
/B
A
/A
HAVC
K5
VC_PD
AUX1
G4
THERMO
FETRAYPWM
N4
TRO
M4
FOO
L3
TLO
M3
FEFMO2
N3
FEFMO
N1
FEDMO
N2
FELIMIT_
V4
REIC_MUTE1
R4
REIC_MUTE2
R6
FEGAINSW3
P6
REIC_FG
W5
RFIP2
DVD_RF+
RFIN2
DVD_RF-
USB_1P_DP
AB2
USB_1P_DM
AB1
CN5801
WLC1
WIRELESS
LAN CARD
9
8
USB_2P_DP0
AD2
USB_2P_DM0
AD1
CN021
3
2
VSTB L25
J6001
VIDEO AMP
IC6001
VDACX_OUT C19
VIDEO OUT
TXVP_1
B4
COIL/MOTOR DRIVER
IC2401
XFG 11
MONITOR 12
VSLED1 16
VSLED2 17
SLED1_P
52
SLED1_N
53
SLED2_P
55
SLED2_N
56
W
V
U
COMMON
U
42
V
44
W
46
MCOM
49
LOAD+
LOAD-
LOAD_P
32
LOAD_N
33
TR
TD
TRK_P
29
TRK_N
30
FD1
FR1
FCS_P
27
FCS_N
28
FD2
FR2
TLT_P
24
TLT_N
25
VSPIN 18
VLOAD 19
GC 15
VTRK
SA_B+
SA_B-
SA_A+
SA_A-
FEGAINSW2
P4
FEFMO4
N5
FEFMO3
P1
MOTOR DRIVER
IC1401
STP1_IN 8
STP2_IN 9
STP1+
16
STP1-
17
STP2+
18
STP2-
19
STEP_ENA 7
FOIN
C1
COLLIENOZ 12
20
VFCS 21
VTLT 22
XMUTE1 13
XMUTE2 14
TXVN_1
A4
LAN (100)
USB_2P_DP1
AC2
USB_2P_DM1
DP
DM
AC1
(HBD-L800/L800M)
SIGNAL PATH
HBD-L600/L800/L800M
HBD-L600/L800/L800M
34
34
5-2.  BLOCK  DIAGRAM - MEMORY Section -
SD-RAM
IC106
RWE_
RA0 - RA13
RDQ0 - RDQ15
RCS_
AE13
AE15
L3
L2
/WE
RBA0
AG14
M2
BA0
RBA1
AD19
N8
BA1
RBA2
AC15
M3
BA2
/CS
RCAS_
RRAS_
AD14
AC13
K3
J3
/CAS
/RAS
RCKE
AG16
K9
CKE
RCLK0
AG24
J7
CK
RCLK0_
AH24
K7
/CK
RDQM1
RDQS1
AD21
AH21
D3
C7
DMU
DQSU
RDQS1_
RDQM0
AG21
AE21
B7
E7
/DQSU
DML
RODT
AC14
K1
ODT
RDQS0
AG20
F3
DQSL
RDQS0_
AH20
G3
/DQSL
T2
/RESET
A0 - A12, NC
DQL0 - DQL7,
DQU0 - DQU7
SD-RAM
IC107
RDQ16 - RDQ31
RCLK1
AG13
RCLK1_
AH13
RDQM3
RDQS3
AD9
AH10
RDQS3_
RDQM2
AG10
AD10
RDQS2
AG9
RDQS2_
AH9
A0 - A12, NC
DQL0 - DQL7,
DQU0 - DQU7
SD-RAM
IC206
A0 - A12, NC
DQL0 - DQL7,
DQU0 - DQU7
SD-RAM
IC207
A0 - A12, NC
DQL0 - DQL7,
DQU0 - DQU7
NAND FLASH
IC501
BD DECODER
IC101 (2/4)
NFD0 - NFD7
D1A0 - D1A13
D0A0 - D0A13
D0A0 - 
D0A13
D1A0 - D1A13
NFWEN
AG4
18
WE
NFREN
AD4
8
RE
NFCEN
NFRBN
AH2
AE3
9
7
CE
RY/BY
NFALE
NFCLE
AF4
AG3
17
16
ALE
CLE
EEPROM
IC6601
VDIN31
C21
13
I2C_SDA
VDIN30
D21
12
I2C_SCL
4
RESET
19
WP
IO1 - IO8
X401
27MHz
NS_XTALO
NS_XTALI
B13
A13 
CPU_XRST
A
T2
/RESET
RRESET
AC16
L3
L2
/WE
M2
BA0
N8
BA1
M3
BA2
/CS
K3
J3
/CAS
/RAS
K9
CKE
J7
CK
K7
/CK
D3
C7
DMU
DQSU
B7
E7
/DQSU
DML
K1
ODT
F3
DQSL
G3
/DQSL
L3
L2
/WE
M2
BA0
N8
BA1
M3
BA2
/CS
K3
J3
/CAS
/RAS
K9
CKE
J7
CK
K7
/CK
D3
C7
DMU
DQSU
B7
E7
/DQSU
DML
K1
ODT
F3
DQSL
G3
/DQSL
T2
/RESET
T2
/RESET
L3
L2
/WE
M2
BA0
N8
BA1
M3
BA2
/CS
K3
J3
/CAS
/RAS
K9
CKE
J7
CK
K7
/CK
D3
C7
DMU
DQSU
B7
E7
/DQSU
DML
K1
ODT
F3
DQSL
G3
/DQSL
RWE_B_
RA0_B - RA13_B
RDQ0_B - RDQ15_B
RCS_B_
AE28
AB25
RBA0_B
AB26
RBA1_B
T24
RBA2_B
W25
RCAS_B_
RRAS_B_
AC26
AD28
RCKE_B
V27
RCLK0_B
L27
RCLK0_B_
L28
RDQM1_B
RDQS1_B
R24
P28
RDQS1_B_
RDQM0_B
P27
P25
RODT_B
AD27
RDQS0_B
R27
RDQS0_B_
R28
RDQ16_B - RDQ31_B
RCLK1_B
AB27
RCLK1_B_
AB28
RDQM3_B
RDQS3_B
AE26
AF28
RDQS3_B_
RDQM2_B
AF27
AD26
RDQS2_B
AG27
RDQS2_B_
AG28
RRESET_B
Y26
(Page 36)
HBD-L600/L800/L800M
HBD-L600/L800/L800M
35
35
5-3.  BLOCK  DIAGRAM - HDMI Section -
: AUDIO
: VIDEO
CN5701
HDMI
IN 1
CN5702
HDMI
IN 2
42
41
7
9
4
6
1
3
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
36
37
7
9
4
6
1
3
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
19
HDMI INPUT SELECTOR
IC5701
BD DECODER
IC101 (3/4)
CH0_P B16
CH0_M A16
7
9
CH1_P B15
CH1_M A15
4
6
CH2_P B14
CH2_M A14
1
3
CLK_P B17
CLK_M A17
10
HTPLG
TMDS DATA0 +
TMDS DATA0 –
TMDS DATA1 +
TMDS DATA1 –
TMDS DATA2 +
TMDS DATA2 –
TMDS CLOCK +
TMDS CLOCK –
SDA 
SCL
HPD
CEC
D25
19
12
16
+5V POWER
18
15
13
RESERVED
14
HDMISO D24
HDMISCK C25
BUFFER
Q702
CN701
HDMI
ARC OUT
B
19
35
D0+_1
D0–_1
45
44
D1+_1
D1–_1
48
47
D2+_1
D2–_1
39
38
CLK+_1
CLK–_1
B8
A8
RX0
RX0B
B7
A7
RX1
RX1B
B6
A6
RX2
RX2B
B9
A9
RXCK
RXCKB
23
22
D0+_SINK
D0–_SINK
20
21
D1+_SINK
D1–_SINK
17
18
D2+_SINK
D2–_SINK
26
27
CLK+_SINK
CLK–_SINK
E26
F24
ETRXER/DDC_SDA
ETTXER/DDC_SCL
30
29
SDA_SINK
SCL_SINK
E27
D28
VDIN0
VDIN1
32
33
S1/SCL
S2/SDA
F26 ETCRS/HPG_RX
H24
B10
GPIO8/5V_RX
SCL
C10 SDA
C28 VDIN3
F21 VDIN34
D26 VDIN6
31
HPD_SINK
SDA1
SCL1
HPD1
ARC_SPDIF
CEC
C
PCONT3
+5V
REGULATOR
IC705
UNSW +6V
WAVE
SHAPER
IC5702
+5V POWER
SELECT
IC5706
EEPROM
IC5704
DATA SELECT
IC5703
Q5709
Q5705
EEPROM
IC5707
DATA SELECT
IC5708
Q5706
BUFFER
Q5703
BUFFER
Q5704
57
56
51
52
50
D0+_2
D0–_2
60
59
D1+_2
D1–_2
63
62
D2+_2
D2–_2
54
53
CLK+_2
CLK–_2
SDA2
SCL2
HPD2
SIGNAL PATH
(Page 36)
(Page 37)
HBD-L600/L800/L800M
HBD-L600/L800/L800M
36
36
5-4.  BLOCK  DIAGRAM - MAIN Section -
: AUDIO
: TUNER
ANTENNA
FM
COAXIAL
75
:
R-CH
CEC (TX/RX)
SYSTEM CONTROLLER
IC6201 (1/2)
ST_SCL
48
ST_SDA
ST_RDS_INT
75
R-ch is omitted due to same as L-ch.
BD_RESET
CPU_XRST
A
BD_TEMP
3 FRF1
FM RECEIVER
IC101
CN102
15
LOUT
14
ROUT
13
DA
10
CK
8
IIC/RDSI
R-CH
13 VinL
VinR
BCK
LRCK
SCKI
14
8
7
6
A/D CONVERTER
IC5907
BD DECODER
IC101 (4/4)
DOUT 9
E12 MCIN
C12 AOMCLK
B12 AOLRCK
A12 AOBCK
47
91
83
X101
32.768kHz
X2
X1
19
18
SIGNAL PATH
OPTICAL
RECEIVER
IC5901
TV
DIGITAL IN
OPTICAL
CN1001
B
ARC_SPDIF
CEC
G11 SPBCK/DIN2
F11 SPMCLK/DIN1
17
AOSDATA4 F10
AOSDATA0
BUFFER
IC5910
RESET_
K23
TH6201
LCDRD
L26
VDATA
M23
VCLK
M24
VDIN32
E21
GPIO1
E9
VDIN7
A28
GPIO5
AE6
OPWRSB
K24
FEGIO3
T6
GPIO6
AE5
GPIO7 AC7
USB_VBUS_PCONT1
SFCS AH5
USB_VBUS_PCONT2
E
D
BD_SDO 100
JIG_MODE1 84
BD_SDI 1
BD_SCLK 2
BD_CS
UPG_STATUS
OPWRSB
BD_IF_START 21
FE_EJECT
BD_IF_REQ 25
88
87
85
86
S-AIR_GPIO2
S-AIR_DET
S-AIR_SDA 30
S-AIR_RST
S-AIR_SCL 29
6
90
63
WIRELESS
TRANSCEIVER
(EZW-RT50
EZW-RT20)
DIGITAL SAMPLE
RATE CONVERTER
IC1052
SDTI
9
IBICK
8
OSC
BUFFER
IC1051
OMCLK
27
ILRCK
7
PDN
3
2
18
22
9
10
25
21
23
SDTO
OBICK 25
OLRCK 26
24
H_SDA
AMP_MCK
AMP_LRCK
AMP_BCK
X1051
12.288MHz
C11
AOSDATA2
DIGITAL SAMPLE
RATE CONVERTER
IC1053
SDTI
9
IBICK
8
ILRCK
7
PDN
3
8
SDTO
OBICK 25
OLRCK 26
24
D12
(HBD-L800/L800M)
BUFFER
IC5909
(Page 35)
(Page 38)
(Page 34)
(Page 37)
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