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Model
XG-NV1E (serv.man18)
Pages
76
Size
360.23 KB
Type
PDF
Document
Service Manual
Brand
Device
Projector / Technical manual
File
xg-nv1e-sm18.pdf
Date

Sharp XG-NV1E (serv.man18) Service Manual ▷ View online

XG-NV1U
5
1) I/O ADDRESSES   50H   CCSR
PIN
 PIN NAME
 FUNCTION
REMARKS
SIGNAL
NAME
IN/
OUT
INIT.
STANDBY
INIT.
POWER-ON
39
PG0/AN0
Verf1
IN
40
PG1/AN1
Verf2
IN
41
PG2/AN2
TEMP
IN
42
PG3/AN3
RCS(LEAF)
IN
43
PG4/AN4
LOCK
IN
44
PG5/AN5
N-LUGHT
IN
2) I/O ADDRESSES   60H   ODRA
54
TXA1/PA0
P_CON1
OUT
L
H
FAN CONTROL
55
RXA1/PA1
SDA
IN/OUT
H
H
I
2
C-BUS
56
CKA1/PA2
SCL
OUT
H
H
I
2
C-CLK
57
TXS/PA3
P_CON2
OUT
L
H
LAMP CONTROL
58
RXS/PA4
K04
OUT
H
H
KEY OUT
SCANNING AT “L”
59
CKS/PA5
K03
OUT
H
H
KEY OUT
SCANNING AT “L”
60
DREQ1/PA6
K02
OUT
H
H
KEY OUT
SCANNING AT “L”
61
TEND/PA7
K01
OUT
H
H
KEY OUT
SCANNING AT “L”
3) ASCI CONTROL REGISTER   00H   CNTLAO
45
RTS0
RTS0
OUT
H
H
INTERRUPT INT0
CLEARED (L
H
L)
D7
D6
D5
D4
D3
D2
D1
D0
`
`
`
RTSO
H
`
`
`
BIT COMPOSITION
1-3-3. Terminal Functions (IC5001: HD641180)
PIN
 PIN NAME
 FUNCTION
REMARKS
SIGNAL
NAME
IN/
OUT
INIT.
STANDBY
INIT.
POWER-ON
PIN
 PIN NAME
 FUNCTION
REMARKS
SIGNAL
NAME
IN/
OUT
INIT.
STANDBY
INIT.
POWER-ON
XG-NV1U
6
Vcc
A
O11
A
O12
D
O
LD
CLK
DI
A
O1
A
O2
GND
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Vss
(VrefL)
A
O3
A
O4
A
O5
A
O6
A
O7
A
O8
A
O9
A
O10
V
DD
(VrefU)
L
D-A
L
D-A
L
D-A
L
D-A
L
D-A
L
D-A
L
L
D-A
D-A
L
D-A
L
D-A
D
1 2 3 4 5 6 D7 D8 9 10D11
(12)
(8)
(12)
(12)
Ch3
4
Ch2
1
12
11
5
6
7
8
9
10
8-bit
R-2R+ segment
D/A converter
8-bit
R-2R+ segment
D/A converter
8-bit
latch
8-bit
latch
Buffer
operational 
amplifier
12-bit shift register
Address
decoder
1-4. 8-bit 12-ch D/A converter (M62352GP)
1-4-1. Outline
The M62352 is a CMOS semi-conductor integrated circuit
that has 8-bit D/A converters for 12 channels as well as
high-performance buffer operational amplifiers, one each
at the output of each channel. Receiving serial input data,
the IC device can be readily used with an MCU by
coupling the 3 DI, CLK and LD lines. It is also equipped
with a Do pin for cascade connection. The built-in buffer
operational amplifiers are of the so-called full-swing type,
and work in a wide operating input/output voltage range.
These amplifiers are also much more stable against
capacitive load. The IC is best suited for regulating
electronic controls (VCA), replacing semi-fixed adjusting
resistors and other applications.
1-4-2. Features
»
12-bit serial data input type (DI, CLK and LD lines).
»
R-2R+ segment, high-performance 8-bit D/A
converters incorporated for 12 channels.
»
12 built-in buffer operational amplifiers that give full
swing at the output voltage between Vcc and GND.
»
Buffer operational amplifiers with high oscillation
stability against capacitive load.
1-4-3. Applications
Control and adjustment systems for camcorders, VCRs,
TV sets, CRT displays and other home and industrial
1-4-4. Block diagram
Pin connections (top view)
M62352GP
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Vss
(VrefL)
A
O3
A
O4
A
O5
A
O6
A
O7
A
O8
A
O9
A
O10
V
DD
(VrefU)
GND
A
O2
A
O1
DI
CLK
LD
Do
A
O12
A
O11
Vcc
Outer view 20P4B (P)
20P2E (GP)
20-pin shrink plastic DIP
(20P4B)
20-pin plastic SSOP
(20P2E)
Figure 1-3.
XG-NV1U
7
D0
Last
LS B
First
MS B
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D/A out put
Adress select
D0
D1
D2
D3
D4
D5
D6
D7
D/A out put
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(Vref
U
 - Vref
L
)/256 x 1 + Vref
L
(Vref
U
 - Vref
L
)/256 x 2 + Vref
L
(Vref
U
 - Vref
L
)/256 x 3 + Vref
L
D8
D9
D10
D11
Adress select
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
Don’t Care
A01 select
A02
A03
A04
A05
A06
A07
A08
A09
A010
A011
A012
Don’t Care
Don’t Care
Don’t Care
Note 1: Vref
U
 = V
DD
Vref
L
 = V
SS
(Vref
U
 - Vref
L
)/256 x 4 + Vref
L
(Vref
U
 - Vref
L
)/256 x 255 + Vref
L
Vref
U
1-4-5. Data input format table (DI input)
D11
DI
MSB
D10
D9
D8
D2
D1
D0
LSB
DAC DAT
CLK
DAC CLK
LD
D/A output
DAC LD2/LD3/LD4
1-4-6. Data timing chart (model)
Figure 1-4.
XG-NV1U
8
1-4-7. Terminal Functions (IC305: M62352P DAC2)
18
A01
SRS PASS
0x1
L/H
MODE 1, 2, 3, 4
19
A02
SRS/3D
0x2
L/H
SRS PASS, 3D MONO
2
A03
SRSA
0x3
L/H
L/H SWITCHING BY
SRS SETTING
3
A04
SRSB
0x4
L/H
4
A05
VOL
0x5
0-255
LAST MEMORY VALUE
USER
5
A06
SRS INH
0x6
L/H
}
6
A07
FANC
0x7
SV1 ONLY
7
A08
BAL
0x8
0-255
LAST MEMORY VALUE
USER
8
A09
TRE
0x9
0-255
LAST MEMORY VALUE
USER
9
A010
BASS
0xA
0-255
LAST MEMORY VALUE
USER
12
A011
SVP-TH
0xB
0
XGA, SVGA, MAC17 AT L,
OTHERS AT H
13
A012
SMUTE
0xC
H
MUTE ON (SEQUENCE)
1-4-8. Terminal Functions (IC1012: M62352P DAC3)
18
A01
GAIN (PICTURE)
0x1
0-255
USER + PROCESS
(RGB VIDEO)
19
A02
BRIGHT
0x2
0-255
USER + PROCESS
(RGB BRIGHTNESS)
2
A03
ROS (BRIGHT)
0x3
0-255
PROCESS VALUE
3
A04
GOS (BRIGHT)
0x4
0-255
PROCESS VALUE
4
A05
BOS (BRIGHT)
0x5
0-255
PROCESS VALUE
5
A06
R-D (CONT)
0x6
0-255
USER + PROCESS (RED)
6
A07
G-D (CONT)
0x7
0-255
PROCESS VALUE
7
A08
B-D (CONT)
0x8
0-255
USER + PROCESS (BLUE)
8
A09
NOT USED
0x9
9
A010
RES
0xA
00H
LOADER RESET
12
A011
FINE
0xB
80H
PROCESS VALUE
(INITIAL VALUE 80H)
13
A012
VVCO
0xC
80H
PROCESS VALUE
(INITIAL VALUE 80H)
PIN
 PIN NAME
 FUNCTION
REMARKS
SIGNAL
NAME
IN/
OUT
INIT.
STANDBY
INIT.
POWER-ON
PIN
 PIN NAME
 FUNCTION
REMARKS
SIGNAL
NAME
IN/
OUT
INIT.
STANDBY
INIT.
POWER-ON
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