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Model
ER-A770 (serv.man4)
Pages
94
Size
17.65 MB
Type
PDF
Document
Service Manual
Brand
Device
EPOS / ERA770 V2 (With Circuit Descriptins)Service Manuals
File
er-a770-sm4.pdf
Date
PREV: Sharp ER-A770 (serv.man3) Handy Guide

Sharp ER-A770 (serv.man4) Service Manual ▷ View online

2-3. OPC2
1) Pin configuration
1
SL00
2
SL01
3
SL02
4
SL10
5
SL11
6
SL12
7
SL20
8
SL21
9
SL22
10
SL30
11
SL31
12
13
/CD0
14
BRK0
15
TRNEMP0
16
RCVRDY0
17
TRNRDY0
18
/CTS0
19
RCVDT0
20
VCC
21
GND
22
/CI0
23
/RTS0
24
/CS0
25
/CD1
26
BRK1
27
TRNEMP1
28
RCVRDY1
29
TRNRDY1
30
/CTS1
31
32
33
/RTS1
34
35
36
TRNEMP2
37
RCVRDY2
38
TRNRDY2
39
CTS2Z
40
RCVDT2
160
MCLK
159
158
RSLCT1
157
RSLCT0
156
/RIN
155
/WIN
154
SYCBKD
153
TRNEMPD
152
RCVRDYD
151
TRNRDYD
150
/DSRD
149
/CTSD
148
RCVDTD
147
/RTSD
146
/DTRD
145
TRNDTD
144
/CSD
143
GND
142
VC
C
141
SYCBKC
140
TRNEMPC
139
RCVRDYC
138
TRNRDYC
137
/DSRC
136
/CTSC
135
RCVDTC
134
/RTSC
133
/DTRC
132
TRNDTC
131
/CSC
130
GND
129
SYCBKB
128
TRNEMPB
127
RCVRDYB
126
TRNRDYB
125
/DSRB
124
/CTSB
123
RCVDTB
122
/RTSB
121
/DTRB
41
/CI2
42
/CS2
43
/CD3
44
BR
K3
45
TRNEMP3
46
RCVRDY3
47
TRNRDY3
48
/CTS3
49
RCVDT3
50
/CI3
51
/CS3
52
D0
53
D1
54
D2
55
D3
56
GND
57
D4
58
D5
59
D6
60
D7
61
GND
62
VC
C
63
X1
64
X2
65
XOUT
66
TRCK
67
AB0
68
AB1
69
US1CH
70
PX
71
/POF
72
/RSRQ
73
/TRV
74
RXDATA0
75
TXE
76
/TRRQ
77
/TRQ1
78
/TRQ2
79
A0
80
A1
120
TRNDTB
119
/CSB
118
GND
117
SYCBKA
116
TRNEMPA
115
RCVRDYA
114
TRNRDYA
113
/DSRA
112
/CTSA
111
RCVDTA
110
/RTSA
109
/DTRA
108
TRNDTA
107
/CSA
106
UTST
105
DBTST
104
RCVCLK
103
TRNCLK
102
RES
101
GND
100
VCC
99
/W
98
/R
97
DB7
96
DB6
95
DB5
94
DB4
93
92
91
90
DB1
89
DB0
88
/RES
87
/WR
86
/RD
85
/OPTCS
84
A5
83
A4
82
A3
81
A2
GND
RST
SL32
RCVDT1
/CI1
/CS1
/CD2
DB2
DB3
2) Block diagram
3) Pin description
Pin
NO.
Name
ER-A770
I/O
Description 
1
SL00
VCC
ISU
RS-232/UNIT0
channel select
2
SL01
GND
ISU
3
SL02
GND
ISU
4
SL10
GND
ISU
RS-232/UNIT1
channel select
5
SL11
GND
ISU
6
SL12
GND
ISU
7
SL20
GND
ISU
RS-232/UNIT2
channel select
8
SL21
GND
ISU
9
SL22
GND
ISU
10
SL30
GND
ISU
RS-232/UNIT3
channel select
11
SL31
GND
ISU
12
SL32
GND
ISU
13
/CD0
/DCD1
IS
RS-232 control
signal /CD input
14
BRK0
BRK1
IS
RS-232 break signal
15
TRNEMP0
TRENMP1
IS
RS-232 transmission
buffer empty signal
16
RCVRDY0
RCVRDY1
IS
RS-232 data
reception enable
signal
17
TRNRDY0
TRNRDY1
IS
RS-232 transmission
enable signal
18
/CTS0
/CTS1
IS
RS-232 clear to send
signal
19
RCVDT0
RCVDT1
IS
RS-232 reception
data signal
20
VCC
VCC
+5V
21
GND
GND
GND
22
/CI0
/CI1
IS
RS-232 control
signal /CI input
23
/RTS0
/RTS1
O
RS-232 request to
send signal
Pin
NO.
Name
ER-A770
I/O
Description 
24
/CS0
/CS1
O
RS-232 chip select
signal 
25
/CD1
/DCD2
IS
RS-232 control
signal /CD input
26
BRK1
BRK2
IS
GND
27
TRNEMP1
TRENMP2
IS
GND
28
RCVRDY1
RCVRDY2
IS
GND
29
TRNRDY1
TRNRDY2
IS
GND
30
/CTS1
/CTS2
IS
+5V
31
RCVDT1
RCVDT2
IS
RS-232 reception
data signal
32
/CI1
/CI2
IS
RS-232 control
signal /CI input
33
/RTS1
/RTS2
O
RS-232 request to
send signal
34
/CS1
/CS2
O
RS-232 chip select
signal
35
/CD2
VCC
IS
+5V
36
TRNEMP2
TRENMP3
IS
GND
37
RCVRDY2
RCVRDY3
IS
GND
38
TRNRDY2
TRNRDY3
IS
GND
39
CTS2Z
/CTS3
IS
+5V
40
RCVDT2
RCVDT3
IS
GND
41
/CI2
VCC
IS
+5V
42
/CS2
/CS3
O
NU
43
/CD3
/SINT
IS
RS-232: /CD,
IN-LINE : /P1
44
BRK3
GND
IS
GND
45
TRNEMP3
GND
IS
GND
46
RCVRDY3
GND
IS
GND
47
TRNRDY3
GND
IS
GND
USART
A
USART
B
USART
C
USART
D
USART
OPC1
DATA BUS
OPC1~USART
OPC2
Common input
BAUD RATE GENERATOR
BAUD RATE GENERATOR
Pin
NO.
Name
ER-A770
I/O
Description 
48
/CTS3
GND
IS
GND
49
RCVDT3
GND
IS
GND
50
/CI3
GND
IS
GND
51
/CS3
/SRCS
O
RS-232/INLINE chip
select signal
52
D0
D0
IO
Data bus (CPU)
53
D1
D1
IO
Data bus (CPU)
54
D2
D2
IO
Data bus (CPU)
55
D3
D3
IO
Data bus (CPU)
56
GND
GND
GND
57
D4
D4
IO
Data bus (CPU)
58
D5
D5
IO
Data bus (CPU)
59
D6
D6
IO
Data bus (CPU)
60
D7
D7
IO
Data bus (CPU)
61
GND
GND
GND
62
VCC
VCC
+5V
63
X1
NC
O OSI14 NC
64
X2
#
I OSI14 System clock 
65
XOUT
CLK_USART
O
Clock (USART)
66
TRCK
NC
O
NC
67
AB0
AH0
O
Address bus for
USART
68
AB1
AH1
O
Address bus for
USART
69
US1CH
GND
IS
GND
70
PX
NC
O
NC
71
/POF
/POFF
IS
POFF signal
72
/RSRQ
/IRQ1
3S
RS232 INTRRUPT
73
/TRV
GND
IS
GND
74
RXDATA0
NC
O
NC
75
TXE
/SRESET
O
INLINE SOFT
RESET
76
/TRRQ
/TRQ2
3S
INLINE INTRRUPT
77
/TRQ1
/TRQ1
ON6
TIMER INTRRUPT
(RS232)
78
/TRQ2
NC
ON6
TIMER INTRRUPT
(INLINE)
79
A0
A0
I
Address bus for CPU
80
A1
A1
I
Address bus for CPU 
81
A2
A2
I
Address bus for CPU
82
A3
A3
I
Address bus for CPU
83
A4
A4
I
Address bus for CPU
84
A5
A5
I
Address bus for CPU
85
/OPTCS
/OPTCS
I
Option chip select
(from MPCA)
86
/RD
/RDO
I
Read signal (from
CPU)
87
/WR
/WRO
I
Write signal (from
CPU)
88
/RES
/RES
IS
Reset signal (from
CPU)
89
DB0
DB0
IO
DATA BUS (USART)
90
DB1
DB1
IO
DATA BUS (USART)
91
DB2
DB2
IO
DATA BUS (USART)
92
DB3
DB3
IO
DATA BUS (USART)
93
GND
GND
GND
94
DB4
DB4
IO
DATA BUS (USART)
95
DB5
DB5
IO
DATA BUS (USART)
96
DB6
DB6
IO
DATA BUS (USART)
Pin
NO.
Name
ER-A770
I/O
Description 
97
DB7
DB7
IO
DATA BUS (USART)
98
/R
/RDH
O
Read signal (to
USART)
99
/W
/WRH
O
Write signal (to
USART)
100
VCC
VCC
+5V
101
GND
GND
GND
102
RES
RES USART
O
Reset signal (to
USART)
103
TRNCLK
GND
I
GND
104
RCVCLK
GND
I
GND
105
DBTST
/SRCS
ID
RS-232/INLINE
USART chip select 
106
UTST
VCC
ID
+5V 
107
/CSA
/CS1
IS
USART_A chip
select 
108
TRNDTA
TXD1
O
RS-232 transmission
data signal 
109
/DTRA
/DTR1
O
RS-232 data
terminal ready signal
110
/RTSA
NC
O
NC 
111
RCVDTA
RCVDT1
IS
RS-232 reception
data signal
112
/CTSA
GND
IS
GND
113
/DSRA
/DSR1
IS
RS-232 data set
ready signal
114
TRNRDYA
TRNRDY1
O
RS-232 data
transmission enable
signal
115
RCVRDYA
RCVRDY1
O
RS-232 data
reception enable
signal
116
TRNEMPA
TRNEMP1
O
RS-232 transmission
buffer empty signal
117
SYCBKA
BRK1
IO
Break code detection
signal
118
GND
GND GND
119
/CSB
/CS2
IS
USART_B chip select
120
TRNDTB
TXD2
O
NC
121
/DTRB
/DTR2
O
NC
122
/RTSB
NC
O
NC
123
RCVDTB
RCVDT2
IS
GND
124
/CTSB
GND
IS
GND
125
/DSRB
/DSR2
IS
GND
126
TRNRDYB
TRNRDY2
O
NC
127
RCVRDYB
RCVRDY2
O
NC
128
TRNEMPB
TRNEMP2
O
NC
129
SYCBKB
BRK2
IO
NC
130
GND
GND
GND
131
/CSC
/CS3
IS
USART_C chip select
132
TRNDTC
TXD3
O
NC
133
/DTRC
/DTR3
O
NC
134
/RTSC
/RTS3
O
NC
135
RCVDTC
RCVDT3
IS
GND
136
/CTSC
GND
IS
GND
137
/DSRC
/DSR3
IS
GND
138
TRNRDYC
TRNRDY3
O
NC
139
RCVRDYC
RCVRDY3
O
NC
140
TRNEMPC
TRNEMP3
O
NC
141
SYCBKC
NC
IO
NC
Pin
NO.
Name
ER-A770
I/O
Description 
142
VCC
VCC
+5V
143
GND
GND
GND
144
/CSD
VCC
IS
+5V
145
TRNDTD
NC
O
NC 
146
/DTRD
NC
O
NC 
147
/RTSD
NC
O
NC 
148
RCVDTD
GND
IS
GND 
149
/CTSD
GND
IS
GND 
150
/DSRD
GND
IS
GND 
151
TRNRDYD
NC
O
NC 
152
RCVRDYD
NC
O
NC 
153
TRNEMPD
NC
O
NC 
154
SYCBKD
NC
IO
NC 
155
/WIN
/WRH
I
Write signal 
156
/RIN
/RDH
I
Read signal 
157
RSLCT0
AH0
I
Address bus 
158
RSLCT1
AH1
I
Address bus 
159
RST
RES USART
IS
Reset signal 
160
MCLK
CLK USART
I
Clock (4.91MHz)
I
TTL input
ID
TTL input with pull down
IS
TTL Schmidt input
ISU
TTL Schmidt input with pull up
IO
TTL I/O
3S
3-state Buffer (6mA)
ON6
Open drain (6mA)
2-4. Z80 CPU
1) Features
The extensive instruction set contains 158 instructions, including the
8080A instruction set as a subset.
NMOS version for low cost high performance solutions, CMOS
version for high performance low power designs.
Z0840006 - 6.17 MHz
CMOS Z84C0006 - DC to 6.17 MHz, Z84C008 - DC to 8 MHz,
Z84C0010 - DC to 10 MHz, Z84C0020 - DC - 20 MHz
6 MHz version can be operated at 6.144 MHz clock.
The Z80 microprocessors and associated family of peripherals can
be linked by a vectored interrupt system. This system can be
daisy-chained to allow implementation of a priority interrupt
scheme.
Duplicate set of both general-purpose and flag registers.
Two sixteen-bit index registers.
Three modes of maskable interrupts:
Mode 0 — 8080A similar;
Mode 1 — Non-Z80 environment, location 38H;
Mode 2 — Z80 family peripherals, vectored interrupts.
On-chip dynamic memory refresh counter.
2) Pin configuration
44Pin Quad Flat Pack (QFP), Pin Assignments
(Only available for 84C00)
DATA
BUS
ADDRESS
BUS
CPU
CONTROL
CPU
BUS
CONTROL
SYSTEM
CONTROL
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
D1
D2
D3
D4
D5
D6
D0
D7
M1
MREQ
IORQ
RD
WR
RFSH
HALT
WAIT
INT
NMI
RESET
BUSREQ
BUSACK
CLK
+5V
GND
Z8400
Z80 CPU
Figure 1. Pin functions
A4
A3
A2
A1
A0
GND
RFSH
M1
RESET
NC
A5
D3
D5
D6
+5V
D2
D7
D0
D1
NC
CLK
D4
1
11
33
23
22
12
34
44
Z80 CPU
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