DOWNLOAD Sharp ER-A490 (serv.man2) Service Manual ↓ Size: 978.13 KB | Pages: 57 in PDF or view online for FREE

Model
ER-A490 (serv.man2)
Pages
57
Size
978.13 KB
Type
PDF
Document
Service Manual
Brand
Device
ECR / ERA490 Service Manual
File
er-a490-sm2.pdf
Date

Sharp ER-A490 (serv.man2) Service Manual ▷ View online

Pin
No.
Signal
name
In/
Out
Function
105
DAX2
System clock (7.3728 MHz)
106
FCS
Fiscal memory chip select
107
MCR2
Nu
108
WAIT
Out
Wait request signal
109
EXWAIT
In
External wait control input signal
110
RA18
Out
Nu
111
RA17
Out
Nu
112
VSS
GND
113
RA16
Out
Nu
114
RA15
Out
Nu
115
RDO
Out
Expansion RD signal   
Option
116
WRO
Out
Expansion WR signal
117
EXINT3
In
Expansion interruption signal 3  
Option
118
EXINT2
In
Expansion interruption signal 2
119
EXINT1
In
Expansion interruption signal 1
120
EXINT0
In
Expansion interruption signal 0
121
OPTCS
Out
Chip select base signal for expansion
option
122
ROS1
Out
ROM 1 chip select signal
123
ROS2
Out
ROM 2 chip select signal
124
RAS2
Out
RAM 2 chip select signal
125
RAS1
Out
RAM 1 ship select signal
126
RJRST
In
Printer reset signal
127
RJTMG
In
Printer timing signal
128
DOT1
Out
Printer dot signal 4 (NU)
129
DOT2
Out
Printer dot signal 3 (NU)
130
DOT3
Out
Printer dot signal 2 (NU)
131
DOT4
Out
Printer dot signal 1 (NU)
132
GND
GND
133
DOT7
Out
Printer dot signal 7 (NU)
134
DOT6
Out
Printer dot signal 6 (NU)
135
DOT5
Out
Printer dot signal 5 (NU)
136
RJMTS
Out
Printer motor drive signal (NU)
137
RJMTD
Out
Printer motor drive signal (NU)
138
DOT9
Printer dot signal 9 (NU)
139
DOT8
Printer dot signal 8 (NU)
140
SYNC
Nu (+5V)
141
ASKRX
I/R input from I/R unit
142
VCC
+5V
143
GND
GND
144
Nu
145
RAS3
Out
Nu
146
RJMTR
In
Printer motor lock detection signal (NU)
147
SLMTD
In
Nu
148
SLMTS
In
Nu
149
SLMTR
In
GND
150
HTS2
Out
Nu
151
SCK2
Out
Nu
152
STH2
In
Nu
153
Nu
154
Nu
155
Nu
156
Nu
157
Nu
158
TWAIT
IN
TPRC Wait signal
159
DOTEN
Out
Dot drive enable signal (NU)
160
RASP
Nu
2-3. CKDC6 (HD404728A91FS)
1) General description
The CKDC6 is a 4-bit microcomputer developed for the ER-A495PN/
PF and provides functions to control the real-time clock, keys, and
displays. The basic functions of the CKDC6 are shown below.
Keys:
The CKDC6 is capable of controlling a maximum of 256
momentary keys. (Sharp 2-key rollover control)
Simultaneous scanning of key and switch
(When a key is scanned, the state of a mode and clerk
switch is also buffered. The host can scan the state of
switch together with the key entry data at the same time
the key is scanned.)
Switches:
Mode switch with 14 positions maximum
8-bit clerk (cashier) switch
2-bit feed switch
1-bit receipt on/off switch
1-bit option switch
4-bit general-purpose switch (1-bit is used for keyboard
select)
Displays:
16-column dot display
12-column 7-segment display (column digit selectable)
All column blink controlled for the dot and 7-segment
display decimal point and indicators
Programmable patterns for 7-segment display:
Four patterns
Internal driver for 7-segment display
Buzzer:
Single tone control
Clock:
Year, month, day of month, day of week, hour, minute
Alarm:
Hour, minute
Interrupt request (event control):
Detection of key input, switch position change, alarm
issue, and counter overflow
– 16 –
Fig. 2-5
2) Pin assignment
Pin
No.
Port
I/O
RESET
State
Signal
name
I/O Notes
PULL
 
UP
DOWN
1
R0
1
I/O
H-Z
SB
O DB4 : SEG-B 
PULL-DOWN
2
R0
2
I/O
H-Z
SC
O DB4 : SEG-C
PULL-DOWN
3
R0
3
I/O
H-Z
SD
O DB4 : SEG-D
PULL-DOWN
4
R1
0
I/O
H-Z
SE
O DB4 : SEG-E
PULL-DOWN
5
R1
1
I/O
H-Z
SF
O DB4 : SEG-F
PULL-DOWN
6
R1
2
I/O
H-Z
SG
O DB4 : SEG-G
PULL-DOWN
7
R1
3
I/O
H-Z
O DB7 : 7SEG COM
PULL-DOWN
8
R2
0
I/O
H-Z
O DB2 : DOT DP
PULL-DOWN
9
R2
1
I/O
H-Z
O DB3 : DOT COM
PULL-DOWN
10
R2
2
I/O
H-Z
DP
O DB5 : 7SEG DP
PULL-DOWN
11
R2
3
I/O
H-Z
ID
O DB5 : 7SEG  ID
PULL-DOWN
12
RA
0
I
I
MODR
I
MODE RETURN 
PULL-UP
13
RA
1
I
I
CFSR
I
CLEARK, FEED,
SWITCH RETURN  PULL-UP
14
R3
0
I/O
H-Z
KEX0
O KEY EXCHANGE0
15
R3
1
I/O
H-Z
KEX1
O KEY EXCHANGE1
16
R3
2
I/O
H-Z
NU
O GND
17
R3
3
I/O
H-Z
NU
O GND
18
R5
0
I/O
I
ST0
O KEY SCAN ST0
19
R5
1
I/O
I
ST1
O KEY SCAN ST1
20
R5
2
I/O
I
ST2
O KEY SCAN ST2
21
R5
3
I/O
I
ST3
O KEY SCAN ST3
22 R6
0
/INT0 I/O
I
POFF
I
P-OFF
Pin
No.
Port
I/O
RESET
State
Signal
name
I/O Notes
PULL
 
UP
DOWN
23 R6
1
/INT1 I/O
I
STOP
I
STOP
PULL-UP
24
R6
2
/INT2
I/O
I
DDIG
O +5V
25 R6
3
/INT3 I/O
I
DCS
O DOT DISPLAY CONT./CS
26
Vcc
VCC
+5V
27 R4
0
/SCK I/O
I
SCK
I
SCK
28
R4
1
/SI I/O
I
HTS
I
HTS
29
R4
2
/S0 I/O
I
STH
O STH
30 R4
3
/PWM I/O
I
SDISP
I
+5V
31
R7
0
/BUZZ
I/O
I
BUZZ
O BUZZER
32 R7
1/
SCK2 I/O
I
DSCK
O DOT DISP CONT.
SCK
33 R7
2
/SI2 I/O
I
SRES
O SYSTEM RESET
PULL-DOWN
34 R7
3
/S02 I/O
O
DS0
O DOT DISP CONT.
SO
35
R8
0
I/O
O
SHEN
O SHEN
36
R8
1
I/O
O
KRQ
O KEY REQUEST
37
R9
0
I
I
KR0
I
KEY RETURN 0
38
R9
1
I
I
KR1
I
KEY RETURN 1
39
R9
2
I
I
KR2
I
KEY RETURN 2
40
R9
3
I
I
KR3
I
KEY RETURN 3
41 RESET
I
I
CKDCR
I
CKDC IV RESET 
42
OSC2
4.19 MHz X’tal
43
OSC1
44
GND
GND
45
CL1
32.768 KHz OSC
46
CL2
47
TEST
I
I
VCKDC
5V
IRQ
SHEN
STH
HTS
SCK
POFF
STOP
SRES
CKDCR
HOST
SYSTEM
7SEG-DISPLAY 7DIG
DOT-DISPLAY 16DIG
G1
~
G
7
SA
~
S
G
P0
,1
,4
CKDC 6
P2,3
DI
G
0
0
DI
G
1
5
SE
G
0
0
SE
G
1
5
DOT DISP CONT.
M66004FP
SRES,DCS,DSCK,DSO
ST0~3
KEX0,1
DECODER
LS138
DECODER
LS138
KEY BOARD
MAX. 244key
DECODER
LS153
DECODER
LS153
D
ISPS
L
SKR
O
Q
BUZZ
BUZZER
CSFR
MODR
KR
0
~
3
– 17 –
Pin
No.
Port
I/O
RESET
State
Signal
name
I/O
Notes
PULL
 
UP
DOWN
48
D0
I/O
H-Z
G1
O 7 SEG DIG 1
PULL-DOWN
49
D1
I/O
H-Z
G2
O 7 SEG DIG 2
PULL-DOWN
50
D2
I/O
H-Z
G3
O 7 SEG DIG 3
PULL-DOWN
51
D3
I/O
H-Z
G4
I
7 SEG DIG 4
PULL-DOWN
52
D4
I/O
H-Z
G5
O 7 SEG DIG 5
PULL-DOWN
53
D5
I/O
H-Z
G6
O 7 SEG DIG 6
PULL-DOWN
54
D6
I/O
H-Z
G7
O 7 SEG DIG 7
PULL-DOWN
55
D7
I/O
H-Z
G8
O 7 SEG DIG 8
PULL-DOWN
56
D8
I/O
H-Z
G9
O 7 SEG DIG 9
PULL-DOWN
57
D9
I/O
H-Z
G10
O 7 SEG DIG 10
PULL-DOWN
58
D10
I/O
H-Z
NU
O
PULL-DOWN
59
D11
I/O
H-Z
NU
O
60
D12
I/O
H-Z
NU
O
61
D13
I/O
H-Z
NU
O
62
D14
I/O
H-Z
NU
O
63
D15
I/O
H-Z
NU
O
64
R0
0
I/O
H-Z
SA
O DB4 : SEG-A
PULL-DOWN
NOTE 3: Pull-up/down in the table indicates that the lines concerned
require external pull-up/down resistance.
2-4. TPRC1 (F258024PC)
1) General
TPRC1 is the LSI circuit of the peripheral circuits of the microcom-
puter required for thermal printer control. 
Fig. 2-6
The CPU is designed for use with H8/500. The bus I/F, however, is
not restricted to the design concept. 
The printer is designed mainly for use with PR-58. However, the
thermalhead composition (the dot number and the block number) is
rather flexible. 
1. Auto cutter (Option)
2. Pulse motor
3. Thermalhead
4. Switch
CG ROM
PHAI
INT
WAIT
RD
WR
D0~7
A0~23
CPU
(H8/500)
POF,RES
TPRC1
PB RAM
(SRAM)
Auto cutter Pulse motor
Thermal
head
Switch
sensor
SO
CLOCK
SI
LATCH
ST1~4
HCD
PHUP,PSP,
PST,POP
C
T
AO
,C
TB
O
PF
P
,PC
R
E
S
XRS,XJ
S
RVP
O
N,
J
VPON
RT
R
M
,P
T
J
M
BA0
~
1
5
BD
0
~
2
BR
D
BW
R
BR
A
S
(B
RA
S)
– 18 –
2) Pin configuration
Fig. 2-7
1
GND
2
GND
3
ST1
4
5
ST2
6
ST3
7
ST4
8
ST5
9
ST6
10
LATCH
11
12
13
14
SI
15
SO
16
CLOCK
17
INHDEC
18
CSEN
19
TEST2
20
21
22
23
24
TEST1
25
D0
26
D1
27
D2
28
D3
29
D4
30
31
32
33
D5
34
D6
35
D7
36
A0
37
A1
38
A2
39
NU
40
16
0
15
9
15
8
R
ES
ET
157
B
R
A
S
15
6
B
R
A
S
15
5
B
D
0
15
4
B
D
1
153
B
D
2
15
2
15
1
15
0
149
B
D
3
148
B
D
4
14
7
14
6
B
D
5
14
5
B
D
6
144
B
D
7
1
4
3
BA0
14
2
14
1
140
13
9
P
H
A
I
13
8
B
A
1
13
7
B
A
2
136
B
A
3
1
3
5
BA4
13
4
B
A
5
13
3
B
A
6
132
13
1
13
0
12
9
B
A
7
128
B
A
8
127
B
A
9
12
6
B
A
1
0
12
5
B
A
1
1
12
4
B
A
1
2
123
P
.P
12
2
12
1
41
42
BA
C
K
43
A3
44
A4
45
A5
46
A6
47
A7
48
A8
49
A9
50
51
52
53
A1
0
54
A1
1
55
A1
2
56
A1
3
57
A1
4
58
A1
5
59
A1
6
60
61
62
63
A1
7
64
A1
8
65
A1
9
66
A2
0
67
A2
1
68
A2
2
69
A2
3
70
71
72
RD
73
WR
74
AS
75
PO
F
76
IN
T
77
WO
78
79
BREQ
80
120
PTJM
119
PTRM
118
BA13
117
BA14
116
BA15
115
BRD
114
BWR
113
CGS
112
111
110
109
JAS
108
JBS
107
JCS
106
JDS
105
RAS
104
RBS
103
102
101
100
99
98
97
RCS
96
RDS
95
CTAO
94
CTBO
93
VHCOM
92
JVPON
91
90
89
88
RVPON
87
PFP
86
PCRES
85
PHUP
84
JPE
83
ROE
82
EBACK
81
EBREQ
GND
GND
GND
GND
VCC
VCC
VCC
VCC
GND
GND
GND
INTI
WI
GN
D
GN
D
GN
D
VC
C
VCC
VCC
GND
GN
D
IN
H
NU
GND
GND
GND
VCC
VCC
VCC
VCC
VCC
GND
GND
GND
GND
GND
GND
GND
GN
D
GN
D
VCC
VCC
VC
C
GND
GN
D
GND
GND
NU
GN
D
– 19 –
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