Sharp ER-A490 (serv.man2) Service Manual ▷ View online
3) Pin description
Pin
No.
Symbol
Signal
name
In/
Out
Function
1
RES
RESET
I/O
Reset input
2
NMi
NMi
In
Non-maskable interrupt input
for SSP interrupt input.
for SSP interrupt input.
3
VSS
NU
In
GND
4
D0
Nu
In
GND
5
D1
Nu
In
GND
6
D2
Nu
In
GND
7
D3
Nu
In
GND
8
D4
Nu
In
GND
9
D5
Nu
In
GND
10
D6
Nu
In
GND
11
D7
Nu
In
GND
12
D8
D0
I/O
Data bus
13
D9
D1
I/O
Data bus
14
D10
D2
I/O
Data bus
15
D11
D3
I/O
Data bus
16
D12
D4
I/O
Data bus
17
D13
D5
I/O
Data bus
18
D14
D6
I/O
Data bus
19
D15
D7
I/O
Data bus
20
VSS
NU
In
GND
21
A0
A0
Out
Address bus
22
A1
A1
Out
Address bus
23
A2
A2
Out
Address bus
24
A3
A3
Out
Address bus
25
A4
A4
Out
Address bus
26
A5
A5
Out
Address bus
27
A6
A6
Out
Address bus
28
A7
A7
Out
Address bus
29
A8
A8
Out
Address bus
30
A9
A9
Out
Address bus
31
A10
A10
Out
Address bus
32
A11
A11
Out
Address bus
33
A12
A12
Out
Address bus
34
A13
A13
Out
Address bus
35
A14
A14
Out
Address bus
36
A15
A15
Out
Address bus
37
VSS
NU
In
GND
38
A16
A16
Out
Address bus
39
A17
A17
Out
Address bus
40
A18
A18
Out
Address bus
41
A19
A19
Out
Address bus
42
A20
A20
Out
Address bus
43
A21
A21
Out
Address bus
44
A22
A22
Out
Address bus
45
A23
A23
Out
Address bus
46
VSS
NU
In
GND
47
P30
WAIT
In
Wait signal
48
P31
BACK
Out
Bus control request
acknowledge
acknowledge
49
P32
BREQ
In
Bus control request
50
P33
DOPS
In
Drawer open signal
51
P34
DR0
Out
Drawer open signal
52
P35
DR1
Out
Remote drawer open signal
53
P36
DR3
Out
Remote drawer No.3 open
signal (NU)
signal (NU)
54
P37
DR4
Out
Remote drawer No.4 open
signal (NU): GND
signal (NU): GND
55
VCC
VCC
In
+5V
56
P40
NU
Out
NU
57
P41
PTMG
In
Printer timing signal
Pin
No.
Symbol
Signal
name
In/
Out
Function
58
P42
NU
Out
NU
59
P43
NU
Out
NU
60
P44
PRST
In
Printer reset signal
61
P45
NEJ
In
Near end sensor journal side
62
P46
SHEN
In
CKDC Interface shift enable
signal
signal
63
P47
OPBS
Out
Option ROM/RAM PWB sens
signal
signal
64
VSS
VSS
In
GND
65
P50
TRGI
Out
NC
66
P51
NU
Out
NC
67
P52
NU
Out
NC
68
P53
NU
In
GND
69
P54
NU
Out
NC
70
P55
NU
In
GND
71
P56
NU
Out
NC
72
P57/STOP
STOP
Out
System reset output. Normally
73
P60
NU
Out
NC
74
P61
J1
In
Thermal head rank: J1
75
P62
J2
In
Thermal head rank: J2
76
P63
NU
In
NC
77
P64
NU
Out
NC
78
P65
NU
Out
NC
79
P66/RCO
RCO
In
+5V
80
P67
NU
In
GND
81
VSS
NU
In
GND
82
AVSS
NU
In
GND
83
AN0
Vrf
In
84
AN1
NU
In
GND
85
AN2
VPTEST
In
+24V test input
86
AN3
TM
In
87
AVCC
AVCC
In
+5V
88
VCC
VCC
In
+5V
89
IRQ0
IRQ0
In
Interrupt signal 0
90
IRQ1
IRQ1
In
Interrupt signal 1 (RS-232C)
91
SCK1
UASCK
In
I/R control signal (Shift clock)
92
SCK2
SCK1
In
CKDC Interface sync shift
clock
clock
93
RXD1
/UARX
In
I/R control signal
(Receive data)
(Receive data)
94
TXD1
/UATX
Out
I/R control signal
(Transmit data)
(Transmit data)
95
RXD2
RXD2
In
CKDC Interface shift input
data
data
96
TXD2
TXD2
Out
CKDC Interface shift output
data
data
97
VSS
NU
In
GND
98
EXTAL
EXTAL
In
Crystal oscillator connection
99
XTAL
XTAL
In
Crystal oscillator connection
100
VSS
NU
In
GND
101
PHAI
PHA1
Out
System clock
102
E
NU
Out
NC
103
AS
AS
Out
Address strobe
104
RD
RD
Out
Read
105
HWR
WR
Out
Write
106
LWR
LWR
Out
Nu
107
RFSH
RFSH
Out
Refresh cycle
108
VCC
VCC
In
+5V
109
MD0
MD0
In
+5V (MODE 3)
110
MD1
MD1
In
+5V (MODE 3)
111
MD2
MD2
In
GND (MODE 3)
112
STBY
STBY
In
+5V (Nu)
12
2-2. G.A (MPCA6)
1) Pin configuration
GATE ARRAY (LZ9AH30)
MPCA6
Fig. 2-3
1
RF
2
JF
3
PCUT
4
FCUT
5
VF
6
STAMP
7
SLF
8
SLRS
9
SLMTD
10
RES
11
TRG
12
TRG
13
POFF
14
INT1
15
HTS1
16
SCK1
17
STH1
18
NU
19
NU
20
VCC
21
GND
22
NU
23
VRESC
24
SLTMG
25
SLRST
26
AS
27
RD
28
WR
29
PHAI
30
SDT7
31
SDT6
32
SDT5
33
GND
34
SDT4
35
SDT3
36
SDT2
37
SDT1
38
D0
39
D1
40
D2
16
0
N
U
159
D
O
T
E
N
158
T
W
A
IT
157
N
U
15
6
N
U
155
N
U
154
N
U
153
N
U
15
2
S
TH
2
151
S
C
K
2
150
H
T
S
2
149
S
L
M
T
R
14
8
S
L
M
T
S
147
S
L
MT
D
146
R
JM
T
R
145
R
A
S
3
14
4
N
U
14
3
G
N
D
142
V
C
C
141
A
S
K
R
X
140
N
U
13
9
N
U
138
N
U
137
R
JM
T
D
136
R
JM
T
S
13
5
D
T
5
134
D
T
6
133
D
T
7
132
G
N
D
13
1
D
T
1
130
D
T
2
129
D
T
3
128
D
T
4
12
7
R
JT
MG
1
2
6
RJ
RST
125
R
A
S
1
124
R
A
S
2
12
3
R
O
S
2
12
2
R
O
S
1
121
O
P
T
C
S
41
D3
42
GND
43
D4
44
D5
45
D6
46
D7
47
SSPRQ
48
RESET
49
INT
2
50
IN
T
3
51
RXDI
52
TX
D
I
53
SC
K
I
54
IR
Q
0
55
A0
56
A1
57
A2
58
A3
59
A4
60
A5
61
GN
D
62
VCC
63
A6
64
A7
65
A8
66
A9
67
A1
0
68
A1
1
69
A1
2
70
A1
3
71
A1
4
72
A1
5
73
A1
6
74
A1
7
75
A1
8
76
A1
9
77
A2
0
78
A2
1
79
A2
2
80
NU
120
EXINT0
119
EXINT1
118
EXINT2
117
EXINT3
116
WRO
115
RDO
114
RA15
113
RA16
112
GND
111
RA17
110
RA18
109
EXWAIT
108
WAIT
107
NU
106
MCR1
105
NU
104
DAX1
103
RCKX
102
IRRX
101
GND
100
VCC
99
UATX
98
UARX
97
UASCK
96
IRTX
95
RCO
94
NU
93
NU
92
NU
91
NU
90
MA15
89
TEST
88
MD0
87
MD1
86
IPLON
85
INT4
84
PRST
83
PTMG
82
TRGI
81
A23
13
2) Block diagram
Fig. 2-4
MTD
MTD
RJMTR
SLMTD
SLMTS
SLMTR
SLMTD
TXDI
SCKI
RXDI
HTS1
SCK1
STH1
HTS2
SCK2
STH2
ROS1
ROS2
RAS1
RAS2
RAS3
OPTCS
AS
RD
WR
RDO
WRO
Φ
RESET
RES
VRESC
POFF
MD0
MD1
MD1
WAIT
RJRST
SLRST
*PRST
RJTMG
SLTMG
PTMG
INT4
INT1
INT2
INT3
EXINT0
EXINT1
EXINT2
EXINT3
SD
T1
~7
T1
~7
DT
1
1
~
9
TEST
IRQ0
A23~A0
SSPRQ
SL
F
F
SL
R
R
S
VF
RF
JF
F
CUT
PC
U
U
T
STAM
P
TR
G
G
I
TR
G
G
TR
G
G
DO
T
T
E
N
IRLON
D0~D7
Φ
Address decode
External CS
Internal CS
Internal CS
RASEL
Image
control
Image
control
SSP comparison register
BAR.
Buffer
Read/write
control
control
Divider
CHS
serial select
serial select
Multiplexer
WAIT
control
control
CAPS
select
select
Print gate
Print pulse control
Print mode PMD
INTO
control
control
Printer control port
Motor
drive
drive
* Output selection with CAPS.
PRST/PTMG.
PRST/PTMG.
EXWAIT
I/R Control
IRTX
IRRX
RCI
ASKRX
14
3) Pin description
Pin
No.
Signal
name
In/
Out
Function
1
RF
Out
Receipt side paper feed solenoid (NU)
2
JF
Out
Journal side paper feed solenoid (NU)
3
PCUT
Out
Printer partial cut signal (NU)
4
FCUT
Out
Printer auto cut signal (NU)
5
VF
Out
Multi line validation paper feed (NU)
6
STAMP
Out
Printer stamp signal (NU)
7
SLFS
Out
Slip printer paper feed singnal (NU)
8
SLRS
Out
Slip printer release signal (NU)
9
SLMTD
Out
Slip printer motor drive signal (NU)
10
RES
Out
Peripheral output reset
11
TRG
Out
Dot head trigger signal (NU)
12
TRG
Out
Dot head trigger signal (NU)
13
POFF
In
Power off signal input
14
KRQ
In
Interrupt signal (Key interrupt request)
15
HTS1
Out
8 bit serial port output
16
SCK1
Out
Serial port shift clock output
17
STH1
In
8 bit serial port input
18
RAS VZ
—
Chip select (NU)
19
—
—
Nu
20
VCC
—
+5V
21
VSS
—
GND
22
INTMCR
—
Interrupt (NU)
23
VRESC
Out
Turns active when reset and power down
is met
is met
24
SLTMG
In
Slip printer timing signal (NU)
25
SLRST
In
Slip printer reset signal (NU)
26
AS
In
Address strobe
27
RD
In
Read strobe
28
WR
In
Write strobe
29
PHI
In
(
φ
) System clock (7.3728 MHz)
30
SDT7
Out
Slip printer printhead drive signal (dot7)
(NU)
(NU)
31
SDT6
Out
Slip printer printhead drive signal (dot6)
(NU)
(NU)
32
SDT5
Out
Slip printer printhead drive signal (dot5)
(NU)
(NU)
33
VSS
—
GND
34
SDT4
Out
Slip printer printhead drive signal (dot4)
(NU)
(NU)
35
SDT3
Out
Slip printer printhead drive signal (dot3)
(NU)
(NU)
36
SDT2
Out
Slip printer printhead drive signal (dot2)
(NU)
(NU)
37
SDT1
Out
Slip printer printhead drive signal (dot1)
(NU)
(NU)
38
D0
I/O
Data bus 0
39
D1
I/O
Data bus 1
40
D2
I/O
Data bus 2
41
D3
I/O
Data bus 3
42
VSS
—
GND
43
D4
I/0
Data bus 4
44
D5
I/0
Data bus 5
45
D6
I/0
Data bus 6
46
D7
I/0
Data bus 7
47
SSPRQ
Out
SSP interrupt request to CPU
48
RESET
In
MPCA reset
49
TPRCRQ2
In
TPRC Interrupt signal
Pin
No.
Signal
name
In/
Out
Function
50
INT3
In
Interrupt signal (Nu)
51
RXD2
Out
8 bit serial port output to CPU
52
TXD2
In
8 bit serial port input from CPU
53
SCK1
In
Serial port shift clock input from CPU.
54
IRQ0
Out
Interrupt request to CPU
55
A0
In
Address bus 0
56
A1
In
Address bus 1
57
A2
In
Address bus 2
58
A3
In
Address bus 3
59
A4
In
Address bus 4
60
A5
In
Address bus 5
61
VSS
—
GND
62
VCC
—
+5V
63
A6
In
Address bus 6
64
A7
In
Address bus 7
65
A8
In
Address bus 8
66
A9
In
Address bus 9
67
A10
In
Address bus 10
68
A11
In
Address bus 11
69
A12
In
Address bus 12
70
A13
In
Address bus 13
71
A14
In
Address bus 14
72
A15
In
Address bus 15
73
A16
In
Address bus 16
74
A17
In
Address bus 17
75
A18
In
Address bus 18
76
A19
In
Address bus 19
77
A20
In
Address bus 20
78
A21
In
Address bus 21
79
A22
In
Address bus 22
80
LCDC
—
LCD CS (NU)
81
A23
In
Address bus 23
82
TRGI
In
Dot pulse control/drive signal (GND)
83
PTMG
Out
Printer timing signal
84
PRST
Out
Printer reset signal
85
INT4
In
Interrupt signal (+5V)
86
IPLON
In
To option connector
87
MD1
In
Mode select input (GND)
88
MD0
In
Mode select input (GND)
89
TEST
In
+5V
90
MA15
—
Image address 15
91
MA18
—
Nu
92
MA19
—
Nu
93
RCVRDY1
—
Nu (+5V)
94
RCVRDY2
—
Nu (+5V)
95
RC0
—
Remote control encord signal for CPU
96
IRTX
—
I/R output for LED
97
UASCK
—
I/R serial data shift clock
98
UARX
—
I/R serial data for CPU
99
UATX
—
I/R serial data from CPU
100
VCC
—
+5V
101
VSS
—
GND
102
IRRX
—
I/R input from I/R unit
103
RCRX
—
I/R input from I/R unit
104
DAX1
—
System clock (7.3728MHz)
15
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