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5

RF Specifications

6

The frequency range of 1.88 GHz-1.90 GHz is used. Transmitting and receiving carrier between base unit and handset is same fre-
quency. Refer to.

This system is the cycles of 1oms and  has 12 physical duplex paths.  
Maxmum duplex communication path is 8  in Full slot and 4 in Long slot because of securement of free slots for Hand over.

A link is established between base unit and handset.
The state where duplex communication is performed.
Handset doesn't make up duplex in no free RF channels because of interference. (*1)

Base unit sends Dummy-data to the all stand-by state handsets.
Handsets receive that data for synchronization and monitoring request from the base unit.
Base unit doesn't send Dummy bearer in no free RF channels because of interference. (*1)

(*1) It is a feature under FCC 15 regulation and for interference avoidance.
In the case of checking RF parts, it is better in least interference condition.
A model in an FCC-unapplied area adopts too it and calls on best channel in air. 

7

DCX81

DCX81

Q

SPI

Fl

ash

(64Mbit)

JT

A

G

TD

M

(PCM)

(MSG)

ANT

1

ANT

2

Q

SPI

Fl

ash

(64Mbit)

JT

A

G

UART

UART

Xt

a

l

13.824M

XI

N

 

SPMIC

HS

M

IP

HS

M

IN

SPEAKER

Hands

et  

MIC

Hands

et  

Rec

eiv

e

r

Heads

et  

Mic

/Rec

eive

r

H

SSPO

U

T

P

MI

P

MI

N

SPOU

T

P

SPOU

T

N

LI

N0 or 

1

LOUT

Key

(32)

Triangle 

Ma

tr

ix

1.8” LCD

128*160

Truly

D

rIC

:H

X

8

3

5

3

QSPI

JTAG

 I/F

UART I/F

KBIO 1-9

SPI2

3.

2V

BE

LL (B

LUE)

4.

5V

LCD_BL1

LCD_BL2

TX

R

E

Q

2

READY1

QSPI

JTAG

 I/F

UART I/F

XI

N

 

RSTN

XOU

T

 

+

-

108pin

B

OOT

Res

et

88pin

SPIM<-

->SPI2

SPIM

Mas

ter

SPI2

Slave

TD

M

TD

M

SPI

Hands

hak

e

SPI

Hands

hak

e

RF Circuit

RF

I/F

HOOK_DE

T

HEAD

SET_D

ET

DCI

N0

DCI

N2

GP

IO

9

LE

DS

IN

K

1

LE

DS

IN

K

2

DC

 jack

3.2v

DC

/DC

4.5V

Reg

ulator

Reset

4.5V

3.2V

IC7

IC3

Q1

1.8V

VDD_APU

1.2V

COREOUT

RSTN

1.8V

1.8V

1.8V

Master

Slave

VDD_APU

1.2V

COREOUT

8

• IC1 is main MPU which controls this system and handles LED,LCD,Key scan ,detecter and RF process.
• IC2 is sub MPU which handles acoustic processing and have audio interface.
• IC3 is DC/DC Convertor.
• IC4 is Flash ROM which connected to IC1.
• IC5 is Flash ROM which connected to IC2.
• IC6 is buffer amprifier for base clock.
• IC7 is detector of power supply voltage.

The power supply of each IC is as follows.

IC7 detect divided voltage of VIN.
When VIN is over 5.6V,  IC7 outputs Hi-level to IC1 with more than 20 ms of delay.
After IC1 starts, IC1 resets IC2 and outputs BOOT signal to IC2.

DC

Jack

IC3
DC/DC

IC

䠍

Main MPU

IC2
Sub MPU

Q1
TR Regurator

IC4
QSPI
FLASH

IC5
QSPI
FLASH

LCD Back light
/Ringer LED

1.2V

1.8V

1.8V

3.2V

4.5V

IC6
CLK Buffer

1.2V

IC7
RESET

R8,R9
voltage-
dividing

RESET of IC2

L108

L101

L201

BOOT

F1

䠚20ms

0.6ms

1s

VIN

IC1 RSTN

IC2 RSTN