Panasonic KX-NS0154CE (serv.man2) Service Manual ▷ View online
37
KX-NS0154CE
15 Appendix Information of Schematic Diagram
Note:
1. DC voltage measurements are taken with an oscilloscope or a tester with a ground.
2. The schematic diagrams and circuit board may be modified at any time with the development of new technology.
2. The schematic diagrams and circuit board may be modified at any time with the development of new technology.
38
KX-NS0154CE
16 Exploded View and Replacement Parts List
16.1. IC Data
16.1.1.
IC100 (DVF99)
Pin No.
Terminal Name
Contents of Control
I/O setting
Remark
A1
GND
GND
GND
A2
MEMXA2_EXTINT4
not used
O
A3
MEMXA3_LCDGP0
not used
O
A4
DDR_REF2
DDR Reference Voltage Input
I
A5
DDRDQS1_N
DDR Data Strobe 1 Negative
I/O
A6
DDRDQS1
DDR Data Strobe 1 Positive
I/O
A7
DDRDQ0
DDR Data
I/O
A8
DDRDQS0_N
DDR Data Strobe 0 Negative
I/O
A9
DDRDQS0
DDR Data Strobe 0 Positive
I/O
A10
DDRDQ5
DDR Data
I/O
A11
DDR_REF1
DDR Reference Voltage Input
I
A12
DDRODT0
DDR On-Die Termination
O
A13
DDRCKELP
DDR Low Power Clock Enable (Not used)
O
A14
DDRWE_N
DDR Write Enable Active Low
O
A15
DDRCLK1
DDR Diff Clock 1 Positive (Not used)
O
A16
DDRCLK1_N
DDR Diff Clock 1 Negative (Not used)
O
A17
DDRCLK0
DDR Diff Clock 0 Positive
O
A18
DDRCLK0_N
DDR Diff Clock 0 Negative
O
A19
DDRA7
DDR Command/Address Bus
O
B1
MEMXA0_LCDD22
IC501 reset
O
B2
MEMXA4_LCDGP1
IC502 reset
O
B3
MEMXA1_LCDD23
not used
O
B4
DDRDQ8
DDR Data
I/O
B5
DDRDQ11
DDR Data
I/O
B6
DDRDM1
DDR Data Mask
O
B7
DDRDQ1
DDR Data
I/O
B8
DDRDQ2
DDR Data
I/O
B9
DDRDQ4
DDR Data
I/O
B10
DDRDQ7
DDR Data
I/O
B11
DDRCS1
DDR CS (Not used)
O
B12
DDRCAS_N
DDR Column Select Active Low
O
B13
DDRRAS_N
DDR Row Select Active Low
O
B14
DDRBA1
DDR Bank Address Bus
O
B15
DDRA0
DDR Command/Address Bus
O
B16
DDRA3
DDR Command/Address Bus
O
B17
DDRA6
DDR Command/Address Bus
O
B18
DDRA10
DDR Command/Address Bus
O
B19
DDRA14
DDR Command/Address Bus (Not used)
O
C1
MEMXA6_LCDGP3
not used
O
C2
MEMXA10_LCDGP7
not used
O
C3
MEMXA5_LCDGP2
not used
O
C4
DDR_RTT
DDR Receiver Termination Compensation
I
C5
DDRDQ10
DDR Data
I/O
C6
DDRDQ12
DDR Data
I/O
C7
DDRDQ14
DDR Data
I/O
C8
DDRDQ3
DDR Data
I/O
C9
DDRDQ6
DDR Data
I/O
C10
DDRCS0
DDR CS
O
C11
DDRODT1
DDR On-Die Termination (Not used)
O
C12
DDRA1
DDR Command/Address Bus
O
C13
DDRBA2
DDR Bank Address Bus
O
C14
DDRA2
DDR Command/Address Bus
O
C15
DDRA5
DDR Command/Address Bus
O
C16
DDRA8
DDR Command/Address Bus
O
C17
DDRA12
DDR Command/Address Bus
O
C18
DDR_REF0
DDR Reference Voltage Input
I
C19
SPI2DO
SPI2 Serial Data Out
O
D1
MEMXA13_BA0_LCDD1
not used
O
D2
MEMXA7_LCDGP4
not used
O
39
KX-NS0154CE
D3
MEMXA14_BA1_LCDD8
not used
O
D4
MEMXA16
not used
O
D5
DDRDQ9
DDR Data
I/O
D6
DDRDQ13
DDR Data
I/O
D7
DDRDQ15
DDR Data
I/O
D8
DDRDM0
DDR Data Mask
O
D9
DDRRST_N
DDR Reset Active Low (Not used)
O
D10
DDRCKE
DDR Clock Enable
O
D11
DDRBA0
DDR Bank Address Bus
O
D12
VDD
1.2 V Core
PI
D13
DDRA4
DDR Command/Address Bus
O
D14
DDRA9
DDR Command/Address Bus
O
D15
DDRA11
DDR Command/Address Bus
O
D16
DDRA13
DDR Command/Address Bus (Not used)
O
D17
SPI2DI
SPI2 Serial Data In
I
D18
SPI2CK
SPI2 Clock
O
D19
D1RX
TDM1 RX Data
I
E1
MEMXA20_MEMRAS_LCDD16
not used
O
E2
MEMXA9_LCDGP6
not used
O
E3
MEMXA8_LCDGP5
not used
O
E4
MEMRD
not used
O
E5
VDD
1.2 V Core
PI
E6
VDD
1.2 V Core
PI
E7
VDDIO_DDR
DDR I/O
PI
E8
VDD
1.2 V Core
PI
E9
GND
GND Connection
GND
E10
VDDIO_DDR
DDR I/O
PI
E11
PLL2_DVDD
PLL2 Digital
PI
E12
E_VDDRQ
2.5 V Power Supply for Filtering (Not usd)
PO
E13
PLL1_DVDD
PLL1 Digital
PI
E14
DDRPADLO
DDR Low Drive Strength
I
E15
SPI1CK
SPI1 Clock
O
E16
DDRPADHI
DDR High Drive Strength
I
E17
SPI1DO
SPI1 Serial Data Out
O
E18
F1SYNC
TDM1 Frame Sync
I
E19
XI25M
Clock input (13.824MHz for internal clock)
I
F1
MEMCKE_EXTINT13
not used
O
F2
MEMXA19_MEMCAS_LCDD9
not used
O
F3
MEMXA11_LCDGP8
not used
O
F4
MEMXA15
not used
O
F5
VDDIO_DDR
DDR I/O
PI
F6
VDDIO_DDR
DDR I/O
PI
F7
VDDIO_DDR
DDR I/O
PI
F8
VDDIO_DDR
DDR I/O
PI
F9
VDDIO_DDR
DDR I/O
PI
F10
VDDIO_DDR
DDR I/O
PI
F11
PLL2_AVDD
PLL2 Analog
PI
F12
PLL1_AVSS
PLL1 Analog GND
P
F13
PLL1_AVDD
PLL1 Analog
PI
F14
SPI1CS0
SPI1 CS
O
F15
D1TX
TDM1 TX Data
O
F16
TEST
Test Mode Select (Not used)
I
F17
T1SCLK
TDM1 SCLK
I
F18
TRST
JTAG Reset
I
F19
XO25M
25 MHz Crystal Feedback (Not used)
O
G1
MEMCLK
Memory Clock (Not used)
O
G2
MEMXA12_EXTINT14
Memory Address (Not used)
O
G3
MEMCS0_LCDD0
not used
O
G4
MEMCS1_LPCLK
not used
O
G5
VDDIO
General I/O
PI
G6
GND
GND Connection
P
G7
GND
GND Connection
P
G8
GND
GND Connection
P
G9
GND
GND Connection
P
G10
GND
GND Connection
P
G11
VDDIO_DDR
DDR I/O
PI
G12
PLL2_AVSS
PLL2 Analog GND
P
Pin No.
Terminal Name
Contents of Control
I/O setting
Remark
40
KX-NS0154CE
G13
PLL3_DVDD
PLL3 Digital
PI
G14
SPI1DI
SPI2 Serial Data In
I
G15
TCK
JTAG Clock
I
G16
TDI
JTAG Data In
I
G17
EXTINT15_SYNCPORT
IC501 SPI handshake
I
G18
RF_RADIO_EN_EXTINT9
IC503 SPI handshake
O
G19
MAIN_CLK_OUT
DVF-DCX(IC503) handshake for SPI
I
H1
MEMXD8_LCDD12
PHY RESET
O
H2
MEMDQMBLS0_LCDD17
not used
O
H3
MEMCS2_EXTINT6
Timer from PHY
I
H4
MEMCS3_EXTINT7
not used
O
H5
VDD
1.2 V Core
PI
H6
VDDIO
General I/O
PI
H7
GND
GND Connection
P
H8
GND
GND Connection
P
H9
GND
GND Connection
P
H10
GND
GND Connection
P
H11
GND
GND Connection
P
H12
GND
GND Connection
P
H13
PLL3_AVSS
PLL3 Analog GND
P
H14
ETEST
EFUSE Test signal (Not used)
I
H15
TMS
JTAG Mode Select
I
H16
TDO
JTAG Data Out
O
H17
RF_SDATA_IN_SD_D3
IC503 SPI handshake
O
H18
RF_TR_DATA_EXTINT10
IC501 SPI handshake
I
H19
RF_SLOT_CTRL_SD_DETECT
IC501 SPI handshake
O
J1
MEMXD9_LCDD13
not used
O
J2
MEMXD7_LCDD11
Blue LED control
O
J3
MEMDQMBLS1_EXTINT5
not used
O
J4
MEMWR
Memory Write (Not used)
O
J5
VDDIO
General I/O
PI
J6
GND
GND Connection
P
J7
GND
GND Connection
P
J8
GND
GND Connection
P
J9
GND
GND Connection
P
J10
GND
GND Connection
P
J11
GND
GND Connection
P
J12
OSC25M_VSS
Oscillator 25 MHz GND
P
J13
OSC25M_VDD12
Oscillator 25 MHz 1.2 V
PI
J14
IF_T_DATA
GPIO (Not used)
O
J15
IF_RX1
IC501 SPI handshake
O
J16
RF_SEN_SD_WR_PROT
IC501 SPI handshake
O
J17
RF_SCLK_SD_D2
IC501 SPI handshake
O
J18
RF_SDATA_OUT_SD_D1
IC501 SPI handshake
O
J19
IF_EN_DA
TDM-DRX for IC503
I
K1
MEMXD6_LCDD10
Red LED control
O
K2
MEMXD5_LCDD7
Green LED control
O
K3
MEMXD10_LCDD14
not used
O
K4
MEMXD11_LCDD15
not used
O
K5
VDD
1.2 V Core
PI
K6
GND
GND Connection
P
K7
GND
GND Connection
P
K8
GND
GND Connection
P
K9
GND
GND Connection
P
K10
GND
GND Connection
P
K11
GND
GND Connection
P
K12
VDDIO
General I/O
PI
K13
VDD
1.2 V Core
PI
K14
IF_INT_ANA
GPIO (Not used)
O
K15
IF_MLSE
GPIO (Not used)
O
K16
IF_NARES
GPIO (Not used)
O
K17
IF_DATA_DA
TDM FSYNC for IC503
I
K18
AMPOUT0
Output of Out Amplifier 0 (Not used)
O
K19
AMPOUT1
Output of Out Amplifier 1 (Not used)
O
L1
MEMXD3_LCDD5
Not used
O
L2
MEMXD13_LCDD19
not used
O
L3
MEMXD14_LCDD20
not used
O
Pin No.
Terminal Name
Contents of Control
I/O setting
Remark
Click on the first or last page to see other KX-NS0154CE (serv.man2) service manuals if exist.