Sony KE-42TS2E / KE-42TS2U Service Manual ▷ View online
2
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Specification
Specification
Specification
Specification
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．１
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Functional
specification
Functional specification
Functional specification
Functional specification
Specification
Item NO
ＵＢ－０x
ＵＢ－５x
ＵＢ－７x
Module size
1 994×585×66mm
←
←
Externals
Weight
2
18kg
←
←
Display size
3
921.60×522.24mm
(42inch: 16:9)
(42inch: 16:9)
←
←
Resolution
4
1024×1024 pixel
←
←
Pixel pitch
5
0.90(H)×0.51(V)mm
←
←
Display
panel
panel
Sub pixel pitch
6
0.30(H)×0.51(V)mm
←
←
Color
Grayscale(standard)
9
RGB each color
256 Grayscale
256 Grayscale
←
←
White(display load
Ratio 100%)
Ratio 100%)
11
140cd/㎡
←
・・・
White(display load
Ratio 1%, standard)
Ratio 1%, standard)
12 700cd/㎡
←
(1000) cd/㎡
BrightNess
Chromaticity
Coordinates
Coordinates
(x,y)､white 10%
14 (0.300,0.290)
← (0.300,0.300)
Contrast
Contrast in Darkroom（60Hz） 15 400:1
←
(1000:1)
Video signal
(RGB each color)
(RGB each color)
16 LVDS(8bit)
←
←
Dot clock（max）
17 52MHz
←
←
Data signal
Horizontal Sync Signal（max） 18 50KHz(LVDS)
←
←
Sync Signal
Vertical Sync Signal
19 50Hz±1.9／60±1.7Hz(LVDS)
←
←
Input voltage/current
20 100-120/200-240V
AC
4.5/2.0A 50/60Hz
+3.3/+5/+75-90/+50
-70V
-70V
DC
0.05/6/4/2A
←
Powersupply
Standby electric power（max） 21
1W
－
－
Noise
Shade noise at 18dB(A) or
less
less
22 25dB(A)orless
←
←
Temperature(operation) 23
0～45℃
←
←
Temperature(storage) 24
0～45℃
←
←
Humidity(operation) 25
20～85%RH(no condensation)
←
←
Guarantee
environment
environment
Humidity(storage) 26
20～80%RH(no condensation)
←
←
※It is made to give priority when there is a delivery specification according to the customer.
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Display quality specification
Display quality specification
Display quality specification
Display quality specification
Specification
Item NO
ＵＢ－０x
ＵＢ－５x
ＵＢ－７x
Total number（subpixel）
1
15 or less
←
←
Density（subpixel/c ㎡）
2
2 or less
（However,1 continuousness or less）
（However,1 continuousness or less）
←
←
Non-lighting
cell defect
cell defect
Size（H×V）（subpixel）
3
1×2 or less, Or 2×1 or less
←
←
Total number(subpixel)
4
6 or less（each color 2 or less）
←
←
Non-extinguis
hing cell
defect
hing cell
defect
Density（subpixel/c ㎡）
5
Each color 2 cells max
（However,1 continuousness or less）
（However,1 continuousness or less）
←
←
Flickering lighting cell
defect（sub pixel/c ㎡）
defect（sub pixel/c ㎡）
6
5 or less
←
←
Flickering
cell defect
cell defect
Flickering
non-extinguishing cell
defect
non-extinguishing cell
defect
7
Number on inside of Non-extinguishing
cell defect
cell defect
←
←
High intensity
cell defect
cell defect
Twice or more bright point
8
０
←
←
White block of 10% load
[9 point]（％）
[9 point]（％）
9
20 or less
←
←
Brightness
variation
variation
In area adjacent 20mm
[White]（％）
[White]（％）
10
10 or less
←
←
Color
variation
variation
White block of 10% load
[9 point]
[9 point]
11
ｘ：Average±0.015
ｙ：Average±0.015
ｙ：Average±0.015
←
←
※It is made to give priority when there is a delivery specification according to the customer.
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Ｉ／Ｏ
Ｉ／Ｏ
Ｉ／Ｏ
Ｉ／Ｏ Interface
Interface
Interface
Interface Specification
Specification
Specification
Specification
（１）Ｉ／Ｏ ｓｉｇｎａｌ
No
.
Item
Signal Name
Number
of
signals
I/O
Form
Content of definition
Reflection
signal
Timing
Signal
signal
Timing
Signal
RXIN0-
RXIN0+
RXIN1-
RXIN1+
RXIN2-
RXIN2+
RXIN3-
RXIN3+
RXIN0+
RXIN1-
RXIN1+
RXIN2-
RXIN2+
RXIN3-
RXIN3+
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Input
LVDS
Diff-
erent
ial
Diff-
erent
ial
Differential serial data
signal.
signal.
Input video and timing
signals after differential
serial conversion using a
dedicated transceiver.
The serial data signal is
transmitted seven times
faster than the base
signal．
signals after differential
serial conversion using a
dedicated transceiver.
The serial data signal is
transmitted seven times
faster than the base
signal．
Clock
RXCLKIN-
RXCLKIN+
RXCLKIN+
1
1
1
Input
LVDS
Diff-
erent
ial
Diff-
erent
ial
Differential clock
signal.
signal.
Input the clock signal
after differential
conversion using a
dedicated transceiver.
after differential
conversion using a
dedicated transceiver.
The clock signal is
transmitted at the same
speed as the base
signal.
transmitted at the same
speed as the base
signal.
１
Display
data
data
Power down
Signal
Signal
PDWN
1 Input
LVTTL
Low :LVDS receiver
outputs are all L.
High:Input signals are
active.
SDA
1 I/O
Communication
SCL
1 I/O
LVTTL
(I
(I
2
C)
I
2
C bus serial data
communication signal.
Communication with the
control MPU of this
product is enabled.
Communication with the
control MPU of this
product is enabled.
CPUGO
1 Input
LVTTL
Low power consumption
mode of the control MPU
of this product is
released.
mode of the control MPU
of this product is
released.
PDPGO
1 Input
LVTTL
“High”：
This product is
started.
started.
(CPUGO=“High” Effective)
２
ＭＰＵ
Communi
cation/
Control
Communi
cation/
Control
Control
IRQ
1 Output
LVTTL
It changes into "Low" →
"High" when this product
enters the undermentioned
state.
１．Vcc/Va/Vs output
decrease
２．Circuit abnormality
detection
"High" when this product
enters the undermentioned
state.
１．Vcc/Va/Vs output
decrease
２．Circuit abnormality
detection
4
（２）LVDS Signal Definition and Function
A video signal (display data signal and control signal) is converted from parallel data to serial
data with the LVDS transmitter and further converted into four sets of differential signals before
input to this product.
data with the LVDS transmitter and further converted into four sets of differential signals before
input to this product.
These signals are transmitted seven times faster than dot clock signals.
The dot clock signal is converted into one set of differential signals by the transmitter before
input to this product.
input to this product.
The LVDS signal definition and function are summarized below:
Signal name
Symbol
Number of
signals
Signal definition and function
RXIN0-
RXIN0+
RXIN0+
１
１
１
Display data signal
Ｒ０、Ｒ１、Ｒ２、Ｒ３、Ｒ４、Ｒ５、Ｇ０
RXIN1-
RXIN1+
RXIN1+
１
１
１
Display data signal
Ｇ１、Ｇ２、Ｇ３、Ｇ４、Ｇ５、Ｂ０、Ｂ１
RXIN2-
RXIN2+
RXIN2+
１
１
１
Display data signal，Sync Signal，Control signal
Ｂ２、Ｂ３、Ｂ４、Ｂ５
＿＿＿＿＿ ＿＿＿＿＿ ＿＿＿＿＿
Ｈｓｙｎｃ，Ｖｓｙｎｃ、ＢＬＡＮＫ
＿＿＿＿＿ ＿＿＿＿＿ ＿＿＿＿＿
Ｈｓｙｎｃ，Ｖｓｙｎｃ、ＢＬＡＮＫ
Video signal
Timing signal
Transmission line
Transmission line
RXIN3-
RXIN3+
RXIN3+
１
１
１
Display data signal，Control signal
Ｒ６、Ｒ７、Ｇ６、Ｇ７、Ｂ６、Ｂ７、ＰＡＲＩＴＹ
Clock transmission line
RXCLKIN-
RXCLKIN+
RXCLKIN+
１
１
１
Clock signal
＿＿＿＿
ＤＣＬＫ
＿＿＿＿
ＤＣＬＫ
5
（３） Video Signal Definition and Function
The table below summarizes the definitions and functions of input video signals before
LVDS conversion.
LVDS conversion.
Item
Signal name
Number
of
signal
s
Input/
output
output
Signal definition and function
Video signal
(digital RGB)
(digital RGB)
DATA-R
DATA-G
DATA-B
DATA-G
DATA-B
8
8
8
8
8
Input
Display data signal
R7/G7/B7 is the highest intensity bit.
R0/G0/B0 is the lowest intensity
bit.
R7/G7/B7 is the highest intensity bit.
R0/G0/B0 is the lowest intensity
bit.
Data Clock
DCLK
１ Input
Display data timing signal: Data are
read when DCLK is low. DCLK is
continuously input.
read when DCLK is low. DCLK is
continuously input.
Horizontal
sync signal
sync signal
_____
Hsync
Hsync
1 Input
Regulates one horizontal line of data:
Begins control of the next screen when
Hsync is lowered.
Begins control of the next screen when
Hsync is lowered.
Vertical sync
signal
signal
_____
Vsync
Vsync
1 Input
Screen starts up control timing signal:
Begins control of the next screen when
Vsync is lowered.
Input the same frequency in both
odd-numbered and even-numbered fields.
Begins control of the next screen when
Vsync is lowered.
Input the same frequency in both
odd-numbered and even-numbered fields.
Parity signal
PARITY
1 Input
This signal specifies the display
field.
H: Odd-numbered field
L: Even-numbered field
L: Even-numbered field
Parity signal should be alternated in
every Vsync cycle.
every Vsync cycle.
Original
Display
signal
(before
LVDS
transmit
tance)
Display
signal
(before
LVDS
transmit
tance)
Blanking
signal
signal
BLANK
1 Input
Display period timing signal.
H indicates the display period and L
indicates the non display period.
Note:
Set this timing properly like
followings, as is used internally for
signal processing.
・Set the blanking period so that the
number of effective display data items
in one horizontal period is 852.
・Set the number of blanking signals in
one vertical period to 512, which is
one half the number of effective scan
lines.
If the BLANK changes when the Vsync
frequency is switched, the screen
display may be disturbed or brightness
may change.
The screen display is restored to the
normal state later when the BLANK
length is constant again.
H indicates the display period and L
indicates the non display period.
Note:
Set this timing properly like
followings, as is used internally for
signal processing.
・Set the blanking period so that the
number of effective display data items
in one horizontal period is 852.
・Set the number of blanking signals in
one vertical period to 512, which is
one half the number of effective scan
lines.
If the BLANK changes when the Vsync
frequency is switched, the screen
display may be disturbed or brightness
may change.
The screen display is restored to the
normal state later when the BLANK
length is constant again.
＊１）This product does not correspond to the progressive display mode by the parity signal fixation.
When the parity signal is fixed, this product is reversed arbitrarily internally and used.
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