Sony KE-42TS2E / KE-42TS2U Service Manual ▷ View online
10
3.2 Block
Diagrams
3.2.1 signal Diagrams
*1:Power supply(jig)
DATA CONVERTER
Y-SCAN
EVEN SW
X-SCAN
EVEN SW
ABUSR B.
ABUSR B.
ABUSR B.
ABUSR B.
ABUSL
ABUSL
ABUSL
ABUSL B
B
B
B
.
.
.
.
X
X
X
X
B
B
B
B
B
B
B
B
X
X
X
X
B
B
B
B
B
B
B
B
S
S
S
S
D
D
D
D
M
M
M
M
S
S
S
S
D
D
D
D
M
M
M
M
SCAN CONTROLLER
FRAME
MEMORY
DATA PROCESSOR
OSC
TIMMING
γ
comp.
OSC
80MHz
MPU
OSC
10MHz
Y
Y
Y
Y----SUS
SUS
SUS
SUS B.
B.
B.
B.
X
X
X
X----SUS
SUS
SUS
SUS
B
B
B
B
LOGIC
LOGIC
LOGIC
LOGIC B.
B.
B.
B.
Y-SUS
EVEN SW
X-SUS
EVEN SW
Y-SUS
ODD SW
Y-SCAN
ODD SW
X-SUS
ODD SW
X-SCAN
ODD SW
RGB
GAIN
DITHER
/ERR
SUB FIELD
PRC.
POS
RESET
POS /NEG
RESET SW
MEMORY
CONTROLLER
LVDS
24MHz
D/A
V-SYNC cont
.
APC cont
.
I/O
EEPROM
F
ailure DET.
FLASH
Analog Sw
OSC
40MHz
40MHz
CN1
CN3
CN2
CN21
CN51
CN41
CN31
CN5
CN4
PSU
PSU
PSU
PSU B.
B.
B.
B.
*1
*1
*1
*1
CN7
CN69
SCI
.
I
2
C
Vrs
Vra
Vrw
Vrx
Vra
Vrw
Vrx
PFCgo
Vsago
Vcego
Vsago
Vcego
SIGNAL
INPUT
INPUT
ADM1 ADM2 ADM3
ADM5 ADM6 ADM7 ADM8
ADM4
11
3.2.2 Power
Diagrams
AC100
~
240V
Y-SCAN
EVEN SW
X-SCAN
EVEN SW
ABUSR B.
ABUSR B.
ABUSR B.
ABUSR B.
ABUSL
ABUSL
ABUSL
ABUSL B
B
B
B
.
.
.
.
X
X
X
X
B
B
B
B
B
B
B
B
X
X
X
X
B
B
B
B
B
B
B
B
S
S
S
S
D
D
D
D
M
M
M
M
S
S
S
S
D
D
D
D
M
M
M
M
Y
Y
Y
Y----SUS
SUS
SUS
SUS B.
B.
B.
B.
X
X
X
X----SUS
SUS
SUS
SUS
B
B
B
B
LOGIC
LOGIC
LOGIC
LOGIC B.
B.
B.
B.
Y-SUS
EVEN SW
X-SUS
EVEN SW
Y-SUS
ODD SW
Y-SCAN
ODD SW
X-SUS
ODD SW
X-SCAN
ODD SW
POS
RESET SW
DC/DC
CONVERTER
Vx
45V
Vs 60V
PFC
Vs
Va
5/3.3V
control
Vcc
MP
380V
PFCgo
Vsago
Vcego
Vsago
Vsago
Vcego
PFCgo
10A
CPUgo
PDPgo
PDPgo
CN23
5V
55V
Va
Vxwgo
DC/DC
CONVERTER
X
FVCC1
X
FVCC2
5V 5V
X
FVE1
X
FVE2
VE
18V 18V 17V
Vcc 5V
DC/DC
CONVERTER
Y
FVCC1
Y
FVCC2
FVE5H
5V 5V 18V
Y
FVE1
Y
FVE2
VE
18V 18V 17V
Vw 180V
Vb
Vb
–5V
V
pr2 3.3V
Vs 80V
Servce
SW
POS/NEG
RESET SW
V
rst
Vcc 5V
Vpr2 3.3V
80V
Vs 80V
Vcc 5V
Vcc 5V
Vcc 5V
Va 60V
Va 60V
V
pr1 5V
RST
CN33
CN32
CN22
CN42
CN52
CN6
CN61
CN64
CN65
CN68
CN67
CN66
D/A
V
ra
Vra
Vrs
Vrw
Vrx
Vrs
Vrw
Vrx
PSU
PSU
PSU
PSU B.
B.
B.
B. *1
*1
*1
*1
*1:Power supply(jig)
ADM1 ADM2 ADM3
ADM5 ADM6 ADM7 ADM8
ADM4
12
3
3
3
3.
.
.
.3
3
3
3
Function
Function
Function
Function
3
3
3
3.
.
.
.3
3
3
3.
.
.
.1
1
1
1
Logic board Function
Logic board Function
Logic board Function
Logic board Function
(1)Data Processor
・γ adjustment(1/2.2/2.4/2.6/2.8)
・NTSC/EBU format(Color matrix)Switch
・RGB gain Control(White balance adjustment、Amplitude limitation)
・γ adjustment(1/2.2/2.4/2.6/2.8)
・NTSC/EBU format(Color matrix)Switch
・RGB gain Control(White balance adjustment、Amplitude limitation)
・Error Diffusion Technology(Grayscale adjustment)
・Dither(Grayscale adjustment)
・Burn-in Pattern generation
(2)Data Converter
・Quasi out-line adjustment (luminous pattern control)
(3)Scan Controller
・Address driver control signal generator(ADM)
・scan driver control signal generator(SDM)
・X/Y sustain control signal generator
(4)Waveform ROM
・Waveform Pattern for drive / Timing memory
(5)MPU
・Synchronous detection
・System control
・Driving voltage(Va、Vs、Vr、Vw) Minute adjustment
・Abnormal watch (breakdown detection)/abnormal processing
・Is(sustain) current control (sustain pulse control)
・Ia(address) current control (sub-field control)
・External communication control
・Flash memory (firmware)
(6)EEPROM
・Control parameter memory
・The accumulation energizing time (Every hour).
・Abnormal status memory (16 careers)
・Dither(Grayscale adjustment)
・Burn-in Pattern generation
(2)Data Converter
・Quasi out-line adjustment (luminous pattern control)
(3)Scan Controller
・Address driver control signal generator(ADM)
・scan driver control signal generator(SDM)
・X/Y sustain control signal generator
(4)Waveform ROM
・Waveform Pattern for drive / Timing memory
(5)MPU
・Synchronous detection
・System control
・Driving voltage(Va、Vs、Vr、Vw) Minute adjustment
・Abnormal watch (breakdown detection)/abnormal processing
・Is(sustain) current control (sustain pulse control)
・Ia(address) current control (sub-field control)
・External communication control
・Flash memory (firmware)
(6)EEPROM
・Control parameter memory
・The accumulation energizing time (Every hour).
・Abnormal status memory (16 careers)
13
Setting [hex]
Sub
Address
Data
bit
Symbol
Item
Function
RANGE
INITIAL value
00 7-0
MAPVER address MAP
VERsion
Indicates the version number of the
address map.
00 ~ FF
01
【
UB0x/5x】
02【UB7x 】
7 ERRF
update
of
ERRor Flag
Indicates that an error has occurred.
It can be cleared with the ErrRST setting.
If this flag is set,
• Error code is written.
It can be cleared with the ErrRST setting.
If this flag is set,
• Error code is written.
• Cannot enter the PDP-ON mode.
0: Not updated
1: Updated
1: Updated
0
6 OHRF
update of
Operation
HouRs Flag
Indicates that the drive hours are counted.
0: Not updated
1: Updated
1: Updated
0
5 PSDF
Power Shut
Down Flag
Down Flag
Indicates that shutdown of the AC power
is detected and the PDP has executed the
OFF-sequence. It can be cleared with the
PSDRST setting.
0: Not detected
1: Detected
1: Detected
0
01
4-0 CNDC
CoNDition
Code
Indicates status of the module.
Refer to 4.11.2.6
condition codes.
irregular
02 7-0
ERRC
ERRor
Code
Indicates error code.
The error codes of as many as 16 errors in
The error codes of as many as 16 errors in
the past can be retrieved with the ERRS
setting.
.
Same error code is not stored
continuously.
00~FF 00
03
7-0 OHRH
Operation
HouRs Higher
bits
Indicates the higher 8 bits of the module
driving hours.
00~FF
00
04
7-0 OHRL
Operation
HouRs Lower
bits
Indicates the lower 8 bits of the module
driving hours.
00~FF
00
7 PATSEL
Selecting
patterns
It selects the built-in test pattern signals of
this display. This setting is valid when the
PATON setting is 1.
0: The single
color display is
switched every
2 seconds. A
total of 8
colors are
displayed.
1: All white
(Different from
actual white.)
0
6 PATON
Built-in
pattern display
is set to ON.
Display of the built-in pattern signal in
this product is turned ON/OFF.
0: Displaying the
input signal
1: Displaying the
built-in pattern
0
5 ADEN
Address
data
enable
The black screen is displayed.
0 is set when the input video signal has
0 is set when the input video signal has
disturbance.
0: Blank
1: Displaying the
1: Displaying the
input signal
1
4
-
-
Be sure to use the display with the setting
fixed to 0.
0~1
0
3
-
-
Be sure to use the display with the setting
fixed to 1.
0~1
1【UB0x/5x】
3
DSPPRT
DiSPlay
PaRiTy
PaRiTy
Input reflection polarity setting
0:Emits light by
LOW
1:Emits light by
High
1【UB7x 】
20
2 IFON
Interface
power supply
ON
Switches the interface power ON/OFF.
Use this item when you want turn ON the
Use this item when you want turn ON the
main power of the interface side only
when the PDPON is set to 0. This setting
is invalid when PDPON is set to 1.
0: Power OFF
1: Power ON
1: Power ON
0
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