Sony XES-Z50 (serv.man4) Service Manual ▷ View online
– 33 –
Pin No.
Pin Name
I/O
Function
73
X1A
O
Sub system clock output terminal (32.768 kHz)
74
X0A
I
Sub system clock input terminal (32.768 kHz)
75
NCO
O
Not used (open)
76
BU IN
I
Backup power supply detect signal input from the SONY bus interface (IC515) and battery detect
circuit “L” is input at low voltage
circuit “L” is input at low voltage
77
KEY ACK
I
Input of acknowledge signal for the key entry Acknowledge signal is input to accept function
and eject keys in the power off status On at input of “H”
and eject keys in the power off status On at input of “H”
78
P OUT IN
I
RDS pause detection signal input terminal Not used (fixed at “L”)
79
DAVN
I
Data transmit completed detect signal input from the RDS decoder (IC501)
80
NCO
O
Not used (open)
81
XAUX ON
I
Input of auxiliary input (AUX IN) on/off detection Input terminal to turn on the set
simultaneously when an external unit connected to the AUX IN terminal is turned on, if the power
of the set is off “L”: When external unit is turned on
simultaneously when an external unit connected to the AUX IN terminal is turned on, if the power
of the set is off “L”: When external unit is turned on
82
XTEL MUTE
I
Telephone muting signal input terminal At input of “L”, the signal is attenuated by –20 dB
83 to 85
NCO
O
Not used (open)
86
HSTX
I
Hardware standby input terminal “L”: hardware standby mode Reset signal input in this set
87
MD2
I
Setting terminal for the CPU operational mode (fixed at “L” in this set)
88
MD1
I
Setting terminal for the CPU operational mode (fixed at “H” in this set)
89
MD0
I
Setting terminal for the CPU operational mode (fixed at “H” in this set)
90
RSTX
I
91
VSS
—
Ground terminal
92
X0
I
Main system clock input terminal (3.68 MHz)
93
X1
O
Main system clock output terminal (3.68 MHz)
94
VCC
—
Power supply terminal (+5V)
95 to 98
TIR D0 to TIR D3
I/O
Data bus with the traffic information replay (IC503)
99
TIR PDOWN
O
Power down control signal output to the traffic information replay (IC503) “L” active
100
TIR RES
O
Reset (or power down) signal output to the traffic information replay (IC503) “H” active
101
TIR CE
O
Serial chip enable signal output to the traffic information replay (IC503) “H” active
102
XTIR CE
O
Serial chip enable signal output to the traffic information replay (IC503) “L” active
103
TIR WR
O
Data write enable signal output to the traffic information replay (IC503) “L” active
104
TIR RD
O
Data read enable signal output to the traffic information replay (IC503) “L” active
105
TIR BUSY
I
Busy signal input from the traffic information replay (IC503) “H” active
106
TIR PLAY
O
Relay drive signal output for the tuner/TIR signal select “L”: tuner, “H”: TIR
107
NCO
O
Not used (open)
108
KEY ILL
O
Output of power on/off control signal for the rotary commander illumination and RDS decoder
(IC501) power supply “H”: power on (“H” is output at accessory on)
(IC501) power supply “H”: power on (“H” is output at accessory on)
109, 110
NCO
O
Not used (open)
111
XACC IN
I
Accessory power supply detect signal input terminal “L”: accessory on
112, 113
NCO
O
Not used (open)
114
AU ON
O
Output of power on/off control signal for the tuner power supply “H”: tuner on
115
AM ON
O
AM system power supply on/off control signal output and FM/AM signal select relay drive signal
output “L”: FM on, “H”: AM on
output “L”: FM on, “H”: AM on
116
FM ON
O
FM system power supply on/off control signal output “H”: FM on
117
TUN ON
O
Tuner system power supply on/off control and antenna remote control signal output terminal
At the reception with tuner, “H” is output when power antenna starts
At the reception with tuner, “H” is output when power antenna starts
System reset signal input from the reset signal generator (IC514) and reset switch (S51) (or (S42)
when using connector box and display holder)
when using connector box and display holder)
“L”: reset
For several hundreds msec. after the
power supply rises, “L” is input, then it changes to “H”
Also, when the reset switch (S51) is pressed, “L” is input
Also, when the reset switch (S51) is pressed, “L” is input
– 34 –
Pin No.
Pin Name
I/O
Function
118
WIDE
O
119
VSS
—
Ground terminal
120
SEEK OUT
O
Seek control signal output to the FM/AM tuner unit
AM mode: Used for IF count output/SD output request/AGC cut at SEEK or BTM
FM mode: Used for SD speed up at SEEK, BTM, or AF
AM mode: Used for IF count output/SD output request/AGC cut at SEEK or BTM
FM mode: Used for SD speed up at SEEK, BTM, or AF
IF band (wide/narrow) select signal output to the FM/AM tuner unit “L”: narrow, “H”: wide
In FM mode, IF band is narrowed to raise the selectivity so that interference noise from adjacent
stations can be removed
In FM mode, IF band is narrowed to raise the selectivity so that interference noise from adjacent
stations can be removed
*1 Front panel attach/remove mechanism drive motor (M1) control
Stop
When the front panel is
being removed
When the front panel is
being attached
Brake
PNL MF (pin %∞)
“L”
“L”
“H”
“H”
PNL MR (pin %§)
“L”
“H”
“L”
“H”
Operation
Terminal
– 35 –
•
MAIN BOARD IC700 HD6413002F16 (DISPLAY CONTROLLER)
Pin No.
Pin Name
I/O
Function
1
VDD
—
Power supply terminal (+5V)
2
SIRCS
I
3
SIRCS
I
4
DSPL-RST
O
Reset signal output to the display controller (IC901) “L”: reset
At the power supply, “L” is output to reset the display controller
At the power supply, “L” is output to reset the display controller
5
DSPL-ON
O
Output of power on/off control signal for the display circuit power supply “H”: power on
Besides power on/off control, the display data and reset signal transmission to the display
controller (IC901) is controlled at the output of “H”
Besides power on/off control, the display data and reset signal transmission to the display
controller (IC901) is controlled at the output of “H”
6
TX-SEL
O
Not used (pull down)
7
NCO
O
Not used (open)
8
CS-CTL
O
Not used (pull down)
9
DOWN LOAD
I
“H” is input when external flash memory data are rewritten Fixed at “L” in this set
10
NIH
O
Reset signal output to the external RAM device Not used (pull up)
11
VSS
—
Ground terminal
12
LCD-TX
O
Transmit data output to the display controller (IC901)
13
UNISO
O
Serial data output to the SONY bus interface (IC515)
14
LCD-RX
I
Receive data input from the display controller (IC901)
15
UNISI
I
Serial data input from the SONY bus interface (IC515)
16
NCO
O
Not used (open)
17
UNICKI
I
Serial data transfer clock signal input from the tuner/system controller (IC500)
18
D0
I/O
19
D1
I/O
20
D2
I/O
21
D3
I/O
22
VSS
—
Ground terminal
23
D4
I/O
24
D5
I/O
25
D6
I/O
26
D7
I/O
27
D8
I/O
28
D9
I/O
29
D10
I/O
30
D11
I/O
31
D12
I/O
32
D13
I/O
33
D14
I/O
34
D15
I/O
35
VDD
—
Power supply terminal (+5V)
36
A0
O
Address signal output terminal Not used
37
A1
O
38
A2
O
39
A3
O
40
A4
O
Address signal output to the flash memory (IC701) and S-RAM (IC702)
41
A5
O
42
A6
O
43
A7
O
Two-way data bus with the flash memory (IC701) and S-RAM (IC702)
Two-way data bus with the flash memory (IC701) and S-RAM (IC702)
Sircs signal input from the remote control receiver Not used (fixed at “L”)
– 36 –
Pin No.
Pin Name
I/O
Function
44
VSS
—
Ground terminal
45
A8
O
46
A9
O
47
A10
O
48
A11
O
49
A12
O
50
A13
O
51
A14
O
52
A15
O
53
A16
O
54
A17
O
Address signal output to the flash memory (IC701)
55
A18
O
Address signal output to the flash memory (IC701)
56
A19
O
Address signal output terminal This set uses the OR level with chip select signal of ROM-CS
(pin (¡) as a chip enable signal for the flash memory (IC701)
(pin (¡) as a chip enable signal for the flash memory (IC701)
57
VSS
—
Ground terminal
58
WAIT
I
Wait signal input terminal (fixed at “H”)
59
BREQ
O
Communication request signal output terminal Not used (open)
60
BACK
O
Acknowledge output terminal Not used (open)
61
ø
O
System clock output terminal Not used (open)
62
STBY
I
Hardware standby signal input terminal (fixed at “H”)
63
SYSRST
I
System reset signal input from the tuner/system controller (IC500) and reset signal generator
(IC514) “L”: reset For several hundreds msec. after the power supply rises, “L” is input, then
it changes to “H”
(IC514) “L”: reset For several hundreds msec. after the power supply rises, “L” is input, then
it changes to “H”
64
BU-IN
I
Backup power supply detection signal input from the SONY bus interface (IC515) and battery
detect circuit “L” is input at low voltage
detect circuit “L” is input at low voltage
65
VSS
—
Ground terminal
66
EXTAL
I
System clock input terminal (14.745 MHz)
67
XTAL
I
System clock input terminal (14.745 MHz)
68
VDD
—
Power supply terminal (+5V)
69
AS
O
Address strobe signal output terminal Not used (open)
70
RD
O
Strobe signal output for data reading to the flash memory (IC701) and S-RAM (IC702)
71
HWR
O
Strobe signal output for data writing to the flash memory (IC701) and upper byte data writing
strobe signal output to the S-RAM (IC702)
strobe signal output to the S-RAM (IC702)
72
LWR
O
Strobe signal output for data writing to the flash memory (IC701) and lower byte data writing
strobe signal output to the S-RAM (IC702)
strobe signal output to the S-RAM (IC702)
73
MD0
I
Input terminal for setting microcomputer operation mode (fixed at “L”)
74
MD1
I
Input terminal for setting microcomputer operation mode (fixed at “L”)
75
MD2
I
Input terminal for setting microcomputer operation mode (fixed at “H”)
76
AVDD
—
Power supply terminal (+5V) (for A/D conversion)
77
AVREF
I
Reference voltage input terminal (+5V) (for A/D conversion)
78
AN0
I
79
AN1
I
80
AN2
I
81
AN3
I
82
AN4
I
83
AN5
I
84
BU-IN
I
Backup power supply detection signal input from the SONY bus interface (IC515) and battery
detect circuit “L” is input at low voltage
detect circuit “L” is input at low voltage
Address signal output to the flash memory (IC701) and S-RAM (IC702)
Input terminal for the test (fixed at “L”)
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