Sony CDX-V60 Service Manual ▷ View online
– 25 –
– 26 –
CDX-V60
7-2.
BLOCK DIAGRAM – Servo Section –
M
M
M
M
SW11
B
A
3
4
6
7
12
19
2
1
26
27
1
2
13
12
16
17
20
19
9
10
8
10
4
6
100
26
RFDC
FE
TE
SE
93
57
FOK
SENS
CDDATA
CDXLT
CDCLK
58
36 35 37
1
7
4
5
34
33
32
31
67
60
CHKF
CHKR
ELVF
ELVR
D8CM
EHS
RV601
ELEVATOR
HEIGHT DETECT
VREF
Q501
8cm DISC
DETECT
D601
+9V
8cm DISC
DET SWITCH
Q14
ELEVATOR
MOTOR DRIVE
IC18
CHUCKING
MOTOR DRIVE
IC17
64
65
66
63
21
SW402
TRAY MOVEMENT
END DET
LOAD/SAVE END: ON
SW401
(DISC IN/OUT DET)
DISC IN: ON
SW302
CHUCKING MOVEMENT
END DET
CHUCKING END: ON
SW502
(MAGAZINE EJECT END DET)
EJECT END: ON
SW501
(MAGAZINE IN/OUT DET)
MAGAZINE IN: ON
22
END. SW
DISC. SW
CHK. SW
POS. SW
MAG. SW
EJECTKEY
SYSTEM CONTROLLER
IC101 (1/3)
56
38
24
27
84
77
23
APC
SCORE
SQCK
SUBQ
SCLK
CDRST
GFS
94
FSW
MON
MDP
MDS
SCOR
WFCK
SQCK
SQSO
EXCK
SBSO
EXCK
SBSO
EMPH
MUTE
95 96 97
74 73
WFCK
SCOR
WFCK, SCOR,
EXCK, SBSO
EXCK, SBSO
(Page 29)
78 77
76 75 72
79
83
81
SCLK
XRST
71
54
56
45
47
46
GFS
C2PO
LRCK
BCK
DATA
C2PO
LRCK
BCK
DATA
(Page 27)
F
(Page 27)
XTAI
CLOCK
GENERATOR
62
32
34
FILTER
33
31
FILO
PCO
CLTV
FILI
36
RFAC
ASYMMETRY
CORRECTION
CORRECTION
MIX
DIGITAL PLL
VARI-PITCH
DOUBLE SPEED
EFM DE-
MODULATOR
REGISTER
ERROR
CORRECTOR
32K
RAM
ADDRESS
GENERATOR
PRIORITY
ENCODER
ENCODER
PEAK
DETECTOR
SUBCODE P-W
PROCESSOR
SUBCODE Q
PROCESSOR
CLV
PROCESSOR
18-TIMES
OVERSAMPLING
FILTER
TIMING
GENERATOR
1
SYNC
PROTECTOR
TIMING
GENERATOR
2
NOISE
SHAPER
DIGITAL
OUT
DOUT
D/A DATA
PROCESSOR
SERIAL/PARALLEL
PROCESSOR
DIGITAL SIGNAL PROCESSOR,
CLV SERVO PROCESSOR,
IC12 (1/2)
38
39
ASYI
ASYO
4
5
FIN
RIN
FIN
RIN
OUT1
OUT2
OUT1
M304
(CHUCKING)
M601
(ELEVATOR)
OUT2
1
7
91
92
DFCT
80
99
86
87
88
FOK
MIRR
SENS
SERVO AUTO
SEQUENCER
MIRR, DFCT,
FOK DETECTOR
A/D
CONVERTER
DIGITAL SERVO
PROCESS
PWM GENERATOR
SERVO MICRO
PROGRAM
INTERFACE
DIGITAL SERVO
PROCESSOR
IC12 (2/2)
CPU
INTERFACE
DATA
XLAT
CLOK
29
27
28
2
FFDR
FRDR
TFDR
TRDR
SSTP
SW301
(LIMIT)
ON: When the optical pick-up
is inner position.
is inner position.
SFDR
SRDR
4
5
24
23
TRF
TRR
FF
FR
SLR
SLF
MDP
IN
TR+
TR–
F+
F–
SL–
SL+
SPDL+
SPDL–
VREF
13
14
15
16
17
E
A
B
D
F
C
PD1
PD2
RF
I-V
AMP
RF
SUMMING
AMP
FOCUS
ERROR AMP
TRACKING
ERROR AMP
RFO
FE
FE BIAS
RF AMP,
FOCUS/TRACKING ERROR AMP
IC11
B+ (+5V)
RV12
FOCUS
BIAS
TE
E
F
F I-V AMP
E I-V AMP
EI
LD
EO
APC PD
AMP
DETECTOR
RV11
TRACKING
OFFSET
AUTOMATIC
POWER
CONTROL
Q11
SPINDLE
MOTOR DRIVE
IC13
FOCUS/TRACKING COIL DRIVE,
SPINDLE/SLED MOTOR DRIVE
M302
(SPINDLE)
SLED
MOTOR DRIVE
M303
(SLED)
2-AXIS
DEVICE
(FOCUS)
(TRACKING)
05
FOCUS
COIL DRIVE
TRACKING
COIL DRIVE
APC LD
AMP
OPTICAL PICK-UP
(KSS-402A/Z-N)
LDON
PD
LD
PD
LASER DIODE
• SIGNAL PATH
: CD PLAY
– 27 –
– 28 –
CDX-V60
7-3.
BLOCK DIAGRAM – Main Section –
RAS0
18 – 21, 24 – 28
MA0 – MA8
D-RAM
(VIDEO RAM)
IC203
2 – 5, 7 – 10,
35 – 38, 40 – 43
MD0 – MD15
MD0 – MD15
MA0 – MA8
LCAS
UCAS
WE
RAS0
LCAS
UCAS
WE
16 31 30 15
105
(Page 26)
111
108
15
13
11
9
5
6
2
3
14
13
11
B+
(+5V)
9
12
3
1
5
6
X601
16.9344MHz
TIMING
CONTROL
MODE
CONTROL
27 28
13
16
R
L
26
2
BCK
DATA
DIGITAL
FILTER
&
NOISE
SHAPER
LOW-PASS
FILTER
IC602 (1/2)
MUTING
Q661
LEVEL
SHIFT
IC603
IC603
L
CN601 (1/2)
BUS AUDIO
OUT
R
MUTING
Q681
MUTE
MUTING
CONTROL SWITCH
Q601, 602
VREF SWITCH
Q101, 102
VREF
UCOM +5V
REGULATOR
Q807
+9V
D809
+5V
B+ SWITCH
Q202, 203
B+ SWITCH
Q803, 804
+5V
SERVO
SECTION B+
+5V
REGULATOR
IC803
+5V
D/A CONVERTER
(IC601) B+
+8V
AUDIO LOW-PASS FILTER
CIRCUIT (IC602) B+
+9V
(MOTOR DRIVER (IC17, 18) B+)
+9V
(MOTOR DRIVER (IC13) B+)
+8V
REGULATOR
IC804
B+ SWITCH
Q12, 13
+9V
REGULATOR
IC801
BACK-UP
DETECT
Q805
SIRCS
BUFFER
IC703
SIRCS
PARKING BRAKE
TERMINAL
BUS CONTROL
OUT
+5V
REGULATOR
IC802
B+ SWITCH
Q808, 809
D803
D801
CN702
7
6
5
4
2
3
RESET
SIRCS
CLK
DATA
IN/OUT
IN/OUT
BUS ON
B+
D807
+3.3V
REGULATOR
Q201
+3.3V
MPEG VIDEO/AUDIO
DECODER (IC201) B+
+5.2V
AUDIO BUS INTERFACE
(IC702) B+
LOW-PASS
FILTER
IC602 (2/2)
DIGITAL FILTER,
D/A CONVERTER
IC601
LRCK
INPUT
INTERFACE
D/A CONVERTER
CLKO
XTI
XTO
MD
MC
ML
DATA
CLK
LATCH
4
4
7
3Y
4Y
1Y
2Y
1
S
SELECT
10
LRCK
BCK
DATA
C2PO
2A
2B
1A
1B
4A
4B
3A
DATA, BCK, LRCK, C2PO
SELECTOR
IC108
3B
7
5
109
107
106
104
103
DATA
BCK
LRCK
C2PO
CD DATA
MPEG VIDEO/AUDIO DECODER
IC201
LEVEL SHIFT
IC107 (1/2)
CD BCK
CD INTERFACE
AUDIO INTERFACE
INTERNAL BUS
VIDEO INTERFACE
CD LRCK
CD C2PO
DAXCLK
DA DATA
DA BCK
DA LRCK
RISC
CPU
19
20
XTLIN
X201
40.5MHz
XTLOUT
DE-COMPRESSION
PROCESSOR
81
42
43
85
100
99
61
TH101
X101
12MHz
18
70
SAFETY
BUCK
H TEMP
CD ON
SYSTEM ON
3.3V SW
AVREF
SIRCS
EXTAL
XTAL
SCK
SO
SI
BUSON
RST
AMUTE
MLAT
CKI
CDI
MUTE
LATCH
CLK
DATA
CD G/VCD
VCD RESET
VD R/W
VD ACK
CFLEVEL
VD DS
HSEL2
HSEL1
HSEL0
VD INIT
94
53
11
4
9
10
1
6
12
13
2
8
CLK
OUT
OUT
DATA
IN
IN
DATA
OUT
OUT
BUSON
OUT
OUT
BUSON
OUT
OUT
SW
SW
SW
AUDIO BUS INTERFACE
IC702
RESET SIGNAL
GENERATOR
IC805
B+
(UCOM +5V)
RST
7
BUS
CLK
BUS
DATA
LINK
OFF
BUSON
IN
BUS
RESET
CLK
DATA
IN/OUT
IN/OUT
BUS
ON
ON
RESET
80
79
17
SYSTEM CONTROLLER
IC101 (2/3)
40
92
26
97
98
91
93
25
82
83
73
LEVEL
SHIFT
IC107
(2/2)
SHIFT
IC107
(2/2)
74
75
76
78
20
19
EEDATA
EECLK
5
22
CE
16
RAS1
31 30 15
44
51
45
48
50
47
32
LCAS
RAS0
LCASIN
UCAS
UCASIN
MWE
MCE0
LCAS
RAS0
52
RAS1
RAS1
MD0 – MD15
MA0 – MA9
UCAS
WE
CE
6
DATA
EEPROM
IC103
05
CLK
2
4
INT
5
3
101
RESET
97
96
95
99
VOE
INTERNAL BUS
HOST INTERFACE
HSYNC
VSYNC
VCLK
B0 – B7
G0 – G7
RGB OUT
CD G/VCD
(Page 30)
(Page 29)
(Page 29)
R0 – R7
HSYNC
VSYNC
VCLK
8
1
6
12
14
1
128
127
113
18 – 21, 24 – 28
MA0 – MA8
D-RAM
(VIDEO RAM)
IC204
2 – 5, 7 – 10,
35 – 38, 40 – 43
MD0 – MD15
23 – 28, 30, 31,
34– 37, 39 – 42
MD0 – MD15
DATA BUS
ADDRESS BUS
MA0 – MA9
D-RAM/PROGRAM ROM INTERFACE
63 – 59, 57 – 53
12 – 5, 27, 26
MD0 – MD14
PROGRAM ROM
IC202
MA0 – MA9
MD0 – MD15
MA0 – MA8
13 – 15, 17 – 21, 23, 25,
4, 28, 29, 3, 2
MD0 – MD14
MA0 – MA9
CE
6, 8, 9, 11 – 15
2 - 9
18 – 11
DIR
14 – 7
UART0 – UART7
UART0 – UART7
DATA0 – DATA7
HD0 – HD7
DATA BUS
TRANSCEIVER
IC106
A1 – A8
B1 – B8
86 – 89, 91 – 94
75, 76, 78 – 80, 82 – 84
66 – 72, 74
E
D
C
A
(Page 26)
F
HSEL0
HSEL1
HSEL2
DS
CFLEVEL
DACK
R/W
LCAS
UCAS
WE
RAS1
LCAS
UCAS
WE
• SIGNAL PATH
: CD PLAY
– 31 –
• Circuit Boards Location
CDX-V60
SERVO board
MAGAZINE board
SENSOR board
SWITCH board
MAIN board
– 38 –
• Waveforms
1
IC11
!¢
(TE)
Approx.
780 mVp-p
780 mVp-p
2
IC11
!§
(FE)
3
IC11
!¶
(RFO)
4
IC12
(§
(MDP)
5
IC12
#£
(PCO)
7
IC12
$¶
(BCK)
8
IC12
&£
(WFCK)
6
IC12
$∞
(LRCK)
Approx.
190 mVp-p
190 mVp-p
Approx.
1 Vp-p
1 Vp-p
2.5 Vp-p
80 ns
4.8 Vp-p
40 ns
5.4 Vp-p
22.6
µ
s
5.4 Vp-p
472 ns
5.2 Vp-p
136
µ
s
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