Sony CDX-848X Service Manual ▷ View online
CDX-848X
29
29
D902
D901
CN902
PS901
CNJ901
C904
C901
C902
FB902
FB903
FB901
1-679-418-
11
(11)
B
MAIN BOARD
CN301
JACK FLEXIBLE
BOARD
CN701
C701
R701
1-679-420-
11
(11)
IC701
SW701
4
3
2
1
1-679-420-
11
(11)
ANALOG
DIGITAL
DIGITAL
OUT
CN901
ANALOG OUT
L
R
4
5
1
2
3
8
6
7
5
4
8
7
6
2
1
3
CONTROL
(FOR SONY BUS)
6-11.
PRINTED WIRING BOARDS – JACK/DIGITAL OUT Boards –
•
See page 21 for Circuit Boards Location.
6-12.
SCHEMATIC DIAGRAM – JACK/DIGITAL OUT Boards –
(Page 24)
(Page 28)
CDX-848X
30
30
1.4
±
0.3 Vp-p
• Waveforms
– RF Board –
– RF Board –
1
IC101
qh
(FE) (CD play mode)
1
IC101
rd
(MDP) (CD play mode)
5
IC201
ia
(X1) (CD play mode)
2
IC101
qk
(TE) (CD play mode)
2
IC101
ih
(LRCK), IC501
1
(LRCK)
(CD play mode)
6
IC501
6
(XTO) (CD play mode)
3
IC101
qg
(RFAC) (CD play mode)
3
IC101
o;
(BCK), IC501
3
(BCK)
(CD play mode)
4
IC101
od
(XTAI), IC501
4
(CLKO)
(CD play mode)
– MAIN Board –
Approx.
100 mVp-p
100 mVp-p
2 Vp-p
3.8
µ
s
Approx.
250 mVp-p
250 mVp-p
4.5 Vp-p
22.7
µ
s
4.7 Vp-p
472 ns
5.4 Vp-p
59.1 ns
3.9 Vp-p
250 ns
6.2 Vp-p
59.1 ns
• IC Block Diagrams
–RF Board –
–RF Board –
IC101
CXA2581N-T4
RW/ROM
RW/ROM
EQ ON/OFF
VOFST
VOFST
DVC
VC
VC
VC
RW/ROM
VC
DVC
30
29
28
+
–
+
–
DVC
VCC
DVC
27
26
25
24
RW/ROM
EQ
23
22
21
20
19
RFAC
VCA
VCC
+
–
DVC
+
–
+
–
RW/ROM
VC
RW/ROM
DVC
+
–
3
A
B
C
D
B
C
C
A
A
A
B
C
C
D
B
C D
D
+
–
1
2
APC AMP
5
6
7
8
9
4
RFAC
SUMMING
AMP
RW/ROM
APC-OFF
(Hi-Z)
RW/ROM
(H/L)
VOFST
VC
RW/ROM
+
–
10
11
GM
GM
18
17
16
B
D
A
C
13
14
15
12
EQ IN
LD
PD
GND
A
B
C
D
AC SUM
E
F
DVCC
DVC
RFAC
SW
DC OFST
RFDCI
RFDCO
VC
RFC
VFC
BST
RFG
VCC
CEI
CE
TE BAL
TE
FEI
FE
31
CDX-848X
IC201
LA6576L-TE-L
INPUT
FWD
REV
VCC2
VLO–
VLO+
VO4+
VO4–
VO3+
VO3–
VO2+
VO2–
VO1+
VO1–
VCC1
VIN1
VIN1–A
VIN1+A
VIN1–B
S-GND
MUTE2
MUTE1
VIN4
VIN4–
VIN4+
VREF-IN
VIN1 (VREF)-SW
VREF-OUT (CH1)
REG-OUT
REG-IN
VIN3+
VIN3–
VIN3
VIN2+
VIN2–
VIN2
VIN1+B
OUTPUT
CONTROL
+
–
+
–
+
–
+
–
+
–
+
–
LEVEL
SHIFT
CH2-4
MUTE
THERMAL SHUT DOWN
CH1
MUTE
VIN1/VREF
SWITCH
5VREG
3
4
5
6
7
8
9
2
1
LEVEL
SHIFT
LEVEL
SHIFT
10
11
14
LEVEL
SHIFT
AMP-A
AMP-B
+
–
–
15
16
17
18
23
19
34
35
36
+
–
–
+
–
+
–
–
+
–
25
24
22
21
20
33
32
31
30
29
28
+
–
27
26
12
13
–MAIN Board –
IC102
MSM51V17400D-10TK-FS
DATA BUS
DQ3
DQ4
VSS
4
DQ2
3
A10
8
A0
9
A1
10
A2 11
A3 12
A3 12
VSS 13
NC
6
NC
7
DQ1
2
VCC
1
26
23
24
25
A8
NC
19
20
A9
21
A6
A7
17
18
A4
A5
15
VSS
14
16
ROW
DECODERS
WORD
DRIVERS
MEMORY
CELLS
INTERNAL
ADDRESS
COUNTER
COUNTER
TIMING
GENERATOR
TIMING
GENERATOR
SENSE
AMPLIFIERS
COLUMN
DECODERS
I/O
SELECTOR
WRITE
CLOCK
CLOCK
GENERATOR
INPUT
BUFFERS
ADDRESS BUFFERS
ROW
COLUMN
22
OUTPUT
BUFFERS
OE
CAS
REFRESH
CONTROL
CLOCK
WE
5
RAS
32
CDX-848X
IC101
CXD3027R
ERROR
CORRECTOR
32K
RAM
EFM
DEMODULATOR
SUB CODE
PROCESSOR
SERVO
AUTO
SEQUENCER
D/A
INTERFACE
VIBRATION
MEMORY
CONTROLLER
+
COMPRESSION
EXPANDER
DAC
SELECTOR
DIGITAL
OUT
ASYMMETRY
CORRECTOR
DIGITAL
PLL
DIGITAL
CLV
CPU
INTERFACE
OP AMP
ANALOG SWITCH
SERVO BLOCK
SIGNAL
PROCESSOR
BLOCK
MEMORY CONTROLLER,
BUS BOOST BLOCK
A/D
CONVERTER
SERVO
INTERFACE
SERVO DSP
FOCUS SERVO
SLED SERVO
TRACKING
SERVO
CLOCK
GENERATOR
LPF
LPF
MIRR
DFCT
FOK
PWM GENERATOR
FOCUS PWM
GENERATOR
SLED PWM
GENERATOR
TRACKING PWM
GENERATOR
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
XOE
A0 – A11
SYSM
AMUTE
HPL
HPM
HPR
PCMDI
LRCKI
BCKI
AOUT1
AIN1
LOUT1
LOUT2
AIN2
AOUT2
A9
A8
A7
DVSS
RFAC
XTAO
XTAI
XTSL
VCTL
VPCO
WFCK
GFS
XUGF
MDS
C2PO
WDCK
BIAS
ASYI
ASYO
FILO
FILI
PCO
PWMI
LOCK
MDP
SDTI
SCSY
SCOR
SBSO
EXCK
SDTO
XLAT
CLOK
SENS
XSOE
R4M
IGEN
VDD0
COUT
MIRR
DFCT
FOK
PWMI
LOCK
HPR
HPM
HPL
VDD1
C176
MDP
MDS
SSTP
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
FRDR
FFDR
TRDR
TFDR
SRDR
SFDR
SCLK
ATSK
SSTP
COUT
FOK
DFCT
MIRR
VSS1
TEST
TES1
AVDD0
IGEN
AVSS0
RFDC
E
F
120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91
XOE
XCAS
D2
D3
D0
D1
XWE
XRAS
A11
A10
DVDD
A0
A1
A2
A3
AVDD2
LOUT2
AIN2
AOUT2
AVSS2
AVSS1
AOUT1
AIN1
LOUT1
AVDD1
XVSS
XTAO
XTAI
XVDD
BCKI
XOE
XCAS
D2
D3
D0
D1
XWE
XRAS
A11
A10
DVDD
A0
A1
A2
A3
AVDD2
LOUT2
AIN2
AOUT2
AVSS2
AVSS1
AOUT1
AIN1
LOUT1
AVDD1
XVSS
XTAO
XTAI
XVDD
BCKI
VDD0
COUT
MIRR
DFCT
FOK
PWMI
LOCK
HPR
HPM
HPL
VDD1
MDP
MDS
SSTP
SFDR
SRDR
TFDR
TRDR
FFDR
FRDR
VSS1
A VDD
A GND
D VDD
AVDD0
IGEN
AVSS0
RFDC
E
F
RFDC
E
F
B
A
A
VC
CLTV
XPCK
A6
A5
A4
XWRE
XRDE
XEMP
XWIH
XQOK
AMUTE
SDTI
XQCK
SCSY
SCOR
VSS0
SBSO
EXCK
XRST
SYSM
SDTO
XLAT
CLOK
SENS
SCLK
XSOE
ATSK
R4M
A9
A8
A7
DVSS
A6
A5
A4
XWRE
XRDE
XEMP
XWIH
XQOK
AMUTE
SDTI
SCSY
SCOR
VSS0
D GND
SBSO
EXCK
SYSM
SDTO
XLAT
CLOK
SENS
SCLK
XSOE
ATSK
R4M
BCK
PCMDI
PCMD
LRCKI
LRCK
DOUT
VDD2
WFCK
C2PO
GFS
XPCK
XUGF
WDCK
VSS2
XTSL
AVDD3
ASYO
ASYI
BIAS
RFAC
AVSS3
CLTV
PCO
FILI
FILO
VCTL
VPCO
VC
A
B
BCK
PCMDI
PCMD
LRCKI
LRCK
DOUT
VDD2
WFCK
C2PO
GFS
XPCK
XUGF
WDCK
VSS2
XTSL
AVDD3
ASYO
ASYI
BIAS
RFAC
AVSS3
CLTV
PCO
FILI
FILO
VCTL
VPCO
VC
A
B
XCAS
D0 – D4
XWE
BCK
PCMD
LRCK
DOUT
XWRE
XRAS
XRDE
XQOK
XWIH
XEMP
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