DOWNLOAD Sony ZS-S10CP Service Manual ↓ Size: 3.79 MB | Pages: 40 in PDF or view online for FREE

Model
ZS-S10CP
Pages
40
Size
3.79 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
zs-s10cp.pdf
Date

Sony ZS-S10CP Service Manual ▷ View online

ZS-S10CP
21
• Waveforms
– MAIN Board –
1
IC801 
q; (MXO)
1 V/DIV, 100 ns/DIV
239 ns
2.1 Vp-p
2
IC801 
wk (XO)
500 mV/DIV, 20 ns/DIV
59.1 ns
1.5 Vp-p
3
  IC801 
ul (RFO)
       (CD play mode)
1.5 Vp-p
500 mV/DIV, 500 ns/DIV
4
IC1 
4 (GPO2/INT)
(Radio mode)
500 mV/DIV, 10 
Ps/DIV
30.5 
Ps
1.1 Vp-p
ZS-S10CP
22
•  IC Block Diagrams
– MAIN Board –
IC1  SI4730-D60-GUR
IC302  UTC8227 S
GND
22
ROUT
23
LOUT
24
VA
21
VD
20
RCLK
19
SDIO
18
SCLK
17
SEN
16
RST
15
GND
14
GND
13
N.C.
N.C.
10
DOUT 1
11
FMI
RFGND
8
9
N.C.
N.C.
6
7
GPO2/INT
GPO1
4
5
DFS
GPO3/DCLK
2
3
AMI 12
DAC
DSP
DAC
CONTROL
INTERFACE
DIGITAL
AUDIO
ADC
AGC
ADC
LOW-IF
MUX
AFC
MUX
LDO
-
LNA
AGC
LNA
1
7
8
9
10
11
12
3
4
+
+
VCC1
CH-1
CH-2
OUTPUT1
BOOT STRAP1
PRE GND
NF1
INPUT1
VCC2
OUTPUT2
BOOT STRAP2
RIPPLE
NF2
INPUT2
2
5
6
IC303  BD3491FS-SE2
1
B1
20 BCB1
19 BCA1
18 BCA2
22 SB2
21 OUT2
24 SB1
23 SR
26 VCC
25 OUT1
28 SDA
27 SCL
30 FIL
29 GND
17 BCB2
2
B2
3
C1
5
D1
6
D2
4
C2
13
VOL1
14
VOL2
15
TC2
16
TC1
7
E1
8
E2
11
SEL2
12
SEL1
INPUT
SELECTOR
TREBLE/
BASS
BUFFER
VOLUME
INPUT
GAIN
SURROUND
I2C BUS
LOGIC
9
F1
10
F2
32 SDA
31 SCL
ZS-S10CP
23
IC901  NJM2387ADL3 (TE2)
IC701  BA5826HFP-E2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
24
23
22
21
20
19
18
17
16
15
25
LEVEL
SHIFT
LEVEL
SHIFT
THERMAL
SHUT-DOWN
REGULATOR
BIAS TRAP
LEVEL
SHIFT
MUTE
LEVEL
SHIFT
D.BUFF
D.BUFF
D.BUFF
GND
IN4
IN4'
BIAS
VCC
VCC
IN3'
IN3
VO3(+)
VO3(–)
VO4(–)
VO4(+)
RESETt
OPIN
VO1(–)
REGB
VO1(+)
IN1
RESET
REGOUT
MUTE
GND
IN2'
IN2
VO2(+)
VO2(–)
GND
OPOUT
D.BUFF
D.BUFF
D.BUFF
D.BUFF
D.BUFF
REGULA
TOR
VCC
VCC
IC803, 804  BU15TD3WG-TR
2
GND
1
VIN
VOUT
5
VOLTAGE
REFERENCE
3
STBY
NC
4
STANDBY
OVER CURRENT
PROTECTION
THERMAL
SHUTDOWN
+
1
VIN
2
CONTROL
5
GND
3
VOUT
4
VA
D
J
BANDGAP
REFERENCE
OVER VOLTAGE
PROTECTION
OVER CURRENT
PROTECTION
THERMAL
PROTECTION
ON/OFF
CONTROL
REGULATOR
ZS-S10CP
24
•  IC Pin Function Description
MAIN  BOARD  IC801  TC94A77FG-734 (SY, H (CD DSP,  SYSTEM  CONTROLLER,  LCD  DRIVER)
Pin No.
Pin Name
I/O
Description
1
FMO
O
Spindle motor drive signal output terminal
2
DMO
O
Sled motor drive signal output terminal
3, 4
KEY1-I, KEY2-I
I
Top and fornt panel key input terminal (A/D input)
5
CD LIMIT/LID IN
I
CD limit switch and CD lid open/close detection switch input terminal
6
BATT-CHK-H
I
Battery power detection signal input terminal (A/D input)
7
6V CHK
I
+6V power detection signal input terminal (A/D input)
8
SIMUKE
I
Destination setting terminal
9
VREG
-
Reference voltage (+1.5V) terminal
10
MXO
O
System clock output terminal (4.19 MHz)
11
MXI
I
System clock input terminal (4.19 MHz)
12
VDD3
-
Power supply terminal (+3.3V)
13
VSS
-
Ground terminal
14
VSSP3
-
Ground terminal
15
VCOI
-
VCO input terminal
16
VDDP3
-
Power supply terminal (+3.3V)
17
AUDIO DET
I
AUDIO IN signal detection signal input terminal    Not used
18
RESET
I
System reset signal input from the reset signal generator    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
19
VDD1
-
Power supply terminal (+1.5V)
20
VSS
-
Ground terminal
21
DVSS3
-
Ground terminal
22
LO
O
Audio siganal (L-ch) output to the electrical volume
23
DVR
-
D/A converter eference voltage terminal
24
RO
O
Audio siganal (R-ch) output to the electrical volume
25
DVDD3
-
Power supply terminal (+3.3V)
26
XVSS1
-
Ground terminal
27
XI
I
System clock input terminal (16.9344 MHz)
28
XO
O
System clock output terminal (16.9344 MHz)
29
XVDD1
-
Power supply terminal (+1.5V)
30
POWER KEY
I
POWER key input terminal
31, 32
SHIFT2, SHIFT1
O
Clock shift signal output terminal
33
I2C SCL
O
I2C clock signal otuput to the FM/AM receiver, electrical volume and EEPROM
34
I2C SDA
I/O
I2C data bus with the FM/AM receiver, electrical volume and EEPROM
35
TU RESET
O
Reset signal output to the FM/AM receiver    “L”: reset
36
VSS
-
Ground terminal
37
VDD1
-
Power supply terminal (+1.5V)
38
P-CONT
O
+9V power on/off control signal output terminal    “H”: power on
39
A-MUTE
O
Audio muting on/off control signal output terminal    “H”: muting on
40
MOTOR-MUTE
O
Muting on/off control signal output to the coil/motor driver
41
ACDC CHK
I
AC power detection signal input terminal (A/D input)    “L”: DC power, “H”: AC power
42
NC
O
Not used
43 to 49
SEG15 to SEG9
O
Segment drive signal output to the liquid crystal display
50
VDD3
-
Power supply terminal (+3.3V)
51 to 58
SEG8 to SEG1
O
Segment drive signal output to the liquid crystal display
59 to 62
COM4 to COM1
O
Common drive signal output to the liquid crystal display
63
VDDM1
-
Power supply terminal (+1.5V)
64
HOLD
I
Hold signal input terminal    Not used
65
VSS
-
Ground terminal
66
VDD1
-
Power supply terminal (+1.5V)
67
PDO
O
EFM and PLCK phase deference signal output terminal
68
TMAX
O
TMAX detection result output terminal
69
LPFN
I
PLL circuit LPF amplifi er inversion input terminal
70
LPFO
O
PLL circuit LPF amplifi er output terminal
71
PVREF
-
PLL circuit reference voltage (+1.65V) terminal
72
VCOF
-
VCO fi lter teminal
73
RVDD3
-
Power supply terminal (+3.3V)
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