Sony ZS-PS30CP Service Manual ▷ View online
ZS-PS30CP
29
IC1002 NCP380HSNAJAAT1G
IN 1
EN 3
GND 2
OUT
6
CURRENT
LIMITER
EN
BLOCK
OSC
CONTROL LOGIC
AND TIMER
BLOCKING
CONTROL
FLAG
/FLAG
4
ILIM
5
GATE
DRIVER
UNDER
VOLTAGE
LOCK OUT
VREF
THERMAL
SHUTDOWN
– VOL Board –
IC303 BD3491FS-SE2
1
B1
20 BCB1
19 BCA1
18 BCA2
19 BCA1
18 BCA2
22 SB2
21 OUT2
24 SB1
23 SR
23 SR
26 VCC
25 OUT1
28 SDA
27 SCL
27 SCL
30 FIL
29 GND
29 GND
17 BCB2
2
B2
3
C1
5
D1
6
D2
4
C2
13
VOL1
14
VOL2
15
TC2
16
TC1
7
E1
8
E2
11
SEL2
12
SEL1
INPUT
SELECTOR
TREBLE/
BASS
BUFFER
VOLUME
INPUT
GAIN
SURROUND
I2C BUS
LOGIC
9
F1
10
F2
32 SDA
31 SCL
31 SCL
IC902 NJW4152GM1-A (TE2)
SW
8
IN–
5
FB
6
GND
7
V+
ON/OFF
2
PV+ 1
3
RT 4
BUFFER
REGULATOR
TSD
OSC
OCP
PULSE BY PULSE
STANDBY
ON/OFF
LOW
FREQUENCY
CONTROL
VREF
ER.AMP
PWM
SOFT
START
+
–
+
–
UVLO
ZS-PS30CP
30
• IC Pin Function Description
MAIN BOARD IC801 TC94A77FG-735 (SY, H (CD DSP, SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
FMO
O
Spindle motor drive signal output terminal
2
DMO
O
Sled motor drive signal output terminal
3
KEY1-I
I
Fornt panel key input terminal (A/D input)
4
KEY2-I
I
Front and top panel key input terminal (A/D input)
5
CD LIMIT/LID IN
I
CD limit switch and CD lid open/close detection switch input terminal
6
BATT-CHK-H
I
Battery power detection signal input terminal (A/D input)
7
6V CHK
I
+6V power detection signal input terminal (A/D input)
8
SIMUKE
I
Destination setting terminal
9
VREG
-
Reference voltage (+1.5V) terminal
10
MXO
O
System clock output terminal (4.19 MHz)
11
MXI
I
System clock input terminal (4.19 MHz)
12
VDD3
-
Power supply terminal (+3.3V)
13
VSS
-
Ground terminal
14
VSSP3
-
Ground terminal
15
VCOI
-
VCO input terminal
16
VDDP3
-
Power supply terminal (+3.3V)
17
USB GATE
I
Gate signal input from the USB controller
18
RESET
I
System reset signal input from the reset signal generator “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it change to “H”
19
VDD1
-
Power supply terminal (+1.5V)
20
VSS
-
Ground terminal
21
DVSS3
-
Ground terminal
22
LO
O
Audio siganal (L-ch) output to the electrical volume
23
DVR
-
D/A converter eference voltage terminal
24
RO
O
Audio siganal (R-ch) output to the electrical volume
25
DVDD3
-
Power supply terminal (+3.3V)
26
XVSS1
-
Ground terminal
27
XI
I
System clock input terminal (16.9344 MHz)
28
XO
O
System clock output terminal (16.9344 MHz)
29
XVDD1
-
Power supply terminal (+1.5V)
30
POWER KEY
I
POWER key input terminal
31
USB RX
I
Serial data input from the USB controller
32
USB TX
O
Serial data output to the USB controller
33
I2C SCL
O
I2C clock signal otuput to the FM/AM receiver, electrical volume and EEPROM
34
I2C SDA
I/O
I2C data bus with the FM/AM receiver, electrical volume and EEPROM
35
USB DATA
I
USB data input from the USB controller
36
VSS
-
Ground terminal
37
VDD1
-
Power supply terminal (+1.5V)
38
USB BCK
I
Bit clock signal input from the USB controller
39
USB LRCK
I
L/R sampling clock signal input from the USB controller
40
MOTOR-MUTE
O
Muting on/off control signal output to the coil/motor driver
41
USB 5V ON
O
USB +5V power on/off control signal output terminal
42
AUDIO IN-CHECK
I
AUDIO IN signal detection signal input terminal Not used
43
USB REQ
O
Request signal output to the USB controller
44
A MUTE
O
Audio muting on/off control signal output terminal “H”: muting on
45
USB RESET
O
Reset signal output to the USB controller “L”: reset
46
PCON
O
+9V power on/off control signal output terminal “H”: power on
47
USB 3.3V CHK
I
USB +3.3V power detection signal input terminal (A/D input)
48, 49
NC
O
Not used
50
VDD3
-
Power supply terminal (+3.3V)
51, 52
O-SHIFT1, O-SHIFT2
O
Clock shift signal output terminal
53, 54
NC
O
Not used
55
USB PWR
O
Power control signal output to the USB controller
56
TU-RESET
O
Reset signal output to the FM/AM receiver “L”: reset
57
ACDC CHK
I
AC power detection signal input terminal (A/D input) “L”: DC power, “H”: AC power
58
USB SW EN
O
VBUS power on/off control signal output terminal
59
WR
O
Write clock signal output to the liquid crystal display driver
ZS-PS30CP
31
Pin No.
Pin Name
I/O
Description
60
CS
O
Chip select signal output to the liquid crystal display driver
61
DATA
O
Serial data output to the liquid crystal display driver
62
USB SW FLG
I
USB power over current fl ag input terminal
63
VDDM1
-
Power supply terminal (+1.5V)
64
HOLD
I
Hold signal input terminal Not used
65
VSS
-
Ground terminal
66
VDD1
-
Power supply terminal (+1.5V)
67
PDO
O
EFM and PLCK phase deference signal output terminal
68
TMAX
O
TMAX detection result output terminal
69
LPFN
I
PLL circuit LPF amplifi er inversion input terminal
70
LPFO
O
PLL circuit LPF amplifi er output terminal
71
PVREF
-
PLL circuit reference voltage (+1.65V) terminal
72
VCOF
-
VCO fi lter teminal
73
RVDD3
-
Power supply terminal (+3.3V)
74
SLCO
O
EFM slice level output terminal
75
RFI
I
RF signal input terminal
76
RFRPI
I
RF ripple signal input terminal
77
RFGO
O
RF equalizer amplifi er output terminal
78
AGCI
I
RF signal AGC amplifi er input terminal
79
RFO
O
RF signal generation amplifi er output terminal
80
EQSET
O
Test monitor output terminal Not used
81
RVSS3
-
Ground terminal
82
FNI2 (C)
I
Main beam (C) input from the optical pick-up block
83
FNI1 (A)
I
Main beam (A) input from the optical pick-up block
84
FPI2 (D)
I
Main beam (D) input from the optical pick-up block
85
FPI1 (B)
I
Main beam (B) input from the optical pick-up block
86
TPI (F)
I
Main beam (F) input from the optical pick-up block
87
TNI (E)
I
Main beam (E) input from the optical pick-up block
88
VRO
O
Reference voltage (+1.65V) output to the optical pick-up block and coil/motor driver
89
MDI
I
Light amount monitor input from the laser diode of optical pick-up block
90
LDO
O
Laser diode on/off control signal output to the automatic power control circuit
“H”: laser diode on
“H”: laser diode on
91
AVSS3
-
Ground terminal
92
RFZI
I
RF ripple zero-cross signal input terminal
93
RFRP
O
RF ripple signal output terminal
94
SBAD
O
Sun beam output terminal Not used
95
FEI
O
Focus error signal output terminal Not used
96
TEI
O
Tracking error signal output terminal
97
TEZI
I
Tracking error zero-cross signal input terminal
98
AVDD3
-
Power supply terminal (+3.3V)
99
FOO
O
Focus coil drive signal output terminal
100
TRO
O
Tracking coil drive signal output terminal
ZS-PS30CP
32
Pin No.
Pin Name
I/O
Description
1
RST
I
Reset signal input from the system controller “L”: reset
2
USB PWR
I
Power control signal input from the system controller
3, 4
TEST0, TEST1
I
Test mode setting terminal Normally: fi xed at “L”
5
TEST2
I
Maximum fi le number selection signal input terminal
“L”: 128 DIR/128 fi le, “H”: 64 DIR/192 fi le Fixed at “L” in this unit
“L”: 128 DIR/128 fi le, “H”: 64 DIR/192 fi le Fixed at “L” in this unit
6
DVCC3B
-
Power supply terminal (+3.3V)
7 to 9
SYSTEM0 to SYSTEM2
O
Not used
10
DVSS1
-
Ground terminal
11
DVCC1B
I
+1.5V power input terminal
12
RVOUT1
O
+1.5V power output from internal regulator
13, 14
RVIN1, RVIN2
-
Power supply terminal (+3.3V)
15
RVOUT2
O
+1.5V power output from internal regulator
16
DVCC1A
I
+1.5V power input terminal
17
DVSS2
-
Ground terminal
18 to 25
SYSTEM3 to
SYSTEM10
O
Not used
26
DVSS3
-
Ground terminal
27
DVCC3A1
-
Power supply terminal (+3.3V)
28 to 43
SYSTEM11 to
SYSTEM26
O
Not used
44
DVSS4
-
Ground terminal
45
DVCC3A2
-
Power supply terminal (+3.3V)
46 to 53
SYSTEM27 to
SYSTEM34
O
Not used
54 to 61
TEST3 to TEST10
I
Test mode setting terminal Normally: fi xed at “L”
62
DVSS5
-
Ground terminal
63
DVCC3A3
-
Power supply terminal (+3.3V)
64 to 68
SYSTEM35 to
SYSTEM39
O
Not used
69
SYSTEM40 (BOOT)
I
Boot signal input terminal Not used
70
SYSTEM41
O
Not used
71
LRCK
O
L/R sampling clock signal output to the system controller
72
MODE1
I
Operation mode setting terminal Fixed at “H”
73
X2
O
System clock output terminal (9 MHz)
74
DVSS5
-
Ground terminal
75
X1
I
System clock input terminal (9 MHz)
76
DVCC3A4
-
Power supply terminal (+3.3V)
77
SYSTEM42
O
Not used
78
USBPON
O
USB VBUS control signal output terminal Not used
79
D+
I/O
Two-way USB data (+) bus with the USB connector
80
D–
I/O
Two-way USB data (–) bus with the USB connector
81
MODE0
I
Operation mode setting terminal Fixed at “H”
82
TEST11
I
Test mode setting terminal Normally: fi xed at “L”
83
DVSS7
-
Ground terminal
84
USB TX
O
Serial data output to the system controller
85
USB RX
I
Serial data input from the system controller
86
SYSTEM43
O
Not used
87
SYSTEM44 (TXD)
O
Serial data output terminal Not used
88
TEST12 (RXD)
I
Serial data input terminal Not used
89
SYSTEM45
O
Not used
90
SDA
I/O
Two-way I2C data bus terminal Not used
91
SCL
I/O
Two-way I2C clock bus terminal Not used
92
USB BCK
O
Bit clock signal output to the system controller
93
USB DATA
O
USB data output to the system controller
94
USB GATE
O
Gate signal output to the system controller
95
DVCC3A4
-
Power supply terminal (+3.3V)
96
USB REQ
I
Request signal input from the system controller
97 to 99
TEST13 to TEST15
I
Test mode setting terminal Normally: fi xed at “L”
100
DVSS8
-
Ground terminal
MAIN BOARD IC1001 T5CJ3-7A62 (USB CONTROLLER)
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