Sony STR-DA5300ES Service Manual ▷ View online
STR-DA5300ES
33
33
STR-DA5300ES
SECTION 6
DIAGRAMS
6-1. BLOCK DIAGRAM – CONTROL Section –
(Page 37)
(Page 37)
(Page 39)
: AUDIO (ANALOG)
: AUDIO (DIGITAL)
1 D3
3 D1
2 D2
15 D4
10
A1
11
A0
9
A2
5
Y
OPTICAL
RECEIVER
IC2201
OPTICAL
RECEIVER
IC2202
OPTICAL
RECEIVER
IC2203
OPTICAL
RECEIVER
IC707
14 D5
WAVE
SHAPER
IC2209
J2201
DIGITAL OUT
SWITCH
IC2206
5
DSEL1
4
DSEL0
6
DSEL2
7
REQ
11
CLK
12
LAT
13
OE
3
H_SEL2
2
H_SEL1
DIGITAL
ASSIGNABLE
(INPUT ONLY)
14
S-IN
2 RX0
10 RX6/UI
8 RX4
4 RX2
1 RXOUT
13 LPF
SI_A
21
RDATA
17
RBCK
20
RLRCK
27
XMCK
16
RMCK
DIR_NONAU
33
AUDIO/VO
DIGITAL AUDIO INTERFACE RECEIVER
IC2208
INPUT
SELECTOR
IC2207
DATA DECODER
IC2210
39
CE
37
DO
36
RERR
67
DIR_RERR
109
D595_LAT
108
D595_OE
66
DIR_DO
65
DIR_CE
34
CKST
68
DIR_CKST
41
XMODE
64
DIR_XMODE
93
AD_RST
168
FSRATE1
COM1-CLK
COM1-DAT
40
CL
COM1-CLK
D1001
38
DI
COM1-DAT
COM2_DATA
COM2_CLK
113
COM1_DATA 111
COM1_CLK 110
V595_LAT 8
V595_OE 7
FUNC_LAT 91
MIC_ON 26
80
COM2_CLK 112
COM2_DAT
COM1-DAT
COM1-CLK
V595_LAT
V595_OE
CTL
16
SYSTEM CONTROLLER
IC2003 (1/3)
MD/DAT
OPTICAL OUT
VIDEO 1
OPTICAL IN
OPTICAL
RECEIVER
IC2204
MD/DAT
OPTICAL IN
4 D0
OPTICAL
RECEIVER
IC2225
TV
OPTICAL IN
SAT/CATV
OPTICAL IN
TAPE/CD-R
OPTICAL IN
SA-CD/CD
COAXIAL IIN
5 RX3
VIDEO 2
COAXIAL IN
DVD/BD
COAXIAL IIN
VIDEO 3 IN/
PORTABLE AV IN
DIGITAL (OPT)
D1002
D1005
D1004
D1003
46
HDMI_ERROR
11
10
9
ANA/DIGI
ERR
95
DAC_DO
94
DAC_LAT
76 PREOUT_RY
17
5
DA DO
DA LAT
96
DA_RST
PREOUT-RY
79 HP_RY
81
SP-A-RY
83
SP-B-RY
84
C-RY
85
SB-RY
86
REAR-RY
SP-A_RY
SP-B_RY
C_RY
SB_RY
REAR_RY
23 HP_IN
HPSW
4
163
PROTECTOR
PROTECTOR
87 4/8_RY
4/8_RY
HP-RY
DA RESET
10
XM-DA_LAT
XM_DACLAT
FUNC-LAT
MIC
COM2_CLK
COM2_DATA
VOL_LAT 92
2ND_RY 106
CCD_RY 105
2ND-RY
3ND-RY 107
3ND-RY
CCD_RY
VOL-LAT
COM1_CLK
COM1_DATA
D.MIX_LAT
D.MIX_LAT
FUNC2_LAT 90
FUNC2_LAT
OPTICAL
TRANSCEIVER
IC2205
15
DSP_SEL
1
ANA/DIGI
PLL CLOCK
SELECT
Q2201-2203,2207
XIN
29
XOUT
28
X2201
24.576MHz
FM 75
Ω
COAXIAL
AM
ANTENNA
TUNER (FM/AM)
TUN_L
TUN_DO
TUN_CE
TUNED
TU-L
3
H/XSEL2
H/XSEL1
2
71 TUN_DO
70 TUN_LAT
69 TUNED
TUN_DATA
60 TUNER_DATA
TUN_CLK
61 TUNER_CLK
TUN_R
R-CH
RDS-DATA
RDS-CLK
72 RDS_DATA
165 RDS_CLK
R-CH
ADFL
HDMI_ERROR
10 AINL
AINR
SCLK
LRCK
MCLK
RST
12
7
8
2
9
A/D CONVERTER
IC2217
SDOUT 4
BUFFER
IC2211
2 A0
3 B0
3 B0
SD0
6 B1
SD1
5 A1
SI_B
D/A MCK
BCK
LRCK
DIR-ERR
MCK
DATA SELECTOR
IC2213
Y0 4
SI_C
Y1 7
SI_D
Y2 9
SI_E
Y3 12
S 1
14 A3
A2
11
DATA SELECTOR
IC2212
Y3 12
Y2 9
A1
5
B1
6
B2
10
B3
HDMI_MCK
HDMI_LRCK
HDMI_BCK
HDMI_BCK, HDMI_LRCK,
HDMI_MCK
HDMI_MCK
13
Y1 7
7
6
51
8
36
S
1
1
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
( AEP, Russian, Ukrainian, UK, Chinese)
HDMI_SPDIF
1
10 B2
SD2
11 A2
13 B3
SD3
NON_LPCM
14 A3
2 A0
3 B0
3 B0
6 B1
5 A1
DATA SELECTOR
IC2214
Y0 4
Y1 7
Y2 9
S 1
10 B2
11 A2
COM2_CLK
COM2_DATA
15
(Page 44)
(Page 40)
(Page 35)
(Page 39)
(Page 43)
(Page 43)
(Page 35)
(Page 34)
(Page 38)
(Page 37)
(Page 39)
(Page 37)
(Page 37)
Ver. 1.2
STR-DA5300ES
34
34
STR-DA5300ES
6-2. BLOCK DIAGRAM – DSP Section –
(Page 33)
(Page 35)
DSP1
IC5002
DPSIB
DPSIA
DPSID
DPSIC
DPSOB
DPSOA
DPSOD
DPSOC
DPSIE
DPDVBCK
DPDVLRCK
P_ERROR
SPIDS A11
FLAG0 F2
RESET B10
DPBCK
DPLRCK
D5001
FLAG1
DPFSCK
NONAUDIO
SI_B
SI_A
SI_D
SI_C
SI_E
BCK
LRCK
DIR-ERR
MCK
DIR_NONAU
DSP1_MOSI
93
DSP1_MISO
92
RDATA0
1
DSP1_SPICLK
94
DSP1_SPIDS
11
DSP1_INT
83
DSP1_RESET
12
DSP1_BOOTCFG0
13
DSP1_BOOTCFG1
DSP1_MOSI
DSP1_MISO
DSP1_SPICLK
DSP1_SPIDS
DSP1_INT
DSP1_RESET
DSP1_BOOTCFG0
DSP1_BOOTCFG1
14
DSP2_BOOTCFG0
25
DSP2_BOOTCFG1
26
SF2_DSP2_MAS
17
SF2_CPU_CE
20
DSP2_MOSI
100
DSP2_MISO
99
DSP2_SPICLK
101
DSP2_SPIDS
21
DSP2_INT
84
DSP2_RESET
DSP2_BOOTCFG0
DSP2_BOOTCFG1
9
DSP2_SIB_SEL
10
P_ERROR
SF2_DSP2_MAS
SF2_CPU_CE
DSP2_MOSI
DSP2_MISO
DSP2_SPICLK
DSP2_SPIDS
DSP2_INT
DSP2_RESET
22
DSP CONTROLLER
IC5208
BOOTCFG1 C1
XIN 58
XOUT 57
DSP1_SPIDS
DSP1_SPICLK
DSP1_MOSI
DSP1_MISO
DSP1_BOOTCFG1
DSP1_INT
DSP1_RESET
BOOTCFG0 C2
DSP1_BOOTCFG0
SPICLK B9
MOSI A9
MISO A10
X5202
12.5MHz
: AUDIO (DIGITAL)
SIGNAL PATH
DSP2
IC5202
DPSIC
DPSIB
DPSIE
DPSIA
DPSID
DPSOB
DPSOA
DPSOD
DPSOC
DPDVBCK
DPDVLRCK
SPIDS A11
FLAG0 F2
RESET B10
SF2_DSP2_CE
SPICLK
MOSI
CE#
1
SCK
6
SI
5
SO
2
FLIP-FLOP
IC5212
SF2_CPU_CE
SF2_DSP2_MAS
DSP2_MOSI
DSP2_MISO
DSP2_SPICLK
BUFFER
IC5211
SERIAL FLASH
IC5213
DSP2_SPIDS
DSP2_INT
DSP2_RESET
C1
DSP2_BOOTCFG1
BOOTCFG0
BOOTCFG1
C2
DSP2_BOOTCFG0
DPBCK
DPLRCK
FLAG1
DPFSCK
P_ERROR
DPSOE
SI3
102
SO3
103
MD_DATA
DM_DATA
89
MD_BUSY
63
MD_INT
82
DM_BUSY
64
MD2
52
DRST_TRG
36
XRESET
55
D232C_RX
D232C_TX
MD_DATA
MD_BUSY
MD_INT
DM_BUSY
MD2
DRST_TRG
DUCOM_RESET
DM_DATA
90
SDO2
SDO1
SDO4
SDO3
LRCK
BCK
20
9
19
18
AD8 – AD15
ALE
LE
N2
M2
N3
11
S-RAM
IC5007
IC5007
CE#
ADDRESS LATCH
IC5010
IC5012
ADDRESS LATCH
IC5009
AD0 – AD7
LE
11
FLASH MEMORY
IC5006
O6 13
26
CE
8
OE
37
WE#
11
WE
15
OE#
28
RESET#
I/O0 – I/O7
DQ0 – DQ7
D0 – D7
D0 – D6
O0 – O7
O0 – O4
DQ15/A-1,
A0 – A19
A0 – A19
A0 – A18
12
ALE
DAI_P1
AD0 – AD7
LE
11
S-RAM
IC5207
IC5207
OE
ADDRESS LATCH
IC5210
ADDRESS LATCH
IC5209
RD
AD8 – AD15
LE
WR
11
DSP1_A16
41
WE
17
P10
M13
M14
L14
K14
K14
P14
G14
H13
H13
F1
F14
F13
P11
P12
P13
H14
J14
N2
N3
M2
B9
A9
A9
SF2_DSP2_MAS P9
MISO A10
E14
P15
P14
M13
M14
L14
K14
G14
H13
F1
F14
F13
P11
P10
P12
P13
N14
H14
J14
E14
X5001
12.288MHz
XTAL
CLKIN
B4
A2
X5201
25MHz
XTAL
CLKIN
B4
A2
WR
RD
RD
11 3A
10 3B
10 3B
3 1B
2 1A
DATA SELECTOR
IC5013
3Y 9
1Y 4
2Y 7
SELECT 1
6 2B
5 2A
D0 – D7
A0 – A16
I/O0 – I/O7
O0 – O7
D0 – D7
O0 – O7
(Page 35)
(Page 35)
STR-DA5300ES
35
35
STR-DA5300ES
6-3. BLOCK DIAGRAM – DIGITAL AUDIO Section –
(Page 43)
(Page 37)
(Page 36)
39
X0
40
X1
174
EEPROM_SDA
140 VIDEO-UCOM_V/M
141 VIDEO-UCOM_M/V
142 VIDEO-UCOM_BUSY
141 VIDEO-UCOM_M/V
142 VIDEO-UCOM_BUSY
59
MUTE
62
56
55
AVSYNC_XCS
AVSYNC_SIO
AVSYNC_RSTN
FSRATE2
EEPROM
IC2007
X2001
4MHz
131
INITX
STB +3.3V
126
RST_TRG
RESET SIGNAL
BUFFER
IC2006
BUFFER
IC2216
175
EEPROM_SCL
VUCOM_TX
6 SCL
5 SDA
STOP
VUCOM_RX
VUCOM_BUSY
124 VIDEO-UCOM_MODE
125 VIDEO-UCOM_END-FLAG
136 VIDEO-UCOM_RESET
125 VIDEO-UCOM_END-FLAG
136 VIDEO-UCOM_RESET
VUCOM_MD
VYCOM_FLG
VUCOM_RST
137 XMUART_XM/M
138 XMUART_M/XM
138 XMUART_M/XM
XM_UART_TX
XM_UART_RX
139 XM_RESET
XM RESET
3 XM_POW
XM POW
78 D_POWER
D_POW
SYSTEM MUTING
SWICTH
Q2205, 2206
ERR
ANA/DIGI
• SIGNAL PATH
• R-CH is omitted due to same as L-CH.
: AUDIO (DIGITAL)
: AUDIO (ANALOG)
SYSTEM CONTROLLER
IC2003 (2/3)
SD-RAM
IC2224
LIP SYNC ADJUST
IC2223
5 DIB
4 DIA
20
DOB
19
DOA
DOD
WEN
A0 – A10, BA
DQ0 – DQ15
CSN
SI
SCLK
DMUTEN
RSTN
SIO
XCS
DOC 21
22
43
40
3
2
10
9
14
15
11
8
BCK
LRCK
POW_RY
75
14
VOUT1
46 DATA2
47 DATA3
31 DATA4
40 BCK
41 LRCK
41 LRCK
38 SCKI
33 MDO
34 MDI
DA DO
COM1_DATA
35 MC
COM1_CLK
36 ML
DA LAT
37 RST
DA RESET
13
VOUT2
LOW-PASS
FILTER
IC2222
IC2222
D/A-L
R-CH
12
VOUT3
11
VOUT4
LOW-PASS
FILTER
IC2221
IC2221
D/A-SL
R-CH
16
VOUT7
20
VOUT8
LOW-PASS
FILTER
IC2219
IC2219
D/A-SBL
R-CH
10
VOUT5
9
VOUT6
LOW-PASS
FILTER
IC2220
IC2220
D/A-C
D/A-SW
D/A CONVERTER
IC2218
17
10
45 DATA1
SD02
20
21
27
148 SIRIUS_TX
149 SIRIUS_RX
149 SIRIUS_RX
SIRI_TX
SIRI_RX
77 SIRIUS-POW_EN
SIRI_POW_EN
29
154 DMPORT_DM/M
155 DMPORT_M/DM
155 DMPORT_M/DM
DMPORT_TX
DMPORT_RX
156 DMPORT_DET
DMPORT_DET
23
28
26
POW-RY
STOP
82
STOP
25
CEC_OUT
47
CEC_TX
CEC_IN
121
CEC_RX
24
9850_INIT
9850_INIT
9850_FS
158
157
9850_FS
22
RX232C
TX232C
30
D232C_RX
D232C_TX
18
SD01
7 DID
6 DIC
SD04
SD03
DATA SELECTOR
IC2010
2C0 10
2C2 12
1Y 7
2C1 11
B
2
A
14
5 1C2
9 2Y
4 1C1
BCKI
MCKI
D/A MCK
RESET SWITCH
IC2004
RESET SIGNAL
GENERATOR
IC2005
J1499
RS-232C
2
3
RS-232C DRIVER
IC1499
T1OUT 14
R1IN 13
T1IN
11
RS232C_RX 134
R1OUT
12
LEVEL SHIFT
IC2002
RS232C_TX 135
232C-SEL2 167
232C-SEL1 166
MD2 128
BUFFER
IC2009
15
18
WE
CS
CS
170
M-D_DATA
MD_BUSY
51
M-D_INT
54
DM_BUSY
52
DSP-UCOM_MODE
50
DSP-UCOM_END-FLAG
49
DSP-UCOM_RESET
53
D-M_DATA
MD_DATA
MD_BUSY
MD_INT
DM_BUSY
MD2
DRST_TRG
DUCOM_RESET
DM_DATA
19
144
143
CASN
RASN
42
41
16
17
CAS
RAS
RAS
CLKO
CKE
30
29
35
34
CLK
CKE
CKE
DQM 31
36
14
UDQM
LDQM
LDQM
A0 – A11
DQ1 – DQ16
(Page 34)
(Page 44)
(Page 38)
(Page 43)
(Page 44)
(Page 43)
(Page 34)
(Page 33)
(Page 33)
(Page 39)
(Page 34)
(Page 38)
STR-DA5300ES
36
36
STR-DA5300ES
(Page 38)
6-4. BLOCK DIAGRAM – HDMI Section (1/2) –
(Page 37)
(Page 38)
(Page 35)
(Page 37)
• SIGNAL PATH
: AUDIO (DIGITAL)
: VIDEO
VIDEO SYSTEM CONTROLLER
IC3610 (1/3)
CN3501
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 6
CN3502
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 5
CN3503
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 4
R0X0+
R0X0-
R0X0-
R0X1+
R0X1-
R0X1-
R0X2+
R0X2-
R0X2-
R0XC+
R0XC-
R0XC-
R1X0+
R1X0-
R1X0-
R1X1+
R1X1-
R1X1-
R1X2+
R1X2-
R1X2-
R1XC+
R1XC-
R1XC-
R2X0+
R2X0-
R2X0-
R2X1+
R2X1-
R2X1-
R2X2+
R2X2-
R2X2-
R2XC+
R2XC-
R2XC-
22
21
7
9
25
24
4
6
28
27
1
3
19
18
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
HDMI INPUT
SELECT
IC3503
GATE
IC3524(1/3)
DSDA0
30
HPD0
16
RPWR0
32
DSCL0
31
42
41
7
9
45
44
4
6
48
47
1
3
39
38
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
DSDA1
50
19
HPD1
36
DSCL1
51
62
61
7
9
65
64
4
6
68
67
1
3
59
58
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
CEC
13
12
16
15
DSDA2
70
HPD2
56
DSCL2
71
HDMI RECEIVER
IC3511
(1/2)
HDMI
TRANSCEIVER
IC3513
10
11
40
39
TX0+ 7
TX0-
TX0-
TX1+
TX1-
TX2+
TX2-
TXC+
TXC-
8
44
43
4
5
48
47
1
2
52
R0XC+
R0XC–
R0X0+
R0X0–
R0X1+
R0X1–
R0X2+
R0X2–
DSDA0
DSCL0
51
33
R0PWR5V
35
DSCL1
29
DSDA1
28
R1PWR5V
DSCL
DSDA
PWR5V
30
34
CSDA
CSCL
26
27
TSCL 78
TSDA 77
LSDA/EPSEL[0] 14
LSCL/EPSEL[1] 15
HPDIN 76
TPWR/I2CADDR 79
RESET# 13
9185_HPD[1]
9185_RST[1]
9185_HPD[1]
9185_RST[1]
93
94
9185_1_HPD1-3
9185_1_RST
DATA SELECTOR
IC3508
EEPROM
IC3509
2Y3
4
2Y1
5
1Y3
11
1Y1
14
3
2-COM
13
1-COM
5
SDA
6
SCL
10
A
9
B
7
WP
8
TX_RST
30
TX_INT
123
UC3V_SCL
118
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SDA,
UC3V_SCL
117
EDIO_SEL1
EDIO_SEL0
9
2Y0
1
1Y0
12
16 -13,10 -7,3 -1,
144,141 -138,135 -132,
129 -126,123 -120,
117 -114,111 -108
Q0 – Q35
98 -90, 86 -77
75 -67, 63 -56
D0 -D35
ODCK 5
HSYNC 20
VSYNC 21
DE
ODCK
HSYNC
VSYNC
DE
19
SPDIF 78
SD0 -SD3
4
4
4
36
MCLK 89
SCK 86
WS 85
IDCK
88
HSYNC
2
VSYNC
3
DE
1
81 -84
SPDIF
DL0, DR1,
DL1, DR2
DL1, DR2
4
DL2
21
SD0 -SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+ 34
TX0– 33
TX0– 33
7
9
TX1+ 37
TX1– 36
TX1– 36
4
6
TX2+ 40
TX2– 39
TX2– 39
1
3
TXC+ 31
TXC– 30
TXC– 30
10
HPD
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
HOT PLUG DET
CEC
51
19
12
16
15
13
DSDA 47
DSCL 46
INT 24
RESET# 25
CSDA 49
CSCL 48
CEC DATA
SWITCH
Q2001 – 2004
CN3511
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT
TX_INT
TX_RST
TX_INT
TX_RST
CEC_RX
SPDIF
WS
MCK
SCK
SD0 -SD3
SD0 -SD3, SPDIF,
MCK, SCK, WS
MCK, SCK, WS
95
94
XTALIN
XTALOUT
X3501
28.322MHz
32
33
34
CEC_TX
24
Q [4] - Q [11], Q[16] -Q[23], Q[28]-Q[35]
ODCK, HSYNC, VSYNC, DE
ODCK, HSYNC, VSYNC, DE
Q [4] - Q [11],
Q[16] -Q[23],
Q[28]-Q[35]
LEVER SHIFT
Q3501
GATE
IC3524(2/3)
RPWR1
52
LEVER SHIFT
Q3502
GATE
IC3524(3/3)
RPWR2
72
LEVER SHIFT
Q3503
12
13
13
11
2
1
1
3
9
10
8
31
52
37
19
19
(Page 37)
(Page 37)
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