Sony SCD-XA777ES Service Manual ▷ View online
85
SCD-XA777ES
•
MAIN BOARD IC803 CXD9647R (DSD DIGITAL SIGNAL PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
VDD
—
Power supply terminal (+3.3V) (digital system)
2
XMSDOE
O
Serial data output enable signal output terminal Not used (open)
3
MSREADY
I
Ready signal input from the CPU (IC901) “L”: ready
4
MSDATO
O
Serial data output to the CPU (IC901)
5
MSDATI
I
Serial data input from the CPU (IC901)
6
MSCK
I
Serial data transfer clock signal input from the CPU (IC901)
7
XMSLAT
I
Serial data latch pulse signal input from the I/O expander (IC902)
8
GND
—
Ground terminal (digital system)
9 to 16
TESTO
O
Output terminal for the test (normally: open)
17, 18
TESTI
I
Input terminal for the test (normally: fixed at “L”)
19
TESTO
O
Output terminal for the test (normally: open)
20
GND
—
Ground terminal (digital system)
21
TESTI
I
Input terminal for the test (normally: fixed at “L”)
22
GND
—
Ground terminal (digital system)
23
TESTI
I
Input terminal for the test (normally: fixed at “L”)
24
TESTO
O
Output terminal for the test (normally: open)
25
VDD
—
Power supply terminal (+3.3V) (digital system)
26
GND
—
Ground terminal (digital system)
27
TESTI
I
Input terminal for the test (normally: fixed at “L”)
28
FS128
O
Bit clock signal (2.8224 MHz) output for DSD data output to the DSD decoder (IC801)
29
TEST2
I
Input terminal for the test (normally: fixed at “L”)
30
FS64
O
Phase reference signal output for DSD output phase modulation to the DSD decoder (IC801)
31
GND
—
Ground terminal (digital system)
32
DSI1
I
DSD data (front L-ch) input from the DSD decoder (IC801)
33
GND
—
Ground terminal (digital system)
34
DSI2
I
DSD data (front R-ch) input from the DSD decoder (IC801)
35
VDD
—
Power supply terminal (+3.3V) (digital system)
36
DSI3
I
DSD data (center) input from the DSD decoder (IC801)
37
GND
—
Ground terminal (digital system)
38
DSI4
I
DSD data (sub woofer) input from the DSD decoder (IC801)
39
GND
—
Ground terminal (digital system)
40
DSI5
I
DSD data (surround L-ch) input from the DSD decoder (IC801)
41
VDD
—
Power supply terminal (+3.3V) (digital system)
42
DSI6
I
DSD data (surround R-ch) input from the DSD decoder (IC801)
43
GND
—
Ground terminal (digital system)
44 to 46
TESTO
O
Output terminal for the test (normally: open)
47
TESTI
I
Input terminal for the test (normally: fixed at “L”)
48
TESTO
O
Output terminal for the test (normally: open)
49
TESTI
I
Input terminal for the test (normally: fixed at “L”)
50
GND
—
Ground terminal (digital system)
51
VDD
—
Power supply terminal (+3.3V) (digital system)
52
TESTO
O
Output terminal for the test (normally: open)
53
GND
—
Ground terminal (digital system)
54
TESTO
O
Output terminal for the test (normally: open)
55
GND
—
Ground terminal (digital system)
56
DSAL
O
DSD data (front L-ch) output to the digital filter (IC101, 201, 1101, 1201)
86
SCD-XA777ES
Pin No.
Pin Name
I/O
Description
57
VDD
—
Power supply terminal (+3.3V) (digital system)
58
DSAR
O
DSD data (front R-ch) output to the digital filter (IC101, 201, 1101, 1201)
59
GND
—
Ground terminal (digital system)
60
DSALS
O
DSD data (surround L-ch) output to the digital filter (IC1101, 1201)
61
GND
—
Ground terminal (digital system)
62
DSARS
O
DSD data (surround R-ch) output to the digital filter (IC1101, 1201)
63
VDD
—
Power supply terminal (+3.3V) (digital system)
64
DSAC
O
DSD data (center) output to the digital filter (IC2101)
65
GND
—
Ground terminal (digital system)
66
DSASW
O
DSD data (sub woofer) output to the digital filter (IC2201)
67
GND
—
Ground terminal (digital system)
68
PHREFI
I
Phase reference signal input terminal for DSD output phase modulation
69
PHREFO
O
Phase reference signal output terminal for DSD output phase modulation
70
BCKASL
I
Input/output selection signal input terminal of bit clock signal (2.8224 MHz) for DSD data output
“L”: input (slave), “H”: output (master) (fixed at “L” in this set)
“L”: input (slave), “H”: output (master) (fixed at “L” in this set)
71
BCKAO
O
Bit clock signal (2.8224 MHz) output terminal for DSD data output Not used (open)
72
BCKAI
I
Bit clock signal (2.8224 MHz) input terminal for DSD data output Not used
73, 74
TESTO
O
Output terminal for the test Not used
75
VDD
—
Power supply terminal (+3.3V) (digital system)
76
GND
—
Ground terminal (digital system)
77
TESTI
I
Input terminal for the test Not used
78
A2
I
Clock signal input terminal
79
XSBSL2
I
HD mode selection signal input from the I/O expander (IC902)
80
TESTI
I
Input terminal for the test Not used
81
A1
I
Clock signal input terminal
82
XABSL1
I
HD mode selection signal input from the I/O expander (IC902)
83, 84
TESTO
O
Output terminal for the test Not used
85
DVCKI
I
11.2896 MHz clock signal input terminal
86
TESTI
I
Input terminal for the test Not used
87
GND
—
Ground terminal (digital system)
88
MCKI
I
Master clock signal (33.8688 MHz) input terminal
89
VDD
—
Power supply terminal (+3.3V) (digital system)
90
LRCK
O
L/R sampling clock signal (44.1kHz) output to the digital filter (IC101, 201, 1101, 1201, 2101,
2201)
2201)
91
CDDATAR
O
Serial data output to the digital filter (IC101, 201, 1101, 1201, 2101, 2201)
92
CDDATAL
O
Serial data output to the digital filter (IC101, 201, 1101, 1201, 2101, 2201)
93
CDDATASL
I
CD mode selection signal input from the I/O expander (IC902)
94
BCKI
I
Bit clock signal (2.8224 MHz) input from the CXD3008Q (IC509)
95
LRCKI
I
L/R sampling clock signal (44.1 kHz) input from the CXD3008Q (IC509)
96
CDDATAI
I
Serial data input from the CXD3008Q (IC509)
97
TESTI
I
Input terminal for the test (normally: fixed at “L”)
98
SMUTE
I
Muting on/off signal input from the CPU (IC901) “H”: muting on
99
XRST
I
Reset signal input from the I/O expander (IC902) “L”: reset
100
GND
—
Ground terminal (digital system)
87
SCD-XA777ES
•
MAIN BOARD IC901 CXP973F064R-1 (CPU)
Pin No.
Pin Name
I/O
Description
1
MODE DF
O
SACD/CD mode selection signal output to the data selector (IC304, 306, 307, 308)
“L”: CD mode, “H”: SACD mode
“L”: CD mode, “H”: SACD mode
2
AMUTE
O
Muting on/off signal output to the analog line circuit “L”: muting on
3
DOCTRL
O
Digital out on/off control signal output to the CXD3008Q (IC509)
“L”: digital out off, “H”: digital out on
“L”: digital out off, “H”: digital out on
4
LAT DAC
O
Serial data latch pulse signal output to the D/A converter (IC904)
5
DATA DAC
O
Serial data output to the D/A converter (IC904)
6
CLK DAC
O
Serial data transfer clock signal output to the D/A converter (IC904)
7
FCS JMP 4
O
Focus jump 1 signal output to the BA5983FP (IC502)
8
FCS JMP 3
O
Focus jump 2 signal output to the BA5983FP (IC502)
9
SENS CD
I
Internal status (SENSE) signal input from the CXD3008Q (IC509)
10
XCS2
O
Chip select signal output to the D-RAM Not used (pull up)
11
XCS IO
O
Chip select signal output to the I/O expander (IC902)
12
XCS DVD
O
Chip select signal output to the CXD1882R (IC701)
13
VSS
—
Ground terminal (digital system)
14 to 21
D0 to D7
I/O
Two-way data bus with the CXD1882R (IC701) and I/O expander (IC902)
22
INT0 DVD
I
Interrupt signal input from the CXD1882R (IC701)
23
INT1 DVD
I
Interrupt signal input from the CXD1882R (IC701)
24
T SENS
I
Disc tray status detection signal input from the table sensor Not used
25
MON DVD
I
Monitor signal input terminal Not used (open)
26
DATA CD
O
Serial data output to the CXD3008Q (IC509)
27
XLAT CD
O
Serial data latch pulse signal output to the CXD3008Q (IC509)
28
A1IN
I
Sircs remote control signal input of the CONTROL A1II Not used
29
COUT CD
I
Numbers of track counted signal input from the CXD3008Q (IC509)
30
IN SW
I
Loading in switch (S001) input terminal “L”: loading in
31
OUT SW
I
Loading out switch (S002) input terminal “L”: loading out
32
MIRR
I
Mirror signal input from the CXD3008Q (IC509)
33
SUBQ
I
Subcode Q data input from the CXD3008Q (IC509)
34
SCOR
I
Subcode sync (S0+S1) detection signal input from the CXD3008Q (IC509)
35
SQCLK
O
Subcode Q data reading clock signal output to the CXD3008Q (IC509)
36
NC
—
Not used (open)
37
CLOK CD
O
Serial data transfer clock signal output to the CXD3008Q (IC509)
38
XRST
I
System reset signal input from the reset signal generator (IC905) “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
39
VSS
—
Ground terminal (digital system)
40
XTAL I
System clock input terminal (20 MHz)
41
EXTAL O
System clock output terminal (20 MHz)
42
VDD
—
Power supply terminal (+3.3V) (digital system)
43
LD ON
O
Laser diode on/off control signal output to the CXD1881R (IC001)
“L”: laser diode off, “H”: laser diode on
“L”: laser diode off, “H”: laser diode on
44
XDIS IO
O
Reset signal output to the I/O expander (IC902) “L”: reset
45
MUTE DSD
O
Muting on/off signal output to the DSD decoder (IC801) and CXD9647R (IC803)
“H”: muting on
“H”: muting on
46
XMSLAT
O
Serial data latch pulse signal output to the DSD decoder (IC801)
47
READY DSD
I
Ready signal input from the DSD decoder (IC801) and CXD9647R (IC803) “L”: ready
48
SDIN DSD
I
Serial data input from the DSD decoder (IC801) and CXD9647R (IC803)
88
SCD-XA777ES
Pin No.
Pin Name
I/O
Description
49
SOUT DSD
O
Serial data output to the DSD decoder (IC801) and CXD9647R (IC803)
50
SCK DSD
O
Serial data transfer clock signal output to the DSD decoder (IC801) and CXD9647R (IC803)
51
BUSY DP
I
Busy signal input to the display controller (IC1001)
52
SD IN
I
Serial data input to the display controller (IC1001)
53
SDOUT
O
Serial data output to the display controller (IC1001)
54
SLK
O
Serial data transfer clock signal output to the display controller (IC1001)
55
VSS
—
Ground terminal (digital system)
56
REQ
O
Request signal output to the display controller (IC1001)
57
FCS BST
O
Focus boost signal output terminal Not used (open)
58
GFS DVD
I
Guard frame sync signal input from the CXD1882R (IC701)
59
MUTE CD
O
Muting on/off control signal output to the CXD3008Q (IC509) “L”: muting on
60
MUTE 2D
O
Muting on/off control signal output to the BA5983FP (IC502) “L”: muting on
61
MUTE LOAD
O
Muting on/off control signal output to the BA5912AFP (IC512) “L”: muting on
62
FG
I
Frequency generator signal input from the BA5983FP (IC502)
63
SP ON
O
Muting on/off control signal output to the BA5912AFP (IC512) “L”: muting on
64
JIT
I
Jitter signal input terminal
65
TE
I
Tracking error signal input from the CXD1881R (IC001)
66
PI
I
Pull in signal input from the CXD1881R (IC001)
67
FE
I
Focus error signal input from the CXD1881R (IC001)
68
AVSS
—
Ground terminal (for A/D converter)
69
AVREF
I
Reference voltage input terminal (for A/D converter)
70
AVDD
—
Power supply terminal (+3.3V) (for A/D converter)
71
GFS CD
I
Guard frame sync signal input from the CXD3008Q (IC509)
72
SCLK CD
O
SENSE serial data reading clock signal output to the CXD3008Q (IC509)
73
NC
—
Not used (open)
74
FOK CD
I
Focus OK signal input from the CXD3068Q (IC509)
75
LOCK CD
I
GFS is sampled by 460 Hz “H” input when GFS is “H”
76
RF AD CE
O
Chip enable signal output to the A/D converter Not used
77
SP DW
O
Serial data transfer clock signal output to the CXD1881R (IC001)
78
EEPSIO
I/O
Two-way data bus with the EEPROM (IC903)
79
EEPSCL
O
Clock signal output to the EEPROM (IC903)
80
RXD
I
Serial data input from the RS-232C (for check)
81
TXD
O
Serial data output to the RS-232C (for check)
82
SDCLK RF
O
Clock signal output to the CXD1881R (IC001)
83
SDATA RF
I/O
Two-way data bus with the CXD1881R (IC001)
84
XWR
O
Write strobe signal output to the CXD1882R (IC701) and I/O expander (IC902)
85
XRD
O
Read strobe signal output to the CXD1882R (IC701) and I/O expander (IC902)
86
PWE
I
Control signal input from the RS-232C (for check)
87
VDD
—
Power supply terminal (+3.3V) (digital system)
88
VSS
—
Ground terminal (digital system)
89 to 91
A0 to A2
O
Address signal output to the CXD1882R (IC701) and I/O expander (IC902)
92 to 96
A3 to A7
O
Address signal output to the CXD1882R (IC701)
97
INIT DF
O
Initial signal output to the digital filter (IC101, 201, 1101, 1201, 2101, 2201)
98
LATCH DF
O
Latch signal output to the digital filter (IC101, 201, 1101, 1201, 2101, 2201)
99
SHIFT DF
O
Shift signal output to the digital filter (IC101, 201, 1101, 1201, 2101, 2201)
100
SCDATA DF
O
Serial data output to the digital filter (IC101, 201, 1101, 1201, 2101, 2201)
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