DOWNLOAD Sony SCD-XA777ES Service Manual ↓ Size: 12.67 MB | Pages: 127 in PDF or view online for FREE

Model
SCD-XA777ES
Pages
127
Size
12.67 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
scd-xa777es.pdf
Date

Sony SCD-XA777ES Service Manual ▷ View online

73
SCD-XA777ES
IC701
CXD1882R-1 (MAIN Board)
133
134
135
136
137
138
139
140
141
142
143
144
146
147
148
149
150
151
152
153
154
155
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158
159
160
161
162
163
165
166
164
167
168
169
170
172
173
174
175
176
1
171
145
SPINDLE
CONTROL
CD-
DSP
I/F
DAC
I/F
132131130129128
123122
119118
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
22
CPU IF, DMA CONTROLLER
121120
117116115114113112111110109108107
106105104103102101100 99 98 97 96
95 94 93 92 91 90 89
88
87
126125
124
PLL
VCO
127
SYNC DETECT
EFM+
DEMODULATOR
SELECTOR ID
DETECT
SUBCODE
DEINTERLEAVE & ECC
SYNC
CONTROL
ATAPI
REGISTERS
DMA
CONTROLLER
PRIORITY RESOLVE
& SEQUENSOR
DVD
MAIN DATA
ECC & EDC
CD-ROM
MAIN DATA
ECC & EDC
ATAPI
PACKET
FIFO
86
85
84
83
82
81
80
79
78
75
74
73
72
71
70
69
68
67
66
77
76
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
DESCRAMBLE
RF ASYMMETRY
HOST I/F
ATAPI
OR
DMA
OR
VIDEO
DMA
FIFO
AUTHENTICATION
INTERNAL
CLOCK
CD ESP
GNDA2
GNDA1
SPO
VC2
MDIN2
MDIN1
VCCA1
CLVS
VSS
MDSOUT
VDD
MDPOUT
GSCOR
EXCK
SBIN
VSS
SCOR
WFCK
VDD5V
XRCI
VDDS
C2PO
VDD
DBCK
BCLK
DDAT
MDAT
VSS
DLRC
LRCK
IFS0
IFS1
XRST
XTAL
VSS
XTL2
XTL1
D0
D1
D2
D3
D4
VDD
DFCT/LINK
D5
D6
VSS
D7
A0
VDD
A1
VDD5V
A2
A3
A4
A5
A6
A7
VSS
XWAIT
XRD
XWR
XCS
XINT0
XINT1
XHRS
HDB7
VSS
HDB8
HDB6
VDDS
HDB9
HDB5
HDBA
HDB4
VSS
HDBB
HDB3
VDD
HDBC
VDDS
HDB2
HDBD
HDB1
VSS
HDBE
HDB0
VDD
VDD
MA7
MA6
MA5
MA4
MA3
MA2
VSS
MA1
MA0
XRAS
MDB7
MDB6
MDB5
VDD5V
MDB4
VSS
MDB3
MDB2
MDB1
MDB0
VDD
XMWR
DASP
VDD
HCS1
HCS0
VSS
HA2
HA0
VDDS
XPDI
HA1
XS16
HINT
XHAC
VSS
REDY
VDD
XHRD
XHWR
VDDS
HDRQ
HDBF
FDO
PDHVCC
PDO
VCCA2
VCCA3
GNDA3
GNDA4
VCCA4
VCCA5
VCOIN
VCOR1
RFIN
RFDCC
DASYI
ASF2
ASF1
GNDA5
DASYO
VDD
APEO
VSS
GFS
MDBF
MDBE
MDBD
VDD5V
MDBC
MDBB
VDD
MDBA
VSS
MDB9
MDB8
XCAS
XMOE
MA11/MNT2
MA10/MNT1
MA9/MNT0
VSS
MA8
LPF2
VC1
LPF5
LPF1
74
SCD-XA777ES
+
4
NC
INPUT
NC
GND
1.25V
1 2
3
5
6
7
8
DELAY
CAPACITOR
OUTPUT
SUPPLY
VOLTAGE
NC
IC904
BU2500FV-E2 (MAIN Board)
IC905
M51957BFP-600C (MAIN Board)
8BIT LATCH
BUFFER AMP
20
19 18
17
14
16
15
11
1
5
4
3
2
9
8
7
6
10
12
13
12BIT
SHIFT REGISTER
ADDRESS
DECODER
8BIT R-2R
D/A CONVERTER
GND
AO2
AO1
DI
DO
CLK
LD
VCC
AO11
AO12
VSS
AO6
AO5
AO4
AO3
AO10
AO9
AO8
AO7
VDD
75
SCD-XA777ES
IC1002
MSM9201-03GS-K (PANEL Board)
61
62
40
39
38
59
60
57
58
55
56
53
54
51
52
49
50
47
48
45
46
43
44
41
42
65
63
64
66
68
67
70
71
72
73
74
75
76
77
78
79
80
69
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1 2
COMMAND
DECODER
CONTROL
CIRCUIT
GRID
DRIVER
PORT
DRIVER
TIMING
GENERATOR1
TIMING
GENERATOR2
8BIT
SHIFT
REGISTER
WRITE
ADDRESS
COUNTER
READ
ADDRESS
COUNTER
OSCILLATOR
DUTY
CONTROL
DIGIT
CONTROL
ADDRESS
SELESTOR
ADRAM
24W x 4B
DCRAM
24W x 8B
CGRAM
240W x 35B
CGRAM
16W x 35B
AD
DRIVER
SEGMENT
DRIVER
COM23
COM24
OSC0
VFL1
GND
OSC1
CS
RESET
DA
VDD
P1
P2
P3
P4
VFL2
NC
VDISP2
AD1
AD2
CP
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
AD3
AD4
COM2
COM1
VDISP1
SEG35
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
COM21
COM22
COM19
COM20
COM17
COM18
COM15
COM16
COM13
COM14
COM11
COM12
COM9
COM10
COM7
COM8
COM5
COM6
COM3
COM4
76
SCD-XA777ES
5-39.
IC  PIN  FUNCTION  DESCRIPTION
Pin No.
Pin Name
I/O
Description
1
DVDD0
Power supply terminal (+3.3V) (digital system)
2
XRST
I
Reset signal input from the I/O expander (IC902)    “L”: reset
3
MUTE
I
Muting control signal input from the CPU (IC901)    “H”: muting
4
DATA
I
Serial data input from the CPU (IC901)
5
XLAT
I
Latch signal input from the CPU (IC901)
6
CLOK
I
Clock signal input from the CPU (IC901)
7
SENS
O
Internal status (SENSE) signal output to the CPU (IC901)
8
SCLK
I
Serial data transfer clock input from the CPU (IC901)
9
ATSK
I
Input pin for anti-shock (fixed at “L”)
10
WFCK
O
Write frame clock signal output to the SACD decoder (IC701)
11
XUGF
O
XUGF signal output terminal    Not used (open)
12
XPCK
O
XPCK signal output terminal    Not used (open)
13
GFS
O
Guard frame sync signal output to the CPU (IC901)
14
C2PO
O
C2 pointer signal output to the SACD decoder (IC701)
15
SCOR
O
Subcode sync OR signal output to the SACD decoder (IC701) and the CPU (IC901)
16
C4M
O
4.2336 MHz clock signal output terminal    Not used (open)
17
WDCK
O
Guard subcode sync OR signal output to the SACD decoder (IC701)
18
DVSS0
Ground terminal (digital system)
19
COUT
O
Numbers of track counted signal output to the CPU (IC901)
20
MIRR
O
Mirror signal output to the CPU (IC901)
21
DFCT
O
Defect signal output terminal
22
FOK
O
Focus OK signal output to the CPU (IC901)
23
PWMI
I
Not used (fixed at “L”)
24
LOCK
O
GFS is sampled by 460 Hz    “H” output when GFS is “H”
25
MDP
O
Spindle motor (M3) servo drive signal output to the SACD decoder (IC701)
26
SSTP
I
Detection signal input from limit  switch (S1)    The optical pick-up is inner position when “H”
27
FSTO
O
2/3 divider output terminal    Not used (open)
28
DVDD1
Power supply terminal (+3.3V) (digital system)
29
SFDR
O
Sled servo drive PWM signal (+) output to the BA5983FP (IC502)
30
SRDR
O
Sled servo drive PWM signal (–) output to the BA5983FP (IC502)
31
TFDR
O
Tracking servo drive PWM signal (+) output to the BA5983FP (IC502)
32
TRDR
O
Tracking servo drive PWM signal (–) output to the BA5983FP (IC502)
33
FFDR
O
Focus servo drive PWM signal (+) output to the BA5983FP (IC502)
34
FRDR
O
Focus servo drive PWM signal (–) output to the BA5983FP (IC502)
35
DVSS1
Ground terminal (digital system)
36
TEST
I
Input terminal for the test (fixed at “L”)
37
TES1
I
Input terminal for the test (fixed at “L”)
38
VC
I
Middle point voltage (+1.65V) input from the NJM3403AV (IC004)
39
FE
I
Focus error signal input from the CXD1881R (IC001)
40
SE
I
Sled error signal input from the CXD1881R (IC001)
41
TE
I
Tracking error signal input from the CXD1881R (IC001)
42
CE
I
Chip enable signal input terminal
43
RFDC
I
Pull in signal input from the CXD1881R (IC001)
44
ADIO
O
Output terminal for the A/D converter    Not used (open)
MAIN BOARD  IC509  CXD3008Q
 (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, DIGITAL FILTER, D/A CONVERTER)
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