Sony MDS-LSA1 Service Manual ▷ View online
57
IC101 LA5643 (MAIN BOARD)
12
11
10
13
1
2
3
4
8
7
6
5
9
- +
-
+
DELAY
RESET CIRCUIT
- +
- +
-
+
VREF1
VREF3
VREF2
DELA
Y
-
+
1
2
3
4
5
6
7
8
9
10
GND
MOTOR
DRIVE
NOISE
FILTER
CLAMP
FWD.IN
REV.IN
VCC 1
VCC 2
NOISE
FILTER
MOTOR
DRIVE
MOTOR
DRIVE
MOTOR
DRIVE
T.S.D
O.C.P
FWD/REV/STOP
CONTROL LOGIC
2
5
5k
+
–
27k
OVERCURRENT
LIMITTER
OVERHEAT
PROTECTION
REFERENCE
VOLTAGE
GND
ON/OFF
IN
REFERENCE
VOLTAGE
VOLTAGE
OUT
3
4
1
IC801 LB1641 (MAIN BOARD)
IC431 M5293L (MAIN BOARD)
IC602 TLC2932IPW (MAIN BOARD)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
PFD
1/2 DIVIDER
VCO
LOGIC
VDD
SELECT
VCO
OUT
OUT
FIN-A
FIN-B
PFD
OUT
LOGIC
GND
VCO
VDD
VDD
R BIAS
VCO
IN
VCO
GND
VCO
INHIBIT
PFD
INHIBIT
NC
58
IC656 TC74HC4053F (MAIN BOARD)
16
15 14
13
12
11
10
9
1
2
3
4
5
6
7
8
C
B
A
OX
IX
X-COM
Y-COM
VCC
GND
VEE
INH
OZ
Z-COM
IZ
OY
IY
C
OUT
IN
C
OUT
IN
C
OUT
IN
C
OUT
IN
C
OUT
IN
C
OUT
IN
LOGIC LEVEL CONVERTOR
IC101 SN74HC595ANSR (PANEL BOARD)
3R
C3
3S
1D
C1
R
3R
C3
3S
2S
2R
C2
R
3R
C3
3S
2S
2R
C2
R
3R
C3
3S
2S
2R
C2
R
3R
C3
3S
2S
2R
C2
R
3R
C3
3S
2S
2R
C3
3S
SRCLK
SRCLR
QH‘
DE
RCLK
3R
C3
3S
2S
2R
C2
R
3R
C3
3S
2S
2R
C2
R
10
9
11
12
13
SER
14
QA
15
VCC
16
1
QB
2
QC
3
QD
4
QE
5
QF
6
QG
7
QH
8
GND
IC652 TC74HC125AF (CLIP BOARD)
1
2
3
1A
1Y
1 OE
4
5
6
2A
2Y
2 OE
7
GND
10
9
8
3A
3Y
3 OE
13
12
11
4A
4Y
4 OE
14 VCC
IC653 TC74HC161AF (CLIP BOARD)
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
CK
A
B
C
D
ENABLE
P
QA
QB
QC
QD
ENABLE
T
RIPPLE
CARRY
OUTPUT
CLEAR
GND
LOAD
VCC
IC654 TC7W74F (CLIP BOARD)
6
CLR
7
PR
8
VCC
5
Q
R
S
Q
3
Q
2
D
4
GND
1
CK
Q
D
C
59
6-15. IC PIN FUNCTIONS
• IC101 CXA2523AR RF Amplifier (BD BOARD)
Pin No.
Pin Name
I/O
Function
I
J
VC
A to F
PD
APC
APCREF
GND
TEMPI
TEMPR
SWDT
SCLK
XLAT
XSTBY
F0CNT
VREF
EQADJ
3TADJ
Vcc
WBLADJ
TE
CSLED
SE
ADFM
ADIN
ADAGC
ADFG
AUX
FE
ABCD
BOTM
PEAK
RF
RFAGC
AGCI
COMPO
COMPP
ADDC
OPO
OPN
RFO
MORFI
MORFO
I
I
O
I
I
O
I
—
I
O
I
I
I
I
I
O
I/O
I/O
—
I/O
O
—
O
O
I
—
O
O
O
O
O
O
O
—
I
O
I
I/O
O
I
O
I
O
I-V converted RF signal I input
I-V converted RF signal J input
Middle point voltage (+1.5V) generation output
Signal input from the optical pick-up detector
Light amount monitor input
Laser APC output
Reference voltage input for setting laser power
Ground
Temperature sensor connection
Reference voltage output for the temperature sensor
Serial data input from the CXD2662R
Serial clock input from the CXD2662R
Latch signal input from the CXD2662R
“L”: Latch
Stand by signal input
“L”: Stand by
Center frequency control voltage input of BPF22, BPF3T, EQ from the CXD2662R
Reference voltage output (Not used)
Center frequency setting pin for the internal circuit EQ
Center frequency setting pin for the internal circuit BPF3T
+3V power supply
Center frequency setting pin for the internal circuit BPF22
Tracking error signal output to the CXD2662R
External capacitor connection pin for the sled error signal LPF
Sled error signal output to the CXD2662R
FM signal output of ADIP
ADIP signal comparator input
ADFM is connected with AC coupling
External capacitor connection pin for AGC of ADIP
ADIP duplex signal output to the CXD2662R
I
3
signal/temperature signal output to the CXD2662R
(Switching with a serial command)
Focus error signal output to the CXD2662R
Light amount signal output to the CXD2662R
RF/ABCD bottom hold signal output to the CXD2662R
RF/ABCD peak hold signal output to the CXD2662R
RF equalizer output to the CXD2662R
External capacitor connection pin for the RF AGC circuit
Input to the RF AGC circuit
The RF amplifier output is input with AC coupling
User comparator output (Not used)
User comparator input (Fixed at “L”)
External capacitor pin for cutting the low band of the ADIP amplifier
User operation amplifier output (Not used)
User operation amplifier inversion input (Fixed at “L”)
RF amplifier output
Groove RF signal is input with AC coupling
Groove RF signal output
1
2
3
4 to 9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
• Abbreviation
APC: Auto Power Control
AGC: Auto Gain Control
AGC: Auto Gain Control
60
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 to 34
35
36 to 40
41
42
43
44
45
46
47
• IC151 CXD2662R Digital Signal Processor, Digital Servo Signal Processor (BD BOARD)
Function
Pin No.
Pin Name
I/O
MNT0 (FOK)
MNT1 (SHCK)
MNT2 (XBUSY)
MNT3 (SLOC)
SWDT
SCLK
XLAT
SRDT
SENS
XRST
SQSY
DQSY
RECP
XINT
TX
OSCI
OSCO
XTSL
DIN0
DIN1
DOUT
DADTI
LRCKI
XBCKI
ADDT
DADT
LRCK
XBCK
FS256
DVDD
A03 to A00
A10
A04 to A08
A11
DVSS
XOE
XCAS
A09
XRAS
XWE
O
O
O
O
I
I (S)
I (S)
O (3)
O (3)
I (S)
O
O
I
O
I
I
O
I
I
I
O
I
I
I
I
O
O
O
O
—
O
O
O
O
—
O
O
O
O
O
FOK signal output to the system control (monitor output)
“H” is output when focus is on
Track jump detection signal output to the system control (monitor output)
Monitor 2 output to the system control (monitor output)
Monitor 3 output to the system control (monitor output)
Writing data signal input from the system control
Serial clock signal input from the system control
Serial latch signal input from the system control
Reading data signal output to the system control
Internal status (SENSE) output to the system control
Reset signal input from the system control
“L”: Reset
Subcode Q sync (SCOR) output to the system control
“L” is output every 13.3 msec. Almost all, “H” is output
Digital In U-bit CD format or MD format subcode Q sync (SCOR) output to the system
control
Laser power switching input from the system control
“H”: Recording, “L”: Playback
Interrupt status output to the system control
Recording data output enable input from the system control
System clock input (512Fs=22.5792 MHz)
System clock output (512Fs=22.5792 MHz) (Not used)
System clock frequency setting
“L”: 45.1584 MHz, “H”: 22.5792 MHz (Fixed at “H”)
Digital audio input (Optical input)
Digital audio input (Optical input)
Digital audio output (Optical output)
Serial data input
LR clock input
“H” : Lch, “L” : R ch
Serial data clock input
Data input from the A/D converter
Data output to the D/A converter
LR clock output for the A/D and D/A converter (44.1 kHz)
Bit clock output to the A/D and D/A converter (2.8224 MHz)
11.2896 MHz clock output (Not used)
+3V power supply (Digital)
DRAM address output
DRAM address output (Not used)
DRAM address output
DRAM address output (Not used)
Ground (Digital)
Output enable output for DRAM
CAS signal output for DRAM
Address output for DRAM
RAS signal output for DRAM
Write enable signal output for DRAM
* I (S) stands for Schmidt input, I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O
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