DOWNLOAD Sony HCD-FC7 (serv.man2) Service Manual ↓ Size: 12.91 MB | Pages: 127 in PDF or view online for FREE

Model
HCD-FC7 (serv.man2)
Pages
127
Size
12.91 MB
Type
PDF
Document
Service Manual
Brand
Device
Audio
File
hcd-fc7-sm2.pdf
Date
PREV: Sony HCD-FC7 Service Manual

Sony HCD-FC7 (serv.man2) Service Manual ▷ View online

81
HCD-FC7
– VIDEO BOARD –
IC206   MM1510XNRE
4
1
OUT2
2
OUT1
3
VCC
IN
5 GND
6 SW
BIAS
CLAMP
DRIVER
IC207   NJM2235V (TE2)
1
2
3
4
6
5
7
8
IN 1
SW 1
SW 2
VDD
VIN 3
OUT
GND
IN 2
BIAS
BUFFER
IC208   MM1568AJBE
4dB
4dB
VCC2
75
Ω
DRIVER
LPF
LPF
LPF
75
Ω
DRIVER
2dB
4dB
2dB
75
Ω
DRIVER
2dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
4dB
2dB
CIN
2
VIN
4
MUTE1
3
YC MIX
5
YIN
6
BIAS
7
GND1
8
NC
9
GND1 10
NC 11
CYIN 12
CLP 13
CbIN 14
CrIN 16
GND2 17
MUTE2 15
VCC1
1
34
CrSAG
18
CrOUT
19
CbSAG
21
GND2
20
CbOUT
22
CYSAG
24
GND2
23
GND2
26
CYOUT
25
YSAG
27
YOUT
28
VSAG
30
GND2
29
GND2
32
VOUT
31
COUT
33
+
BIAS
BIAS
BIAS
BIAS
BIAS
CLAMP
CLAMP
CLAMP
LPF
LPF
LPF
82
HCD-FC7
7-33. IC PIN FUNCTION DESCRIPTION
• DVD BOARD IC206 ZIVA5X-C1F (DVD SYSTEM PROCESSOR)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
I/O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I
I/O
I/O
I/O
I/O
—
—
—
—
O
O
O
O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
Pin Name
VDDP
HA1
HD15
HD14
HD13
HD12
HD11
HD10
HD9
HD8
HD7
VDDP
GNDP
HD6
HD5
HD4
HD3
HD2
HD1
VDDP
GNDP
HD0
HDTACK
HIRQ0
WEH.UDS
WEL.LDS
HREAD
GPIO0
GND
VDD
GND25
VDD25
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
GND25
VDD25
MA10
MA11
BA1
BA0
MCS0
MCS1
Description
Power supply terminal (+3.3V) (I/O signal)
Address bus
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Power supply terminal (+3.3V) (I/O signal)
Ground terminal (I/O signal)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Data bus (address signal multiplexed)
Power supply terminal (+3.3V) (I/O signal)
Ground terminal (I/O signal)
Data bus (address signal multiplexed)
Acknowledge signal input/output for host data transfer (not used)
Interrupt signal input for Medusa (not used)
Host upper data strobe signal output
Host lower data strobe signal output (not used)
Read/write strobe signal output
Jig detection port (pull-up)
Ground terminal (inside core)
Power supply terminal (+1.8V) (inside core)
Ground terminal (SDRAM I/O signal)
Power supply terminal (+3.3V) (SDRAM I/O signal)
SDRAM address bus
SDRAM address bus
SDRAM address bus
SDRAM address bus
SDRAM address bus
SDRAM address bus
SDRAM address bus
SDRAM address bus
SDRAM address bus
SDRAM address bus
Ground terminal (SDRAM I/O signal)
Power supply terminal (+3.3V) (SDRAM I/O signal)
SDRAM address bus
SDRAM address bus
SDRAM bank select 1 signal output
SDRAM bank select 0 signal output
SDRAM chip select 0 signal output
Not used
83
HCD-FC7
Pin No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
I/O
O
O
O
—
—
O
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
I/O
I/O
—
—
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
O
—
I/O
I/O
Pin Name
MRAS
MCAS
MWE
GND25
VDD25
MCLK
MD0
MD1
MD2
MD3
GND25
MDQM0
VDD25
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
GND25
MDQM1
VDD25
MD12
MD13
MD14
MD15
GND
VDD
MD16
MD17
MD18
MD19
GND25
MDQM2
VDD25
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
GND25
MDQM3
VDD25
MD28
MD29
Description
SDRAM row address strobe signal output
SDRAM column address strobe signal output
SDRAM write enable signal output (“H” : read, “L” : write)
Ground terminal (SDRAM I/O signal)
Power supply terminal (+3.3V) (SDRAM I/O signal)
SDRAM Clock output
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 0 output
Power supply terminal (+3.3V) (SDRAM I/O signal)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 1 output
Power supply terminal (+3.3V) (SDRAM I/O signal)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (inside core)
Power supply terminal (+1.8V) (inside core)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 2 output
Power supply terminal (+3.3V) (SDRAM I/O signal)
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Byte read /write mask signal 3 output
Power supply terminal (+3.3V) (SDRAM I/O signal)
SDRAM data
SDRAM data
84
HCD-FC7
Pin No.
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
I/O
I/O
I/O
—
—
I/O
—
O
O
—
—
—
—
—
—
—
I
—
—
O
—
—
O
—
—
O
—
—
O
—
—
O
—
—
—
I
—
—
O
I
—
—
—
—
—
—
—
O
O
O
—
Pin Name
MD30
MD31
GND25
VDD25
VCLK
I2C_CTRL
VS
I/P SW
GPIO1 (5)
GPIO1 (4)
VDDP
GNDP
GPIO1 (3)
GPIO1 (2)
GPIO1 (1)
HIRQ2_
VDAC_4B
VDAC_VDD4
VDAC_4
VDAC_3B
VDAC_VDD3
VDAC_3
VDAC_2B
VDAC_VDD2
VDAC_2
VDAC_1B
VDAC_VDD1
VDAC_1
VDAC_0B
VDAC_VDD0
VDAC_0
VDAC_DVSS
VDAC_DVDD
VDAC_REFVDD
VDAC_REF
VDAC_REFVSS
XVSS
XOUT
XIN
XVDD
AVSS2
AVDD2
AVDD1
AVSS1
VDD
GND
XCK
LRCK
BCK
GPIO4 (1)
Description
SDRAM data
SDRAM data
Ground terminal (SDRAM I/O signal)
Power supply terminal (+3.3V) (SDRAM I/O signal)
System clock (not used)
Not used
S1 signal output
Progressive/interlace switch signal output (not used)
Not used
Not used
Power supply terminal (+3.3V) (I/O signal)
Ground terminal (I/O signal)
Not used
Not used
Not used
Busy signal input from the EEPROM (IC203)
Video DAC bias bit 4 (connected to the ground)
Power supply terminal (+3.3V) (Video DAC 4)
VDAC output 4
Video DAC bias bit 3 (connected to the ground)
Power supply terminal (+3.3V) (Video DAC 3)
VDAC output 3
Video DAC bias bit 2 (connected to the ground)
Power supply terminal (+3.3V) (Video DAC 2)
VDAC output 2
Video DAC bias bit 1 (connected to the ground)
Power supply terminal (+3.3V) (Video DAC 1)
VDAC output 1
Video DAC bias bit 0 (connected to the ground)
Power supply terminal (+3.3V) (Video DAC 0)
VDAC output 0
Ground terminal (Video DAC digital system)
Power supply terminal (+3.3V) (Video DAC digital system)
Power supply terminal (Video DAC reference)
Reference voltage input terminal(for Video DAC)
Ground terminal (Video DAC reference)
Ground terminal (crystal oscillator)
Crystal oscillation signal output
Crystal oscillation signal input
Power supply terminal (crystal oscillator)
Ground terminal (analog PLL)
Power supply terminal (+3.3V) (analog PLL)
Power supply terminal (+3.3V) (analog PLL)
Ground terminal (analog PLL)
Power supply terminal (+1.8V) (inside core)
Ground terminal (inside core)
Audio system clock output (not used)
LRCK signal output for audio (not used)
BCK signal output for audio (not used)
Not used (pull-up)
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