Sony DHC-FLX5D / DHC-FLX7D / HCD-FLX5D / HCD-FLX7D Service Manual ▷ View online
97
HCD-FLX5D/FLX7D
Pin No.
Pin Name
I/O
Description
188
DRVRDY
I
Ready signal input from the mechanism controller
189
VNW
—
Power supply terminal (+5V)
190
ALE
O
Latch enable signal output to the bus interface
191
RST_SPC
O
Reset signal output to the mechanism controller
192 to 194
HCS3 to HCS1
O
Chip select signal output terminal Not used
195
HCS0
O
Chip select signal output to the program ROM
196
VDDP
—
Power supply terminal (+3.3V)
197
TRST
O
Reset signal output to the DSD decoder (FLX7D only)
198
TDO
O
Data output to the DSD decoder (FLX7D only)
199
TDI
I
Data input terminal Not used
200
TMS
O
Mode selection signal output to the DSD decoder (FLX7D only)
201
TCK
O
Clock signal output to the DSD decoder (FLX7D only)
202
RESET
I
Reset signal input from the system controller “L”: reset
203
BUS CLK
O
Not used
204
GND
—
Ground terminal
205
VDD
—
Power supply terminal (+1.8V)
206, 207
HA3, HA2
O
Address signal output to the program ROM and bus interface
208
GNDP
—
Ground terminal
98
HCD-FLX5D/FLX7D
MB BOARD IC509 CXD3068Q (DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
DVDD0
—
Power supply terminal (+3.3V) (digital system)
2
XRST
I
Reset signal input from the mechanism controller “L”: reset
3
MUTE
I
Muting on/off control signal input from the mechanism controller “H”: muting on
4
DATA
I
Serial data input from the mechanism controller
5
XLAT
I
Serial data latch pulse signal input from the mechanism controller
6
CLOK
I
Serial data transfer clock signal input from the mechanism controller
7
SENS
O
Internal status (SENSE) signal output to the mechanism controller
8
SCLK
I
SENSE serial data reading clock signal input from the mechanism controller
9
ATSK
I/O
Input/output terminal for anti-shock Not used
10
WFCK
O
Write frame clock signal output to the DVD decoder
11
RFCK
O
RFCK signal output terminal Not used
12
XPCK
O
XPCK signal output terminal Not used
13
GFS
O
Guard frame sync signal output to the mechanism controller
14
C2PO
O
C2 pointer signal output to the DVD decoder
15
SCOR
O
Subcode sync (S0+S1) detection signal output to the DVD decoder and mechanism controller
16
C4M
O
4.2336 MHz clock signal output terminal Not used
17
WDCK
O
Guard subcode sync (S0+S1) detection signal output to the DVD decoder
18
DVSS0
—
Ground terminal (digital system)
19
COUT
O
Numbers of track counted signal output to the mechanism controller
20
MIRR
O
Mirror signal output to the mechanism controller
21
DFCT
I/O
Defect signal input/output terminal Not used
22
FOK
O
Focus OK signal output to the mechanism controller
23
PWMI
I
Spindle motor external control signal input terminal Not used
24
LOCK
O
GFS is sampled by 460 Hz “H” output when GFS is “H”
25
MDP
O
Spindle motor servo drive signal output to the DVD decoder
26
SSTP
I
Detection signal input from limit in switch The optical pick-up is inner position when “H”
27
FSTO
O
2/3 divider output terminal Not used
28
DVDD1
—
Power supply terminal (+3.3V) (digital system)
29
SFDR
O
Sled servo drive PWM signal (+) output
30
SRDR
O
Sled servo drive PWM signal (–) output
31
TFDR
O
Tracking servo drive PWM signal (+) output
32
TRDR
O
Tracking servo drive PWM signal (–) output
33
FFDR
O
Focus servo drive PWM signal (+) output
34
FRDR
O
Focus servo drive PWM signal (–) output
35
DVSS1
—
Ground terminal (digital system)
36
TEST
I
Input terminal for the test
37
TES1
I
Input terminal for the test
38
VC
I
Middle point voltage (+1.65V) input terminal
39
FE
I
Focus error signal input from the DVD/CD RF amplifier
40
SE
I
Sled error signal input from the DVD/CD RF amplifier
41
TE
I
Tracking error signal input from the DVD/CD RF amplifier
42
CE
I
Middle point servo analog signal input
43
RFDC
I
RF signal input from the DVD/CD RF amplifier
44
ADIO
O
Output terminal for the test Not used
99
HCD-FLX5D/FLX7D
Pin No.
Pin Name
I/O
Description
45
AVSS0
—
Ground terminal (analog system)
46
IGEN
I
Stabilized current input for operational amplifiers
47
AVDD0
—
Power supply terminal (+3.3V) (analog system)
48
ASYO
O
EFM full-swing output terminal
49
ASYI
I
Asymmetry comparator voltage input terminal
50
RFAC
I
EFM signal input from the DVD/CD RF amplifier
51
AVSS1
—
Ground terminal (analog system)
52
CLTV
I
Internal VCO control voltage input terminal
53
FILO
O
Filter output for master PLL
54
FILI
I
Filter input for master PLL
55
PCO
O
Charge pump output for master PLL
56
AVDD1
—
Power supply terminal (+3.3V) (analog system)
57
BIAS
I
Asymmetry circuit constant current input terminal
58
VCTL
I
VCO control voltage input terminal for the wideband EFM PLL Not used
59
V16M
O
VCO oscillation output terminal for the wideband EFM PLL Not used
60
VPCO
O
Charge pump output terminal for the wideband EFM PLL Not used
61
DVDD2
—
Power supply terminal (+3.3V) (digital system)
62
ASYE
I
Asymmetry circuit on/off control signal input terminal “L”: off, “H”: on Not used
63
MD2
I
Digital out on/off control signal input from the mechanism controller
“L”: digital out off, “H”: digital out on
“L”: digital out off, “H”: digital out on
64
DOUT
O
Digital audio signal output to the digital audio interface receiver
65
LRCK
O
L/R sampling clock signal (44.1 kHz) output to the DVD decoder
66
PCMD
O
Serial data output to the DVD decoder
67
BCLK
O
Bit clock signal (2.8224 MHz) output to the DVD decoder
68
EMPH
O
“L” is output when playback disc is emphasis off
“H” is output when playback disc is emphasis on Not used
“H” is output when playback disc is emphasis on Not used
69
XTSL
I
Input terminal for the system clock frequency setting
“L”: 16.9344 MHz, “H”: 33.8688MHz Fixed at “H” in this set
“L”: 16.9344 MHz, “H”: 33.8688MHz Fixed at “H” in this set
70
DVSS2
—
Ground terminal (digital system)
71
XTAI
I
System clock input terminal (33.8688 MHz)
72
XTAO
O
System clock output terminal (33.8688 MHz) Not used
73
SOUT
O
Serial data output terminal Not used
74
SOCK
O
Serial data reading clock signal output terminal Not used
75
XOLT
O
Serial data latch pulse signal output terminal Not used
76
SQSO
O
Subcode Q data output to the mechanism controller
77
SQCK
I
Subcode Q data reading clock signal input from the mechanism controller
78
SCSY
I
Input terminal for resynchronism of guard subcode sync (S0+S1) Not used
79
SBSO
O
Subcode serial data output to the DVD decoder
80
EXCK
I
Subcode serial data reading clock signal input to the DVD decoder
100
HCD-FLX5D/FLX7D
MB BOARD IC701 TMC57929PGF-RDP (DVD DECODER)
Pin No.
Pin Name
I/O
Description
1, 2
D5, D6
I/O
Two-way data bus with the mechanism controller
3
VSS
—
Ground terminal (digital system)
4
D7
I/O
Two-way data bus with the mechanism controller
5
A0
I
Address signal input from the mechanism controller
6
VDD
—
Power supply terminal (+3.3V) (digital system)
7
A1
I
Address signal input from the mechanism controller
8
VDD5V
—
Power supply terminal (+5V)
9 to 14
A2 to A7
I
Address signal input from the mechanism controller
15
VSS
—
Ground terminal (digital system)
16
XWAIT
O
Wait signal output terminal Not used
17
XRD
I
Read strobe signal input from the mechanism controller
18
XWR
I
Write strobe signal input from the mechanism controller
19
XCS
I
Chip select signal input from the mechanism controller
20, 21
XINT0, XINT1
O
Interrupt signal output to the mechanism controller
22
VDD
—
Power supply terminal (+3.3V) (digital system)
23
XHRS
I
Not used
24
HDB7
O
Stream data signal output to the DSD decoder and DVD system processor
25
VSS
—
Ground terminal (digital system)
26
HDB8
O
Error flag signal output to the DSD decoder and DVD system processor
27
HDB6
O
Stream data signal output to the DSD decoder and DVD system processor
28
VDDS
—
Power supply terminal (+5V) (digital system)
29
HDB9
O
Not used
30
HDB5
O
Stream data signal output to the DSD decoder and DVD system processor
31
HDBA
O
Not used
32
HDB4
O
Stream data signal output to the DSD decoder and DVD system processor
33
VSS
—
Ground terminal (digital system)
34
HDBB
O
Not used
35
HDB3
O
Stream data signal output to the DSD decoder and DVD system processor
36
VDD
—
Power supply terminal (+3.3V) (digital system)
37
HDBC
O
Not used
38
VDDS
—
Power supply terminal (+5V) (digital system)
39
HDB2
O
Stream data signal output to the DSD decoder and DVD system processor
40
HDBD
O
Not used
41
HDB1
O
Stream data signal output to the DSD decoder and DVD system processor
42
VSS
—
Ground terminal (digital system)
43
HDBE
O
Not used
44
HDB0
O
Stream data signal output to the DSD decoder and DVD system processor
45
HDBF
O
Not used
46
XSAK
O
Serial data effect flag signal output to the DSD decoder and DVD system processor
47
VDDS
—
Power supply terminal (+5V) (digital system)
48
XDCK
O
Serial data transfer clock signal output to the DSD decoder and DVD system processor
49
XSHD
O
Header flag signal output to the DSD decoder (FLX7D only)
50
VDD
—
Power supply terminal (+3.3V) (digital system)
51
REDY
O
Not used
52
VSS
—
Ground terminal (digital system)
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