Sony DHC-FLX5D / DHC-FLX7D / HCD-FLX5D / HCD-FLX7D Service Manual ▷ View online
93
HCD-FLX5D/FLX7D
– VIDEO Board –
IC701
MM1568AJBE
4dB
4dB
VCC2
75
Ω
DRIVER
LPF
LPF
LPF
75
Ω
DRIVER
2dB
4dB
2dB
75
Ω
DRIVER
2dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
2dB
4dB
75
Ω
DRIVER
4dB
2dB
CIN
2
VIN
4
MUTE1
3
YC MIX
5
YIN
6
BIAS
7
GND1
8
NC
9
GND1 10
NC 11
CYIN 12
CLP 13
CbIN 14
CrIN 16
GND2 17
MUTE2 15
VCC1
1
34
CrSAG
18
CrOUT
19
CbSAG
21
GND2
20
CbOUT
22
CYSAG
24
GND2
23
GND2
26
CYOUT
25
YSAG
27
YOUT
28
VSAG
30
GND2
29
GND2
32
VOUT
31
COUT
33
+
BIAS
BIAS
BIAS
BIAS
BIAS
CLAMP
CLAMP
CLAMP
LPF
LPF
LPF
94
HCD-FLX5D/FLX7D
MB BOARD IC206 ZIVA5X-C2F (DVD SYSTEM PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
VDDP
—
Power supply terminal (+3.3V)
2
HA1
O
Address signal output to the program ROM and bus interface
3 to 11
HAD15 to HAD7
I/O
Two-way data bus with the program ROM and bus interface
12
VDDP
—
Power supply terminal (+3.3V)
13
GNDP
—
Ground terminal
14 to 19
HAD6 to HAD1
I/O
Two-way data bus with the program ROM and bus interface
20
VDDP
—
Power supply terminal (+3.3V)
21
GNDP
—
Ground terminal
22
HAD0
I/O
Two-way data bus with the program ROM and bus interface
23
HDTACK
I
Acknowledge signal input terminal for host data transfer Not used
24
HIRQ0
I
Interrupt signal input terminal Not used
25
WEH.UDS
O
Write enable host upper data strobe signal output to the program ROM
26
WEL.LDS
O
Write enable host lower data strobe signal output terminal Not used
27
HREAD
O
Output enable signal output to the program ROM
28
GPIO0 (1)
I
Check jig detection signal input terminal
29
GND
—
Ground terminal
30
VDD
—
Power supply terminal (+1.8V)
31
GND25
—
Ground terminal
32
VDD25
—
Power supply terminal (+3.3V)
33 to 42
MA9 to MA0
O
Address signal output to the SD-RAM
43
GND25
—
Ground terminal
44
VDD25
—
Power supply terminal (+3.3V)
45, 46
MA10, MA11
O
Address signal output to the SD-RAM
47, 48
BA1, BA0
O
Bank select signal output to the SD-RAM
49
MCS0
O
Chip select signal output to the SD-RAM
50
MCS1
O
Chip select signal output terminal Not used
51
MRAS
O
Row address strobe signal output to the SD-RAM
52
MCAS
O
Column address strobe signal output to the SD-RAM
53
MWE
O
Write enable signal output to the SD-RAM
54
GND25
—
Ground terminal
55
VDD25
—
Power supply terminal (+3.3V)
56
MCLK
O
Clock signal output to the SD-RAM
57 to 60
MD0 to MD3
I/O
Two-way data bus with the SD-RAM
61
GND25
—
Ground terminal
62
MDQM0
O
Write mask signal output to the SD-RAM
63
VDD25
—
Power supply terminal (+3.3V)
64 to 71
MD4 to MD11
I/O
Two-way data bus with the SD-RAM
72
GND25
—
Ground terminal
73
MDQM1
O
Write mask signal output to the SD-RAM
74
VDD25
—
Power supply terminal (+3.3V)
75 to 78
MD12 to MD15
I/O
Two-way data bus with the SD-RAM
79
GND
—
Ground terminal
80
VDD
—
Power supply terminal (+1.8V)
•
IC Pin Function Description
95
HCD-FLX5D/FLX7D
Pin No.
Pin Name
I/O
Description
81 to 84
MD16 to MD19
I/O
Two-way data bus with the SD-RAM
85
GND25
—
Ground terminal
86
MDQM2
O
Write mask signal output to the SD-RAM
87
VDD25
—
Power supply terminal (+3.3V)
88 to 95
MD20 to MD27
I/O
Two-way data bus with the SD-RAM
96
GND25
—
Ground terminal
97
MDQM3
O
Write mask signal output to the SD-RAM
98
VDD25
—
Power supply terminal (+3.3V)
99 to 102 MD28 to MD31
I/O
Two-way data bus with the SD-RAM
103
GND25
—
Ground terminal
104
VDD25
—
Power supply terminal (+3.3V)
105
VCLK
O
Not used
106
I2C_CTRL
O
Not used
107
VS
O
Wide control signal output terminal
108
I/P SW
O
Interlace/progressive selection signal output terminal Not used
109
GPIO1 (5)
O
Not used
110
GPIO1 (4)
O
Not used
111
VDDP
—
Power supply terminal (+3.3V)
112
GNDP
—
Ground terminal
113
GPIO1 (3)
O
Not used
114
GPIO1 (2)
O
Not used
115
GPIO1 (1)
O
Not used
116
HIRQ2
I
Busy signal input from the EEPROM
117
VDAC_4B
—
Ground terminal
118
VDAC_VDD4
—
Power supply terminal (+3.3V)
119
VDAC_4
O
Component video signal output to the video amplifier
120
VDAC_3B
—
Ground terminal
121
VDAC_VDD3
—
Power supply terminal (+3.3V)
122
VDAC_3
O
Component video signal output to the video amplifier
123
VDAC_2B
—
Ground terminal
124
VDAC_VDD2
—
Power supply terminal (+3.3V)
125
VDAC_2
O
Y (luminance) video signal output to the video amplifier
126
VDAC_1B
—
Ground terminal
127
VDAC_VDD1
—
Power supply terminal (+3.3V)
128
VDAC_1
O
C (chroma) video signal output to the video amplifier
129
VDAC_0B
—
Ground terminal
130
VDAC_VDD0
—
Power supply terminal (+3.3V)
131
VDAC_0
O
Video signal output to the video amplifier
132
VDAC_DVSS
—
Ground terminal
133
VDAC_DVDD
—
Power supply terminal (+3.3V)
134
VDAC_REFVDD
—
Power supply terminal
135
VDAC_REF
I
Power supply terminal (+3.3V)
136
VDAC_REFVSS
—
Ground terminal
137
XVSS
—
Ground terminal
138
XOUT
O
Clock signal output terminal Not used
96
HCD-FLX5D/FLX7D
Pin No.
Pin Name
I/O
Description
139
XIN
I
System clock signal (33.8688 MHz) input from the clock generator
140
XVDD
—
Power supply terminal
141
AVSS2
—
Ground terminal
142
AVDD2
—
Power supply terminal (+3.3V)
143
AVDD1
—
Power supply terminal (+3.3V)
144
AVSS1
—
Ground terminal
145
VDD
—
Power supply terminal (+1.8V)
146
GND
—
Ground terminal
147
XCK
O
Audio system clock output terminal Not used
148
LRCK
O
L/R sampling clock signal (44.1 kHz) output terminal Not used
149
BCK
O
Bit clock signal (2.8224 MHz) l output terminal Not used
150
GPIO4 (1)
O
Not used
151
GPIO4 (2)
O
Not used
152
VDDP
—
Power supply terminal (+3.3V)
153
GNDP
—
Ground terminal
154
GPIO4 (3)
O
Not used
155
GPIO4 (4)
O
Not used
156
IEC958
O
SPDIF signal output terminal
157
CS_EEPROM
O
Chip select signal output to the EEPROM
158
WC_EEPROM
O
Write control signal output to the EEPROM
159
CS_SPC
O
Not used
160
I2C_CL
I/O
Two-way I2C clock bus with the mechanism controller and system controller
161
I2C_DA
I/O
Two-way I2C data bus with the mechanism controller and system controller
162
RTSI
I
Not used
163
RXD1
I
Serial data input terminal for check jig
164
TXD1
O
Serial data output terminal for check jig
165
CTSI
I
Not used
166
GNDP
—
Ground terminal
167
VDDP
—
Power supply terminal (+3.3V)
168 to 171
SDDATA7 to
SDDATA4
I
Stream data signal input from the DVD decoder
172
GND
—
Ground terminal
173
VDD
—
Power supply terminal (+1.8V)
174 to 177
SDDATA3 to
SDDATA0
I
Stream data signal input from the DVD decoder
178
SDREQ
O
Serial data request signal output to the DVD decoder
179
SDEN
I
Serial data enable signal input from the DVD decoder
180
GNDP
—
Ground terminal
181
VDDP
—
Power supply terminal (+3.3V)
182
SDERROR
I
Serial data error signal input from the DVD decoder
183
SDCLK
I
Serial data clock signal input from the DVD decoder
184
HIRQ1
I
Interrupt request signal input from the mechanism controller
185
DRVCLK
I
Serial data transfer clock signal input from the mechanism controller
186
DRVTX
I
Serial data input from the EEPROM and mechanism controller
187
DRVRX
O
Serial data output to the EEPROM and mechanism controller
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