Sony DAV-FX80 / HCD-FX80 Service Manual ▷ View online
77
HCD-FX80
Pin No.
Pin Name
I/O
Description
113
DQMO
O
DQM0 signal output to SD-RAM (IC104)
114
DQS0
I
DQM signal input
115
RD7
I
Data bus 7 from SD-RAM (IC104)
116
DVSS
—
Terminal Ground
117, 118
RD 6, 5
I
Data bus 6, 5 from SD-RAM (IC104)
119
DVSS
—
Terminal Ground
120, 121
RD 4, 3
I
Data bus 4, 3 from SD-RAM (IC104)
122
DVDD18
—
Power Supply (+1.8V)
123 to 125
RD 2 to 0
I
Data bus 2 to 0 from SD-RAM (IC104)
126
RD15
I
Data bus 15 from SD-RAM (IC104)
127
DVDD3
—
Power Supply (+3.3V)
128
RD 14
I
Data bus 14 from SD-RAM (IC104)
129 to 133
RD 13 to 9
I
Data bus 13 to 9 from SD-RAM (IC104)
134
DVSS
—
Terminal Ground
135
RD8
I
Data bus 8 from SD-RAM (IC104)
136
GPI0
—
Not Used
137
DQM1
O
DQM1 signal output to SD-RAM (IC104)
138
REW
O
WE signal output to SD-RAM (IC104)
139
CAS
O
CAS signal output to SD-RAM (IC104)
140
RAS
O
RAS signal output to SD-RAM (IC104)
141
DVDD3
—
Power Supply (+3.3V)
142
RCS
O
RCS signal output to SD-RAM (IC206)
143
BAO
O
BAO signal output to SD-RAM (IC206)
144
DVSS
—
Terminal Ground
145
BA1
O
BA1 signal output to SD-RAM (IC104)
146
RA10
O
Address bus 10 output to SD-RAM (IC104)
147
RA0
O
Address bus 0 output to SD-RAM (IC104)
148
DVSS
—
Terminal Ground
149 to 151
RA 1 to 3
O
Address bus 1 to 3 output to SD-RAM (IC104)
152
DVDD18
—
Power Supply (+1.8V)
153
RVREF
I
Reference voltage (not used)
154
RCLKB
I
Dram clock (not used)
155
DVDD3
—
Power Supply (+3.3V)
156
RCLK
O
CLK signal output to SD-RAM (IC104)
157
CLE
O
CLE signal output to SD-RAM (IC104)
158 to 160
RA 11, 9, 8
O
Address bus 11, 9, 8 output to SD-RAM (IC104)
161
DVSS
—
Terminal Ground
162
RA7
O
Address bus 7 output to SD-RAM (IC104)
163
DVSS
—
Terminal Ground
164 to 166
RA 6 to 4
O
Address bus 6 to 4 output to SD-RAM (IC104)
167
DVDD3
—
Power Supply (+3.3V)
168
DISC/X
—
Not Used
169
RGB
—
Not Used
170
XSMRST
O
Reset signal output
171
WODE
O
SI signal output to VIDEO AMP (IC201)
172
NT
—
Not Used
173
DVDD18
—
Power Supply (+1.8V)
174
EUR
—
Not Used
175
DVSS
—
Terminal Ground
78
HCD-FX80
Pin No.
Pin Name
I/O
Description
176
LIMSW
O
LIMSW signal output to Optical pick-up
177
OCSW
I
SEN signal input from System Controller (IC509)
178
VCLK
O
System clock output
179
CKSW
—
Not Used
180
IO3
O
Reset signal output to VIDEO DAC
181
TSDM
O
TSDM signal output to Motor driver (IC201)
182
DVDD3
—
Power Supply (+3.3V)
183
MUTE
O
MUTE signal output to Motor driver (IC201)
184
MUTE123
O
MUTE signal output to Moter driver (IC201)
185
REW
—
Not Used
186
FWD
—
Not Used
187
MSW
O
Volume control signal output to Optical pick-up
188
DSEL
O
Select signal output (not used)
189
DAVCC
—
Power Supply (+3.3V)
190
VREF
I
Bandgap reference voltage (not used)
191
FS
O
Full scale adjustment (pull down)
192
YUV0
O
LSB data output
193
DVSS
—
Terminal Ground
194
YUV1
O
Y signal output to VIDEO AMP (IC201)
195
DAVDD
—
Power Supply (+3.3V)
196
YUV2
O
CHROMA signal output to VIDEO AMP (IC201)
197
DVSS
—
Terminal Ground
198
YUV3
O
VIDEO signal output to VIDEO AMP (IC201)
199
DAVDD
—
Power Supply (+3.3V)
200
YUV4
O
G signal output to VIDEO AMP (IC201)
201
DVSS
—
Terminal Ground
202
YUV5
O
B signal output to VIDEO AMP (IC201)
203
YUV6
O
R signal output to VIDEO AMP (IC201)
204
DVDD3
—
Power Supply (+3.3V)
205
MIC/VSYNC
O
Active low horizontal sync output
206
VOICE/YUV7
O
MSB data output
207
KRMOB/HSYNC
O
Active low horizontal sync output
208
SMSCK
O
SMS clock output
209
SPDATA/SMSDI
I
Audio data of SPDIF input
210
SMSDO
O
SMS DATA output
211
XSMCS
O
SMS CS output
212
DVDD3
—
Power Supply (+3.3V)
213
ALRCK
O
Audio L/R channel clock
214
ABCK
O
Audio bit clock
215
ACLK
O
Audio DAC master clock
216
DVSS
—
Terminal Ground
217
ASDATA0
O
Audio serial data
218
ASDATA1
O
Audio serial data
219
ASDATA2
O
Audio serial data
220
XRST
O
Reset signal output to VIDEO DAC
221
DVDD18
—
Power Supply (+1.8V)
222
ASDATA4
O
Audio serial data
223
DVSS
—
Terminal Ground
224
DWIDE
—
Not Used
79
HCD-FX80
Pin No.
Pin Name
I/O
Description
225
SDPIF
O
SPDIF output
226
RFGND18
—
Terminal Ground
227
RFVDD18
—
Power Supply (+1.8V)
228
ZTALO
O
Oscillator output signal
229
ZTALI
I
Oscillator input signal
230
JITFO
O
RF jitter meter output
231
JITFN
I
Negative input of operation amplifier for RF jigger meter
232
PLLVSS
—
Terminal Ground
233
IDAC
—
Not Used
234
PLLVDD3
—
Power Supply (+3.3V)
235
LPFON
O
Negative output of loop filter amplifier
236
LPFIP
I
Positive input of loop filter amplifier
237
LPFIN
I
Negative input of loop filter amplifier
238
LPFOP
O
Positive output of loop filter amplifier
239
VDD3
I
Power Supply (+3.3V)
240
VCM
I
SACD-Common mode Reference
241
VSS
—
Terminal Ground
242
VREEP
I
SACD-TOP Reference
243
VREEN
I
SACD-Bottom Reference
244
RFVDD3
—
Power Supply (+3.3V)
245
RFRPDC
I
RFRP signal input
246
RFRPAC
I
RFRP signal input
247
HRFZC
I
High frequency RF ripple zero crossing
248
CRTPLP
O
Defect level filter capacitor connecting
249
RFGND
—
Terminal Ground
250
CEQP
O
EQ offset loop capacitance (not used)
251
CEQN
O
EQ offset loop capacitance (not used)
252
OSP
O
RF offset cancellation capacitor connecting
253
OSN
I
RF offset cancellation capacitor connecting
254
RFGC
O
RF offset loop capacitor connecting for DVD-ROM
255
IREF
I
Current reference input
256
AVDD3
—
Power Supply (+3.3V)
80
HCD-FX80
MIB01 BOARD IC503 CXD9837R (PROGRESSIVE SCAN CONVERTER)
Pin No.
Pin Name
I/O
Desciption
1
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
2
CLKI
I
System clock input (27MHz)
3
TEST7
I
Test purpose only (must be connected to ground)
4
PLL_EN
I
PLL eneble
5 to 14
PI0 to PI9
I
ITU-R BT.656/601 input
15
NHSI
I
Active low horizontal sync input
16
NVSI
I
Active low vertical sync input
17
OVSS
—
Digital ground for Pad Ring
18
THMD
I
Through mode setting terminal.
19
CVSS
—
Digital ground for core
20
NVSO
O
Active low vertical sync output
21
NHSO
O
Active low horizontal sync output
22 to 25
PO9 to PO6
O
ITU-R BT.656/601 output
26
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
27
CVSS
—
Digital ground for core
28 to 33
PO5 to PO0
O
ITU-R BT.656/601 output
34
TEST0
I
Test purpose only (must be connected to ground)
35
OVSS
—
Digital ground for Pad Ring
36
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
37
CVDD
—
Positive supply voltage (+2.5V) for Pad Ring
38
TEST1
I
Test purpose only (must be connected to ground)
39
TEST2
I
Test purpose only (must be connected to ground)
40
CLKO
O
Clock output (27MHz)
41 to 45
YO9 to YO5
O
ANSI/SMPTE 293M Y output
46
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
47
OVSS
—
Digital ground for Pad Ring
48 to 52
YO4 to YO0
O
ANSI/SMPTE 293M Y output
53
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
54
CVSS
—
Digital ground for core
55
OVSS
—
Digital ground for Pad Ring
56 to 60
CO0 to CO4
O
ANSI/SMPTE 293M Cb/Cr output
61
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
62
OVSS
—
Digital ground for Pad Ring
63 to 67
CO5 to CO9
O
ANSI/SMPTE 293M Cb/Cr output
68
FILM
O
Film sequence detection flag output (not used)
69
RFFI
I
MPEG flag (Repeat First Field) input port
70
OVSS
—
Digital ground for Pad Ring
71
CVDD
—
Positive supply voltage (+2.5V) for Pad Ring
72
IVDD
—
Positive supply voltage (+3.3V) for Pad Ring
73
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
74 to 77
MD19 to MD16
I/O
Data input/output port for SDRAM (not used)
78
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
79
OVSS
—
Digital ground for Pad Ring
80
MA3
O
Address output port for SDRAM
81
MA4
O
Address output port for SDRAM
82
MA2
O
Address output port for SDRAM
83
MA5
O
Address output port for SDRAM
84
OVDD
—
Positive supply voltage (+3.3V) for Pad Ring
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