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33

Pin No.

Pin Name

I/O

Description

43

RFDC

I

RF signal input from the CXA2568M (IC103)

44

ADIO

O

Monitor output of the A/D converter input signal    Not used (open)

45

AVSS0

—

Ground terminal (digital system)

46

IGEN

I

Stabilized current input for operational amplifiers

47

AVDD0

—

Power supply terminal (+5V) (digital system)

48

ASYO

O

Playback EFM full-swing output terminal

49

ASYI

I

Playback EFM asymmetry comparator voltage input terminal

50

BIAS

I

Playback EFM asymmetry circuit constant current input terminal

51

RFAC

I

EFM signal input from the CXA2568M (IC103)

52

AVSS3

—

Ground terminal (digital system)

53

CLTV

I

Internal VCO control voltage input of the playback master PLL

54

FILO

O

Filter output for master clock of the playback master PLL

55

FILI

I

Filter input for master clock of the playback master PLL

56

PCO

O

Phase comparison output for master clock of the playback EFM master PLL

57

AVDD3

—

Power supply terminal (+5V) (digital system)

58

VSS

—

Ground terminal (digital system)

59

VDD

—

Power supply terminal (+5V) (digital system)

60

DOUT

O

Digital audio signal output to the DIGITAL OUT OPTICAL (IC303)

61

LRCK

O

L/R sampling clock signal (44.1 kHz) output terminal    Not used (open)

62

PCMD

O

D/A interface serial data output terminal    Not used (open)

63

BCK

O

Bit clock signal (2.8224 MHz) output terminal    Not used (open)

64

EMPH

O

De-emphasis control signal output terminal    Not used (open)

65

XVDD

—

Power supply terminal (+5V) (crystal oscillator system)

66

XTAI

I

System clock input terminal (16.9344 MHz)

67

XTAO

O

System clock output terminal (16.9344 MHz)

68

XVSS

—

Ground terminal (crystal oscillator system)

69

AVDD1

—

Power supply terminal (+5V) (analog system)

70

AOUT1

O

L-ch analog audio signal output terminal

71

AIN1

I

L-ch operational amplifiers input terminal

72

LOUT1

O

L-ch line output terminal

73

AVSS1

—

Ground terminal (analog system)

74

AVSS2

—

Ground terminal (analog system)

75

LOUT2

O

R-ch line output terminal

76

AIN2

I

R-ch operational amplifiers input terminal

77

AOUT2

O

R-ch analog audio signal output terminal

78

AVDD2

—

Power supply terminal (+5V) (analog system)

79

RMUT

O

R-ch line muting on/off control signal output terminal

80

LMUT

O

L-ch line muting on/off control signal output terminal

34

Pin No.

Pin Name

I/O

Description

1 to 4

A3 to A6

O

Address signal output to the static RAM (IC302)

5

GND

—

Ground terminal

6 to 13

D0 to D7

I/O

Two-way data bus with the static RAM (IC302)

14

PLAY L

O

H LED (D802) drive signal output terminal    “H”: LED on

15

PAUSE L

O

X LED (D803) drive signal output terminal    “H”: LED on

16

MEGA L

O

MEGA CONTROL LED (D801) drive signal output terminal    “H”: LED on

17

XFADE L

O

X-FADE LED (D805) drive signal output terminal    “H”: LED on

18

NODELAY L

O

NO DELAY LED (D804) drive signal output terminal    “H”: LED on

19

WE

O

Write enable signal output to the static RAM (IC302)

20

LOAD IN

O

Loading motor (M11) drive signal output to the BA6780 (IC11)    *1

21

LOAD OUT

O

Loading motor (M11) drive signal output to the BA6780 (IC11)    *1

22

FL CLK

O

Serial data transfer clock signal output to the FL driver (IC801)

23

FL DATA

O

Serial data output to the FL driver (IC801)

24

BLK

O

Blank signal output to the FL driver (IC801)

25 to 27

A13, A14, A7

O

Address signal output to the static RAM (IC302)

28

DSENS

I

Detect signal input from the disc sensor (D11)

29

NC

O

Not used (open)

30

RST

I

System reset signal input from the reset signal generator (IC601)    “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”

31

EXTAL

I

Main system clock input terminal (10 MHz)

32

XTAL

O

Main system clock output terminal (10 MHz)

33

VSS

—

Ground terminal

34

TX

O

Sub system clock output terminal    Not used (open)

35

TEX

I

Sub system clock input terminal    Not used (fixed at “L”)

36

AVSS

—

Ground terminal (for A/D converter)

37

AVREF

I

Reference voltage input terminal (+5V)

38

BUSOUT

O

Sircs remote control signal output to the CONTROL A1II

39

NC

O

Not used (open)

40

KEY6

I

Key input terminal (A/D input) (S814 to S820)
PROGRAM, SHUFFLE, CONTINUE, PEAK SEARCH, EDIT/TIME FADE, MENU, FADER
keys input

41

KEY3

I

Key input terminal (A/D input) (S921 to S927)
TIME/TEXT, REPEAT, DISC 5 to DISC 1 keys input

42

NC

O

Not used (open)

43

KEY2

I

Key input terminal (A/D input) (S901 to S907)
DISC SKIP, EX-CHANGE, CLEAR, CHECK, M, m, MEGA CONTROL keys input

44

KEY1

I

Key input terminal (A/D input) (S808 to S813, S829)
A OPEN/CLOSE,  x, X, H, X-FADE, NO DELAY, l AMS L keys input

45

TEST

I

Setting terminal for the test mode    “L” active

46

TSENS

I

Detect signal input from the table sensor (D10)

47

FLT

O

Serial data latch pulse output to the FL driver (IC801)

48

CLK

O

Serial data transfer clock signal output to the CXD2587Q (IC101)

49

NC

O

Not used (open)

50

DATA

O

Serial data output to the CXD2587Q (IC101)

35

Pin No.

Pin Name

I/O

Description

51

SQCK

O

Sub-code Q data reading clock signal output to the CXD2587Q (IC101)

52

SUBQ

I

Sub-code Q data signal input from the CXD2587Q (IC101)

53

NC

O

Not used (open)

54

SENSE

I

Internal status (SENSE) signal input from the CXD2587Q (IC101)

55

NC

I

Not used (fixed at “L”)

56

RMIN

I

Remote control signal input from the remote control receiver (IC802)

57

NC

I

Not used (fixed at “L”)

58

XLT

O

Serial data latch pulse signal output to the CXD2587Q (IC101)

59

AMUTE

O

Muting control signal output terminal    Not used (open)

60

NC

O

Not used (open)

61

SCOR

I

Sub-code sync (S0+S1) detection signal input from the CXD2587Q (IC101)

62

BUSIN

I

Sircs remote control signal input from the CONTROL A1II

63

NC

O

Not used (open)

64

ZMUTE

O

Muting on/off control signal output terminal    “H” active

65

LPH

O

Laser power control signal output to the CXD2587Q (IC101)    “H” active

66

TBLL

O

Table motor drive signal (counterclockwise) output to the BA6780 (IC11)

67

TBLR

O

Table motor drive signal (clockwise) output to the BA6780 (IC11)

68, 69

S1, S2

I

Detect signal input from the tray address detect switch (S200)

70

OUT.SW

I

Detect signal input from the open/close detect switch (S11)

71

A8

O

Address signal output to the static RAM (IC302)

72, 73

VDD

—

Power supply terminal (+5V)

74 to 80

A9 to A12,

A0 to A2

O

Address signal output to the static RAM (IC302)

*1   Loading motor (M11) control

LOAD IN (pin w;)

“L”

“L”

“H”

“H”

LOAD OUT (pin wa)

“L”

“H”

“L”

“H”

OFF

OUT

IN

BRAKE

Operation

Terminal

36

Les composants identifiés par une
marque 0 sont critiquens pour la
sécurité.
Ne les remplacer que par une pièce
portant le numéro spécifié.

The components identified by
mark 0 or dotted line with mark

0 are critical for safety.
Replace only with part number
specified.

• Items marked “*” are not stocked since they

are seldom required for routine service. Some
delay should be anticipated when ordering
these items.

• The mechanical parts with no reference num-

ber in the exploded views are not supplied.

• Accessories and packing materials are given

in the last of the electrical parts list.

NOTE:

• -XX and -X mean standardized parts, so they

may have some difference from the original
one.

• Color Indication of Appearance Parts

Example:
KNOB, BALANCE (WHITE) . . . (RED)

↑

↑

Parts Color Cabinet's Color

Ref. No.

Part No.

Description

Remark

Ref. No.

Part No.

Description

Remark

• Abbreviation

AUS : Australian model
CND : Canadian model
EA

: Saudi Arabia model

SP

: Singapore model

1

4-224-867-11 PANEL, LOADING

2

4-210-291-01 SCREW (CASE 3 TP2)

3

4-224-875-11 COVER (409537)

4

7-685-646-79 SCREW +BVTP 3X8 TYPE2 N-S