Sony BDV-NF620 / BDV-NF720 / HBD-NF620 / HBD-NF720 Service Manual ▷ View online
HBD-NF620/NF720
65
IC3102 STA516BE
OUT2B 2
SUB_GND 1
OUT2B 3
VCC2B 4
VCC2B 4
GND2B 5
M16
M14
OUT2A 9
OUT2A 8
VCC2A 7
GND2A 6
IN2B
32
M15
M17
IN2A
31
OUT1B 10
OUT1B 11
VCC1B 12
OUT1B 11
VCC1B 12
GND1B 13
M5
M4
OUT1A 17
N.C. 18
OUT1A 16
VCC1A 15
GND1A 14
IN1B
30
M2
M3
IN1A
29
VSS
34
VSS
33
VDD
22
VDD
21
GND_REG
20
GND_CLEARN
19
VCC_SIGN
36
VCC_SIGN
35
REGULATORS
CONFIG
24
VL
23
TRISTATE
26
PWRON
25
TH_WARN
28
FAULT
27
PROTECTIONS
&
LOGIC
HBD-NF620/NF720
66
• IC Pin Function Description
MB-149 BOARD IC101 CXD90011G-BB (BD DECODER) (Taiwan model)
CXD90011G-BC (BD DECODER) (AEP, UK and Mexican models)
Pin No.
Pin Name
I/O
Description
A1, A2
GPIO14, GPIO12
-
Not used
A3
SDA
I/O
Two-way I2C data bus with the EEPROM
A4
USB_DP_P1
I/O
Two-way USB serial data (+) with the wireless LAN card (NF720 only)
A5
USB_DP_P0
I/O
Two-way USB serial data (+) with the USB connector (front side)
A6
USB_VRT_P0P1
-
External reference resistor connection terminal
A8
SRXN
I
Receive data (negative) input terminal Not used
A9
STXP
O
Transmit data (positive) output terminal Not used
A11
FEDMO
-
Not used
A12
FEFMO2
I
Serial data input from the coil/motor driver
A14
FOO
-
Not used
A15
RFIP2
-
Not used
A16
RFIP
I
BD RF signal (positive) input from the BD drive
A17
INE
I
Sub beam (E) input from the BD drive
A19
IND
I
Main beam (D) input from the BD drive
A20
INB
I
Main beam (B) input from the BD drive
A22
RSTI
-
Not used
A24
AOMCLK
O
Master clock (for audio output) signal output to the stream processor
A25
AOBCK
O
Bit clock signal output to the stream processor
A26
AOSDATA2
O
Digital audio signal output to the stream processor
A27
AOSDATA4
O
Digital audio signal output terminal
A28
AR0
-
Not used
B1, B2
GPIO25, GPIO24
-
Not used
B3
SCL
I/O
Two-way I2C clock bus with the EEPROM
B4
USB_DM_P1
I/O
Two-way USB serial data (–) with the wireless LAN card (NF720 only)
B5
USB_DM_P0
I/O
Two-way USB serial data (–) with the USB connector (front side)
B8
SRXP
I
Receive data (positive) input terminal Not used
B9
STXN
O
Transmit data (negative) output terminal Not used
B11
FEFMO
O
Serial data output to the coil/motor driver
B12
FEFMO3
-
Not used
B14
TRO
-
Not used
B15
RFIN2
-
Not used
B16
RFIN
I
BD RF signal (negative) input from the BD drive
B17
MPXOUT3
-
Not used
B19
INC
I
Main beam (C) input from the BD drive
B20
INA
I
Main beam (A) input from the BD drive
B22
TRIND
-
Not used
B23
OPTICAL
I
Digital audio signal input from the optical receiver
B24
AOSDATA0
O
Digital audio signal output to the stream processor
B25
AOSDATA1
O
Digital audio signal output terminal Not used
B26
AOSDATA3
-
Not used
B27
AOLRCK
O
L/R sampling clock signal output to the stream processor
B28
AL0
-
Not used
C1
GPIO15
O
Request signal output to the system controller
C2
GPIO26
-
Not used
C3
GPIO13
O
Wireless LAN VBUS on/off control signal output terminal “H”: VBUS on (NF720 only)
C4, C5
GPIO10, GPIO11
-
Not used
C7
FEGIO7
O
Laser diode control signal output to the BD drive
C9
FEFG
I
Motor hole sensor signal input from the coil/motor driver
C10
FEGIO0
O
Motor drive muting control signal output to the coil/motor driver
C11
FETRAYPWM
O
Serial data transfer clock signal output to the coil/motor driver
C12
FEFMO4
-
Not used
C13
FEGAINSW2
-
Not used
C14
TLO
-
Not used
C15
AVDD12_2
-
Power supply terminal (+1.2V)
C16, C17
MPXOUT1,
MPXOUT2
-
Not used
Ver. 1.2
HBD-NF620/NF720
67
Pin No.
Pin Name
I/O
Description
C18
INH
I
Sub beam (H) input from the BD drive
C19
ING
I
Sub beam (G) input from the BD drive
C20, C21
TRINB, TRINC
-
Not used
C22
VWDC20
-
Not used
C24
ARC
I
Digital audio signal input from the HDMI ARC OUT connector
C25
COAXIAL
-
Not used
C26
SPDIF
-
Not used
C27
NS_XTALI
I
System clock signal input terminal (27 MHz)
C28
NS_XTALO
O
System clock signal output terminal (27 MHz)
D1
GPIO1
I
Ready signal input from the system controller “H”: ready
D2
GPIO16
-
Not used
D3
GPIO17
I
Chip select signal input from the system controller
D4
GPIO18
-
Not used
D6
FEGIO9
I
Slot loading detection switch input terminal
D7
FEGIO4
O
Slave selection signal output to the coil/motor driver
D8
FE_TRAYOUT_
I
Disc tray in detection signal input from the BD drive
D9
FEGIO6
-
Not used
D10
FEEJECT_
-
Not used
D13
FEGAINSW3
-
Not used
D14
FEOSCEN
O
Serial data transfer clock signal output to the BD drive
D15
FEGAINSW1
O
Mode A selection signal output to the BD drive
D16
FE_TRAYIN_
I
Disc tray out detection signal input from the BD drive
D17
V14
-
Not used
D18
INF
I
Sub beam (F) input from the BD drive
D19
HAVC
O
Reference voltage output to the BD drive
D20
TRINA
-
Not used
D21
FPDOCD
-
Not used
D22
VDAC0
-
Not used
D24
MCIN
I
Digital audio signal input from the A/D converter
D26
AVDD33_DAC
-
Power supply terminal (+3.3V)
D27
CH2_P
O
TMDS data (positive) output to the HDMI ARC OUT connector
D28
CH2_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
E1
GPIO3
-
Not used
E2
GPIO2
-
Not used
E3
GPIO6
O
UPG status signal output to the system controller
E4
GPIO0
-
Not used
E6
AVDD33_USB_P0P1
-
Power supply terminal (+3.3V)
E8, E10
FEGIO3, FEGIO10
-
Not used
E12
AVSS12_SATA
-
Ground terminal
E13
FEGIO5
O
Mode B selection signal output to the BD drive
E14
FECFREQ
I/O
Two-way data bus with the BD drive
E17
AUX1
I
Monitoring signal input from the BD drive
E18
AVDD33_3
-
Power supply terminal (+3.3V)
E19
FVREF
-
Not used
E21
FPDODVD
I
Laser power monitor signal input from the BD drive
E22
VWDC30
-
Not used
E23
AVDD12_1
-
Power supply terminal (+1.2V)
E24
SPDATA
-
Not used
E26
AVDD33_HDMI
-
Power supply terminal (+3.3V)
E27
CH1_P
O
TMDS data (positive) output to the HDMI ARC OUT connector
E28
CH1_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
F3
GPIO7
O
USB VBUS on/off control signal output terminal “H”: VBUS on
F4, F5
GPIO21, GPIO19
-
Not used
F7
FEGIO11
-
Not used
F9, F10
DGND12_K
-
Ground terminal
F12
AVSS33_USB_POP1
-
Ground terminal
F13
FEGIO1
-
Not used
F14
FECMOD
O
Serial interface command enable signal output to the BD drive
F15, F16
DGND12_K
-
Ground terminal
HBD-NF620/NF720
68
Pin No.
Pin Name
I/O
Description
F17
AGND33_3
-
Ground terminal
F18
AVDD33_1
-
Power supply terminal (+3.3V)
F19
AGND12_2
-
Ground terminal
F20
AGND33_1
-
Ground terminal
F23
DVCC33_IO_5
-
Power supply terminal (+3.3V)
F26
AVDD33_PLLGP
-
Power supply terminal (+3.3V)
F27
CH0_P
O
TMDS data (positive) output to the HDMI ARC OUT connector
F28
CH0_M
O
TMDS data (negative) output to the HDMI ARC OUT connector
G1
GPIO4
-
Not used
G2, G3
GPIO23, GPIO22
-
Not used
G4
AMUTE
-
Not used
G5
GPIO20
-
Not used
G8
DVCC33_IO_2
-
Power supply terminal (+3.3V)
G11
AVDD12_SATA
-
Power supply terminal (+1.2V)
G12
AVDD33_SATA
-
Power supply terminal (+3.3V)
G14
DVCC33_IO_1
-
Power supply terminal (+3.3V)
G18
AGND33_2
-
Ground terminal
G21
AGND12_1
-
Ground terminal
G22
DVCC33_IO_5
-
Power supply terminal (+3.3V)
G26
AVDD12_HDMI_D
-
Power supply terminal (+1.2V)
G27
CLK_P
O
TMDS clock (positive) signal output to the HDMI ARC OUT connector
G28
CLK_M
O
TMDS clock (negative) signal output to the HDMI ARC OUT connector
H1
EFPWRQ
-
Not used
H2
GPIO5
O
Jig mode selection signal output to the system controller
H3
GPIO9
-
Not used
H4
DGND12_K
-
Ground terminal
H5, H6
DDRVCCIO1
-
Power supply terminal (+1.5V)
H7
DGND12_K
-
Ground terminal
H8, H14
DVCC33_IO_2,
DVCC33_IO_1
-
Power supply terminal (+3.3V)
H25
AVDD12_HDMI_C
-
Power supply terminal (+1.2V)
H26
AVDD12_HDMI_
D_SUB
-
Power supply terminal (+1.2V)
H27
CH2_P_SUB
I
TMDS data (positive) input from the HDMI IN 2 connector
H28
CH2_M_SUB
I
TMDS data (negative) input from the HDMI IN 2 connector
J1 to J6
RDQ17_B, RDQ16_B,
RDQ27_B, RDQ24_B
to RDQ26_B
I/O
Two-way data bus with the SD-RAM
J11, J12
DVCC12_K
-
Power supply terminal (+1.2V)
J13
DGND12_K
-
Ground terminal
J14, J15
DVCC12_K
-
Power supply terminal (+1.2V)
J16
DGND12_K
-
Ground terminal
J17 to
J19
DVCC12_K
-
Power supply terminal (+1.2V)
J25
AVDD12_HDMI_
C_SUB
-
Power supply terminal (+1.2V)
J27
CH1_P_SUB
I
TMDS data (positive) input from the HDMI IN 2 connector
J28
CH1_M_SUB
I
TMDS data (negative) input from the HDMI IN 2 connector
K1, K2
RDQ18_B, RDQ19_B
I/O
Two-way data bus with the SD-RAM
K3, K4
RDQM2_B,
RDQM3_B
O
Data mask signal output to the SD-RAM
K5
DDRVCCIO1
-
Power supply terminal (+1.5V)
K6, K7,
K9
DGND12_K
-
Ground terminal
K11, K12
DVCC12_K
-
Power supply terminal (+1.2V)
K13
DGND12_K
-
Ground terminal
K14, K15
DVCC12_K
-
Power supply terminal (+1.2V)
K16
DGND12_K
-
Ground terminal
K17 to
K19
DVCC12_K
-
Power supply terminal (+1.2V)
K23
AVSS33_DAC
-
Ground terminal
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