Sony BDV-NF620 / BDV-NF720 / HBD-NF620 / HBD-NF720 Service Manual ▷ View online
HBD-NF620/NF720
73
Pin No.
Pin Name
I/O
Description
AE23
NFD0
I/O
Two-way data bus with the NAND fl ash
AE24
NFWEN
O
Write enable signal output to the NAND fl ash
AE25
HTPLG_RX
O
Hot plug detection signal output to the HDMI IN 1 connector
AE26
PWR5V_RX2
I
Power supply voltage (+5V) input from the HDMI IN 2 connector
AF1, AF2
TP_MEM_PLL,
TN_MEMPLL
-
Not used
AF3
RDQ5_B
I/O
Two-way data bus with the SD-RAM
AF4
RDQ25
I/O
Two-way data bus with the SD-RAM
AF5
DGND12_K
-
Ground terminal
AF6
RDQ28
I/O
Two-way data bus with the SD-RAM
AF7
DDRVCCIO1
-
Power supply terminal (+1.5V)
AF8, AF9
RDQ20, RDQ22
I/O
Two-way data bus with the SD-RAM
AF10
DDRVCCIO1
-
Power supply terminal (+1.5V)
AF11,
AF12
RA9, RA5
O
Address signal output to the SD-RAM
AF13
RCS_
O
Chip select signal output to the SD-RAM
AF14 to
AF16
RDQ3, RDQ1, RDQ9
I/O
Two-way data bus with the SD-RAM
AF17,
AF18
DDRVCCIO1
-
Power supply terminal (+1.5V)
AF20
RDQ5
I/O
Two-way data bus with the SD-RAM
AF21
NFD6
I/O
Two-way data bus with the NAND fl ash
AF22
NFCEN
O
Chip enable signal output to the NAND fl ash
AF23
NFD1
I/O
Two-way data bus with the NAND fl ash
AF24
NFALE
O
Address latch enable signal output to the NAND fl ash
AF25
UARXD
-
Not used
AF26
RESET_
I
Reset signal input from the system controller “L”: reset
AF27
DDC_SDA_RX
I/O
Two-way I2C data bus with the HDMI IN 1 connector
AF28
DDC_SCL_RX
O
I2C clock signal output to the HDMI IN 1 connector
AG1 to
AG4
RDQ17, RDQ16,
RDQ26, RDQ27
I/O
Two-way data bus with the SD-RAM
AG5
RDQS2
O
Data strobe signal (positive) output to the SD-RAM
AG6
RCLK1
O
Clock signal (positive) output to the SD-RAM
AG7
RDQS3_
O
Data strobe signal (negative) output to the SD-RAM
AG8
RDQ21
I/O
Two-way data bus with the SD-RAM
AG10
RBA2
O
Bank address signal output to the SD-RAM
AG11,
AG13
RA2, RA11
O
Address signal output to the SD-RAM
AG14
RDQ0
I/O
Two-way data bus with the SD-RAM
AG16
RDQS0
O
Data strobe signal (positive) output to the SD-RAM
AG17
RCLK0
O
Clock signal (positive) output to the SD-RAM
AG18
RDQS1_
O
Data strobe signal (negative) output to the SD-RAM
AG19,
AG20
RDQ7, RDQ4
I/O
Two-way data bus with the SD-RAM
AG21 to
AG23
NFD7, NFD4, NFD2
I/O
Two-way data bus with the NAND fl ash
AG25
GPIO8
-
Not used
AG26
VCLK
O
Serial data transfer clock signal output to the system controller
AG27
VDATA
I
Serial data input from the system controller
AG28
LCDRD
O
Serial data output to the system controller
AH1 to
AH3
RDQ18, RDQ19,
RDQ24
I/O
Two-way data bus with the SD-RAM
AH4
RDQM3
O
Data mask signal output to the SD-RAM
AH5
RDQS2_
O
Data strobe signal (negative) output to the SD-RAM
AH6
RCLK1_
O
Clock signal (negative) output to the SD-RAM
AH7
RDQS3
O
Data strobe signal (positive) output to the SD-RAM
AH8
RDQ23
I/O
Two-way data bus with the SD-RAM
AH10,
AH11
RA0, RA7
O
Address signal output to the SD-RAM
AH13
RCKE
O
Clock enable signal output to the SD-RAM
AH14
RDQ2
I/O
Two-way data bus with the SD-RAM
HBD-NF620/NF720
74
Pin No.
Pin Name
I/O
Description
AH16
RDQS0_
O
Data strobe signal (negative) output to the SD-RAM
AH17
RCLK0_
O
Clock signal (negative) output to the SD-RAM
AH18
RDQS1
O
Data strobe signal (positive) output to the SD-RAM
AH19
RDQM0
O
Data mask signal output to the SD-RAM
AH20
RDQ6
I/O
Two-way data bus with the SD-RAM
AH22,
AH23
NFD5, NFD3
I/O
Two-way data bus with the NAND fl ash
AH25
OPWRSB
O
Power control signal output to the system controller
AH26
UATXD
-
Not used
AH27
VSTB
-
Not used
AH28
IR
-
Not used
HBD-NF620/NF720
75
MB-149 BOARD IC6301 R5F3650KCDFB (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
SIRCS_IN
I
SIRCS signal input from the remote control receiver
2
FAN_CONT
O
Fan motor on/off control signal output terminal “L”: fan motor on
3
FL_DOUT
O
Serial data output to the fl uorescent indicator tube driver
4
SIRCS2_IN
I
SIRCS signal input from the remote control receiver
5
FL_CLK
O
Serial data transfer clock signal output to the fl uorescent indicator tube driver
6
BYTE
I
External data bus width selection signal input terminal
7
CNVSS
I
Processor mode selection signal input terminal
8
NC
-
Not used
9
NO USE
-
Not used
10
RESET
I
System reset signal input from the reset switch “L”: reset
11
XOUT
O
System clock output terminal (8 MHz)
12
VSS
-
Ground terminal
13
XIN
I
System clock input terminal (8 MHz)
14
VCC_3.3V
-
Power supply terminal (+3.3V)
15
CEC (TX/RX)
I/O
CEC serial data input/output with the HDMI connector
16
TS_INT
I
Touch sensor detection signal input from the TOUCH board “H”: touch sensor is detected
17
KEY_INT
I
Key wake-up signal input terminal
18
AC_CUT
I
AC cut detection signal input terminal “L”: AC cut
19
BD_IF_START
O
Ready signal output to the BD decoder “H”: ready
20
LED_PWM3
O
LED drive signal output terminal
21
TS_RST
O
Touch sensor reset signal output to the TOUCH board “L”: reset
22
PCONT_TS
O
Power supply on/off control signal output to the TOUCH board for touch sensor “H”: power on
23
BD_IF_REQ
I
Request signal input from the BD decoder
24
LED_PWM2
O
LED drive signal output terminal
25
PCONT_FL
O
Power supply on/off control signal output terminal for fl uorescent indicator tube driver
“H”: power on
“H”: power on
26
LED_PWM1
O
LED drive signal output terminal
27
WS_SCL
I/O
Two-way I2C clock bus terminal Not used
28
WS_SDA
I/O
Two-way I2C data bus terminal Not used
29
TXD1
O
Not used
30
RXD1
I
Not used
31
CLK1
O
Not used
32
RTS1
O
Not used
33
DAMP_SDA
I/O
Two-way I2C data bus with the stream processor
34
DAMP_SCL
O
Serial data transfer clock signal output to the stream processor
35
DC_DET
I
Speaker DC detection signal input terminal “L”: speaker DC is detected
36 to 38
PCONT1 to PCONT3
O
Power supply on/off control signal output terminal “H”: power on
39
PCONT4 (NC)
O
Power supply control signal output terminal Not used
40
STA516_PCONT
O
Power supply control signal output terminal “H”: power on
41
NC
O
Power supply on/off control signal output terminal Not used
42
FAN_ON
O
Power supply on/off control signal output terminal for fan motor “H”: power on
43
NC
-
Not used
44
CE
I
Chip enable signal input terminal Not used
45
ST_SDA
I/O
Two-way data bus with the tuner section
46
ST_SCL
O
Serial data transfer clock signal output to the tuner section
47
NO USE
-
Not used
48
DRIVER_RST (EN)
O
Power down signal output to the stream processor “L”: power down
49
VACS_1
-
Not used
50
DAMP_XPDN
O
Reset signal output to the power amplifi er “L”: reset
51
DAMP_XRST
O
Reset signal output to the stream processor “L”: reset
52
DAMP_XMUTE
O
Muting on/off control signal output to the stream processor “L”: muting
53
XWMAMUTE
-
Not used
54
TS_SDA
I/O
Two-way data bus with the TOUCH board
55
TS_SCL
I/O
Two-way clock bus with the TOUCH board
56
KARAOKE_MODE
I
Karaoke mode information input terminal Not used
57 to 59
NC
-
Not used
60
VCC_3.3V
-
Power supply terminal (+3.3V)
61
NC
-
Not used
62
VSS
-
Ground terminal
HBD-NF620/NF720
76
Pin No.
Pin Name
I/O
Description
63
PLUG_DET
I
Calibration microphone plug insert detection signal input terminal Not used
64
NC
-
Not used
65
DRIVER_SD/
PVDD_DET
I
Shut down signal input from the power amplifi er “L”: shut down
66
NC
-
Not used
67
STA516_TH_WARN
I
Thermal warning detection signal input from the power amplifi er “L”: thermal warning
68
FL_CS
O
Chip select signal output to the fl uorescent indicator tube driver
69, 70
ASEL_0, ASEL_1
O
Audio selection signal output terminal
71, 72
NO USE
-
Not used
73
ST_RDS_INT
I
RDS interrupt signal input from the tuner section
74
NO USE
-
Not used
75
IF_SDO
O
Serial data output to the BD decoder
76
IF_SDI
I
Serial data input from the BD decoder
77
IF_SCK
I
Serial data transfer clock signal input from the BD decoder
78
IF_CS
O
Chip select signal output to the BD decoder
79
SRS_INT
-
Not used
80
NC
-
Not used
81
BD_RESET
O
Reset signal output to the BD decoder, NAND fl ash and EEPROM “L”: reset
82
JIG_MODE1
I
Jig mode selection signal input from the BD decoder
83
OPWRSB
I
Power control signal input from the BD decoder
84
FE_EJECT
O
Eject/stop key input detection signal output terminal Not used
85
UPG_STATUS
I
UPG status signal input from the BD decoder
86
S-AIR_RST
O
Reset signal output terminal Not used
87
S-AIR_GPIO2
I
Interrupt signal input terminal Not used
88
S-AIR_DET
I
Wireless transceiver detection signal input terminal Not used
89
BD_TEMP
I
Temperature detection signal input terminal
90
DESTINATION
I
Destination setting terminal Fixed at “L” in this unit
91
MODEL
I
Model setting terminal Fixed at “H” in this unit
92, 93
KEY2, KEY1
I
Key input terminal Not used
94
AVSS
-
Ground terminal
95
KEY0
I
Power key input terminal
96
VREF
I
Reference voltage (+3.3V) input terminal
97
AVCC
-
Power supply terminal (+3.3V)
98 to 100
NO USE
-
Not used
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