Sony BDV-IS1000 / HT-IS100 / SA-WIS100 / SS-IS15 Service Manual ▷ View online
SA-WIS100/SS-IS15
69
HDMI BOARD IC3511 SII9011CLU (HDMI RECEIVER)
Pin No.
Pin Name
I/O
Description
1
VSYNC
O
Vertical sync signal output to the HDMI transceiver and progressive scan converter
2 to 5
QO23 to QO20
-
Not used
6
IOGND
-
Ground terminal
7
IOVCC
-
Power supply terminal (+3.3V)
8 to 11
QO19 to QO16
-
Not used
12
CVCC18
-
Power supply terminal (+1.8V)
13
CGND
-
Ground terminal
14 to 17
QO15 to QO12
-
Not used
18
IOGND
-
Ground terminal
19
IOVCC
-
Power supply terminal (+3.3V)
20 to 23
QO11 to QO8
-
Not used
24
CVCC18
-
Power supply terminal (+1.8V)
25
CGND
-
Ground terminal
26 to 29
QO7 to QO4
-
Not used
30
IOGND
-
Ground terminal
31
IOVCC
-
Power supply terminal (+3.3V)
32 to 35
QO3 to QO0
-
Not used
36
CVCC18
-
Power supply terminal (+1.8V)
37
CGND
-
Ground terminal
38
CI2CA
-
Not used
39
CSDA
I/O
Two-way I2C data bus with the EEPROM, HDMI transceiver, HDMI controller, video decoder
and progressive scan converter
and progressive scan converter
40
CSCL
I
I2C clock signal input from the HDMI controller
41
DSDA
I/O
Two-way I2C data bus with the HDMI input selector and EEPROM
42
DSCL
I
I2C clock signal input from the HDMI input selector
43
NC
-
Not used
44
PWR5V
I
Power supply voltage (+5V) input from the HDMI BD/DVD/SAT IN connector
45
CVCC18
-
Power supply terminal (+1.8V)
46
PGND
-
Ground terminal
47
PVCC
-
Power supply terminal (+3.3V)
48
RSVD
-
Not used
49
AVCC
-
Power supply terminal (+3.3V)
50
RXC-
I
TMDS clock signal input from the HDMI input selector
51
RXC+
I
TADS clock signal input from the HDMI input selector
52
AGND
-
Ground terminal
53
AVCC
-
Power supply terminal (+3.3V)
54
RX0-
I
TMDS data input from the HDMI input selector
55
RX0+
I
TMDS data input from the HDMI input selector
56
AGND
-
Ground terminal
57
AVCC
-
Power supply terminal (+3.3V)
58
RX1-
I
TMDS data input from the HDMI input selector
59
RX1+
I
TMDS data input from the HDMI input selector
60
AGND
-
Ground terminal
61
AVCC
-
Power supply terminal (+3.3V)
62
RX2-
I
TMDS data input from the HDMI input selector
63
RX2+
I
TMDS data input from the HDMI input selector
64
AGND
-
Ground terminal
65
DGND
-
Ground terminal
66
DVCC18
-
Power supply terminal (+1.8V)
67
MUTE
O
Audio muting signal output to the system controller
68
IOVCC
-
Power supply terminal (+3.3V)
69
IOGND
-
Ground terminal
70
SPDIF
O
S/PDIF signal output to the digital audio interface receiver and HDMI transceiver
71 to 74
SD3 to SD0
O
Serial data output to the DSP and HDMI transceiver
75
WS
O
L/R sampling signal output to the DSP and HDMI transceiver
76
SCK
O
Bit clock signal output to the DSP and HDMI transceiver
SA-WIS100/SS-IS15
70
Pin No.
Pin Name
I/O
Description
77
IOVCC
-
Power supply terminal (+3.3V)
78
IOGND
-
Ground terminal
79
MCLK
O
Master clock signal output to the DSP, stream processor and HDMI transceiver
80
CGND
-
Ground terminal
81
CVCC18
-
Power supply terminal (+1.8V)
82
AUDPVCC18
-
Power supply terminal (+1.8V)
83
AUDPGND
-
Ground terminal
84
XTALOUT
O
System clock output terminal (28.322 MHz)
85
XTALIN
I
System clock input terminal (28.322 MHz)
86
XTALVCC
-
Power supply terminal (+3.3V)
87
REGVCC
-
Power supply terminal (+3.3V)
88
RSVDL
-
Not used
89
RESET
I
Reset signal input from the HDMI controller "L": reset
90
SCDT
-
Not used
91
INT
O
Interrupt signal output to the HDMI controller
92 to 96
QE23 to QE19
O
Video data output to the HDMI transceiver and video decoder
97
IOGND
-
Ground terminal
98
IOVCC
-
Power supply terminal (+3.3V)
99 to 105
QE18 to QE12
O
Video data output to the HDMI transceiver and video decoder
106
IOGND
-
Ground terminal
107
IOVCC
-
Power supply terminal (+3.3V)
108 to 111
QE11 to QE8
O
Video data output to the HDMI transceiver and video decoder
112
CVCC18
-
Power supply terminal (+1.8V)
113
CGND
-
Ground terminal
114, 115
QE7, QE6
O
Video data output to the HDMI transceiver and video decoder
116, 117
QE5, QE4
O
Video data output to the HDMI transceiver
118
IOGND
-
Ground terminal
119
ODCK
O
Data clock signal output to the HDMI transceiver and progressive scan converter
120
IOVCC
-
Power supply terminal (+3.3V)
121, 122
QE3, QE2
O
Video data output to the HDMI transceiver and video decoder
123, 124
QE1, QE0
O
Video data output to the HDMI transceiver
125
CGND
-
Ground terminal
126
CVCC18
-
Power supply terminal (+1.8V)
127
DE
O
Data enable signal output to the HDMI transceiver and video decoder
128
HSYNC
O
Horizontal sync signal output to the HDMI transceiver and progressive scan converter
SA-WIS100/SS-IS15
71
HDMI BOARD IC3519 M30620FCPGP-RIS01 (HDMI CONTROLLER)
Pin No.
Pin Name
I/O
Description
1 to 5
NC
O
Not used
6
BYTE
I
External data bus width selection signal input terminal "L": 16 bit Fixed at "L" in this set
7
CNVSS
I
Processor mode selection signal input terminal "L": single chip mode
Fixed at "L" in this set
Fixed at "L" in this set
8, 9
NC
O
Not used
10
RESET
I
Reset signal input from the system controller "L": reset
11
XOUT
O
System clock output terminal (10 MHz)
12
VSS
-
Ground terminal
13
XIN
I
System clock input terminal (10 MHz)
14
VCC_3.3V
-
Power supply terminal (+3.3V)
15
NMI
I
Non-maskable interrupt signal input terminal Not used
16 to 18
NC
O
Not used
19
RX_RST
O
Reset signal output to the HDMI receiver "L": reset
20
RX_INT
I
Interrupt signal input from the HDMI receiver
21
1444_HPD
O
Hot plug detection control signal output to the HDMI input selector
22
HPD_IN1
O
Hot plug detection control signal output to the HDMI input selector
23 to 26
NC
O
Not used
27
CSCL
O
I2C clock signal output to the EEPROM, HDMI receiver, HDMI transceiver, video decoder
and progressive scan converter
and progressive scan converter
28
CSDA
I/O
Two-way I2C data bus with the EEPROM, HDMI receiver, HDMI transceiver, video decoder
and progressive scan converter
and progressive scan converter
29
232COUT
O
Serial data output terminal for RS-232C
30
232CIN
I
Serial data input terminal for RS-232C
31, 32
NC
O
Not used
33
TX
O
Serial data output to the system controller
34
RX
I
Serial data input from the system controller
35
EEPROMSEL1
O
Input data selection signal output terminal for EEPROM
36 to 39
NC
O
Not used
40
VDAC_RESET
O
Not used
41
TX_5VPWR
O
Power supply on/off control signal output terminal for HDM IOUT connector "H": power on
42
TX_RST
O
Reset signal output to the HDMI transceiver "L": reset
43
TX_INT
I
Interrupt signal input from the HDMI transceiver
44 to 50
NC
O
Not used
51 to 53
TMDS_S1 to TMDS_S3
O
HDMI input selection signal output to the HDMI input selector
54
TMDS_OEB
O
Output enable signal output to the HDMI input selector
55, 56
P5V_SELA, P5V_SELB
O
HDMI +5V power input selection signal output terminal
57 to 59
NC
O
Not used
60
VCC_3.3V
-
Power supply terminal (+3.3V)
61
NC
O
Not used
62
VSS
-
Ground terminal
63, 64
NC
O
Not used
65
MUTE
O
System muting signal output terminal
66
AD_SW
O
Bus switch control signal output terminal
67
AD_INT
I
Interrupt signal input from the video decoder
68
AD_RST
O
Reset signal output to the video decoder "L": reset
69
PROU_RST
O
Reset signal output to the interlace/progressive converter "L": reset
70
PROU_OUT_SW
O
Bus switch control signal output terminal
71 to 90
NC
O
Not used
91 to 93
MODEL_SW3 to
MODEL_SW1
I
Model setting terminal
94
AVSS
-
Ground terminal
95
NC
O
Not used
96
VREF
I
Reference voltage (+3.3V) input terminal
97
AVCC
-
Power supply terminal (+3.3V)
98 to 100
NC
O
Not used
SA-WIS100/SS-IS15
72
HDMI BOARD IC3803 CXD9837R (PROGRESSIVE SCAN CONVERTER)
Pin No.
Pin Name
I/O
Description
1
DVDD
-
Power supply terminal (+3.3V) (for I/O)
2
CLKI
I
System clock signal input from the HDMI receiver and video decoder
3
TEST17
I
Test terminal Fixed at "L" in this set
4
PLL_EN
I
PLL enable signal input from the HDMI controller
5, 6
PI0, PI1
I
Video data input terminal
7 to 14
P12 to P19
I
Video data input from the video HDMI receiver and video decoder
15
NHSI
I
Horizontal sync signal input from the HDMI receiver and video decoder
16
NVSI
I
Vertical sync signal input from the HDMI receiver and video decoder
17
OVSS
-
Ground terminal (for I/O)
18
THRM (IVSS)
I
Through mode setting terminal Fixed at "L" in this set
19
CVSS
-
Ground terminal (for core)
20
NVSO
O
Vertical sync signal output to the HDMI transceiver
21
NHSO
O
Horizontal sync signal output to the HDMI transceiver
22 to 25
P09 to P06
O
Video signal output terminal Not used
26
OVDD
-
Power supply terminal (+3.3V) (for I/O)
27
OVSS
-
Ground terminal (for I/O)
28 to 33
P05 to P00
O
Video signal output terminal Not used
34
TEST0
I
Test terminal Fixed at "L" in this set
35
OVSS
-
Ground terminal (for I/O)
36
OVDD
-
Power supply terminal (+3.3V) (for I/O)
37
CVDD
-
Power supply terminal (+2.5V) (for core)
38, 39
TEST1, TEST2
I
Test terminal Fixed at "L" in this set
40
CLKO
O
Data clock output to the HDMI transceiver
41 to 45
Y09 to Y05
O
Video signal output to the HDMI transceiver and video decoder
46
OVDD
-
Power supply terminal (+3.3V) (for I/O)
47
OVSS
-
Ground terminal (for I/O)
48 to 50
Y04 to Y02
O
Video signal output to the HDMI transceiver and video decoder
51, 52
Y01, Y00
O
Video signal output terminal Not used
53
OVDD
-
Power supply terminal (+3.3V) (for I/O)
54
CVSS
-
Ground terminal (for core)
55
OVSS
-
Ground terminal (for I/O)
56, 57
C00, C01.
O
Video signal output terminal Not used
59 to 60
C02 to C04
O
Video signal output to the HDMI transceiver and video decoder
61
OVDD
-
Power supply terminal (+3.3V) (for I/O)
62
OVSS
-
Ground terminal (for I/O)
63 to 67
C05 to C09
O
Video signal output to the video encoder
68
FILM
O
Film sequence detection fl ag output terminal Not used
69
RFFI
I
MPEG fl ag (repeat fi rst fi eld fl ag) input terminal Not used
70
OVSS
-
Ground terminal (for I/O)
71
CVDD
-
Power supply terminal (+2.5V) (for core)
72
IVDD
-
Power supply terminal (+3.3V) (for I/O)
73
OVDD
-
Power supply terminal (+3.3V) (for I/O)
74 to 77
MD19 to MD16
I/O
Two-way data bus terminal Not used
78
OVDD
-
Power supply terminal (+3.3V) (for I/O)
79
OVSS
-
Ground terminal (for I/O)
80 to 83
MA3, MA4, MA2, MA5
O
Address signal output to the SD-RAM
84
OVDD
-
Power supply terminal (+3.3V) (for I/O)
85
OVSS
-
Ground terminal (for I/O)
86 to 89
MA1, MA6, MA0, MA7
O
Address signal output to the SD-RAM
90
OVSS
-
Ground terminal (for I/O)
91
TEST5
I
Test terminal Fixed at "L" in this set
92
CVSS
-
Ground terminal (for core)
93
OVDD
-
Power supply terminal (+3.3V) (for I/O)
94 to 97
MA10, MA8, MA11,
MA9
O
Address signal output to the SD-RAM
98
OVDD
-
Power supply terminal (+3.3V) (for I/O)
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