Sharp 32KF-84H (serv.man14) Service Manual ▷ View online
63
32KF-84H
VSP9402A (IC6007)
Block Diagram
13
6
I²C
interface
(5
6
)
19
adr/tdi
s
c
l
s
da
V
DA
C
(5
4
)
U
DA
C
(5
3
)
Y
DA
C
(5
2
)
O
F
F
SET
GA
IN
76
2
79
GA
IN
O
F
F
SET
O
F
F
SET
GA
IN
AD
C1
(2
)
52
63
62
61
53
54
58
55
56
57
39
40
41
48
37
46
47
GA
IN
AD
C2
(3
)
GA
IN
S
ource
S
e
lect
(1
)
S
ource
S
e
lect
(1
6
)
38
AD
CR
(1
2
)
GA
IN
AD
CG
(1
3
)
GA
IN
AD
CB
(1
4
)
GA
IN
A
DCF
(1
5
)
GA
IN
Notch
Deskew
(4
)
Sy
n
c
(6
)
Color
Decoder
(5
)
delay
control
(P
AL
/S
E
C
AM
)
(7
)
1H delay
18
20
Ant
ial
ias,
Deskew
(1
7
)
Ant
ial
ias,
Deskew
(1
8
)
Ant
ial
ias,
Deskew
(1
9
)
Ant
ial
ias,
Deskew
(2
0
)
test-
controller
,
memo
ry
bist
(5
5
)
71
7
tc
lk
tms
69
70
xtal
o
s
cillator
(9
)
x
out
xin
divider
32
31
30
15
22
21
16
10
9
74
8
ITU
656
D
ecoder
(4
1
)
656hi
n/
cl
kf
2
0
656vin/
blank
CLK
F20
RG
B
YU
V
or
bypass
(2
5
)
τ
(2
7
)
Y
brightne
s
s
c
ontra
s
t
(2
6
)
U,
V
sat
u
rat
io
n
O
ffset,
Gain
(2
9
)
(3
0
)
soft-mix
ch
a
n
nel
mux
(3
1
)
do
w
n
sampling
2
4:4:4
4:2:2
(2
8
)
H-
pr
escaler
(3
4
)
noise
measure
men
t
(3
2
)
clampin
g
cor
rection
(2
1
)
clampin
g
cor
rection
(2
2
)
clampin
g
cor
rection
(2
3
)
DC
T
I
(4
6
)
P
eaking
(4
5
)
C
o
ar
se
Delay
4:4:4
(4
9
)
ITU656
E
n
coder
(5
1
)
8
8:8:8
(5
0
)
Fin
e
de
la
y
Y noise
re
duction
(3
8
)
UV
m
oti
on
detection
(3
6
)
Y motion
detection
(3
5
)
UV
noise
re
duction
(3
7
)
eDR
AM
memory
controller
(3
9
)
14
23
17
27
Pix
elmixer
(4
4
)
H-
pos
ts
c
a
le
r
(4
2
)
Panorama
ge
ne
ra
tor
(4
3
)
V
H
avout
au
out
ayout
h
out
vout
cl
ko
u
t
v5
0
h50
v
cv
bs
o3
cvb
s
o
2
cvb
so
1
cv
bs
1
cv
bs
2
cv
bs
3
cv
bs
4
cv
bs
5
cv
bs
6
cv
bs
7
rin1
gi
n1
bi
n1
rin2
gi
n2
bi
n2
fbl2
fbl1
656c
lk
656i
o0
656i
o1
656i
o2
656i
o3
656i
o4
656i
o5
656i
o6
656i
o7
CLAMP
CLAMP
c
lam
pi
ng
s
ig
n
a
ls
to
A
DCs
AG
C
g
ener
at
o
r
Y
d
e
la
y
(8
)
PRIMUS
(A32
)
VSP9402A
VSP9432A
CLK
B3
6
Y
U,
V
C
VBS/
Y
C
YC
SEL
Y
U,
V
Y
U
V
F
α
ma
in
in
s
e
rt
CL
KF2
P
A
D
Y
del
a
y
UV
del
a
y
UV
in
Y
in
data
bu
ffe
r
data
bu
ffe
r
24
res
e
t
line locked or
free-r
unnin
g
divider
line-loc
k
e
d
cl
o
c
k
s
(3
6
,
7
2
MHz)
free-running
cl
o
c
ks
(2
0.
2
5
,
40.
5
MH
z)
c
lampe
d,
f
ilt
er
d
sy
n
c
s
ig
na
l
K
c
Ky
de
t_
bl
oc
k
.v
s
d
1
/.
1
0.
20
00
D
.W
e
n
del
O
u
tput
Dat
a
Contr
o
lle
r
(5
5
)
re
a
d
con
tr
o
l
H/V-
ac
quisition
(3
3
)
In
p
u
t
Sync
Ou
tp
u
t
Sy
n
c
B
a
ck
gr
ou
nd
gen
er
a
tor
(5
7
)
O
utput
Sy
n
c
C
ont
ro
ller
(4
0
)
64
8 MH
z
DT
O
(1
0
)
LL-
P
L
L
(1
1
)
64
8
M
H
z
c
lk
2
16
M
H
z
cl
k
line
-l
o
c
ked
BL
A
N
K
BL
ANE
N
BL
ANK
FB
64
32KF-84H
VSP9402A (IC6007)
Pin Description
pin 9402/32 9412/42 I/O
9402/32
9412/42
remark
52
cvbs1
I
CVBS input
analog input
53
cvbs2
I
CVBS input
analog input
54
cvbs3
I
CVBS input
analog input
55
cvbs4
I
CVBS input or Y1
analog input
56
cvbs5
I
CVBS input or C1
analog input
57
cvbs6
I
CVBS input or Y2
analog input
58
cvbs7
I
CVBS input or C2
analog input
63
cvbso1
O
CVBS output 1
CVBS output 2
CVBS output 2
analog output
62
cvbso2
O
analog output
61
cvbso3
O
CVBS output 3
analog output
70
xin
I
Crystal connection 1
69
xout
O
Crystal connection 2
23
vout
O
vertical output
single or double
scan, dependent
on version
17
hout
O
horizontal output
3
vssdacy
i656i7
S/I
DAC (Y)
656 input
(MSB)
2
ayout
i656i6
O/I
Y output
656 input
1
vdddacy
i656i5
S/I
DAC (Y)
656 input
80
vssdacu
i656i4
S/I
DAC (U)
656 input
79
auout
i656i3
O/I
U output
656 input
78
vdddacu
i656i2
S/I
DAC (U)
656 input
77
vssdacv
i656i1
S/I
DAC (V)
656 input
76
avout
i656i0
O/I
V output
656 input
(LSB)
75
vdddacv
i656iclk
S/I
DAC (V)
656 input
clock
27 MHz nom.
39
rin1
I
R or V in1
analog input
40
gin1
I
G or Y in1
analog input
41
bin1
I
B of U in1
analog input
37
fbl1
I
Fast Blank input 1 (H1)
analog input
46
rin2
I
R or V in2
analog input
47
gin2
I
G or Y in2
analog input
65
32KF-84H
48
bin2
I
B of U in2
analog input
38
fbl2
I
Fast Blank input 2 (H2)
analog input
14
v
1)
I
vertical pulse for RGB input
6
sda
I/O
I²C-Bus data
13
scl
I
I²C-Bus clk
7
tms
I
testmode select
connect to
vdd33
19
adr / tdi
I
I²C address / test data in
24
reset
I
Reset input
reset, when low
27
clkout
O
Output clock
27 MHz
59
vdd33c
S
supply voltage CVBS
3.3 V
60
vss33c
S
supply voltage CVBS
0 V
50
vddac1
S
supply voltage CVBS1
1.8 V
51
vssac1
S
supply voltage CVBS1
0 V
64
vddac2
S
supply voltage CVBS2
1.8 V
65
vssac2
S
supply voltage CVBS2
0 V
44
vdd33rgb
S
supply voltage RGB
3.3 V
45
vss33rgb
S
supply voltage RGB
0 V
42
vddargb
S
supply voltage for RGB
1.8 V
43
vssargb
S
supply voltage for RGB
0 V
35
vddafbl
S
supply voltage for FBL
1.8 V
36
vssafbl
S
supply voltage for FBL
0 V
68
vddapll
S
supply voltage for PLL
1.8 V
66
vddd1
S
supply voltage for digital
1.8 V digital
67
vssd1
S
supply voltage for digital
0 V digital
5
vddd2
S
supply voltage for digital
1.8 V digital
4
vssd2
S
supply voltage for digital
0 V digital
28
vddd3
S
supply voltage for DRAM
1.8 V digital
29
vssd3
S
supply voltage for digital
0 V digital
34
vddd4
S
supply voltage for digital
1.8 V digital
33
vssd4
S
supply voltage for digital
0 V digital
72
vddp1
S
supply voltage for digital
3.3 V pad
73
vssp1
S
supply voltage for digital
0 V pad
pin 9402/32 9412/42 I/O
9402/32
9412/42
remark
VSP9402A (IC6007)
Pin Description
66
32KF-84H
VSP9402A (IC6007)
Pin Description
12
vddp2
S
supply voltage for digital
3.3 V pad
11
vssp2
S
supply voltage for digital
0 V pad
25
vddp3
S
supply voltage for digital
3.3 V pad
26
vssp3
S
supply voltage for digital
0 V pad
71
tclk
I
testclock
connect to vss
18
h50
2)
O
Hout 50 Hz
(with skew)
20
v50
3)
O
Vout 50 Hz
32
656io0
I/O
Digital input / output
LSB
31
656io1
I/O
Digital input / output
30
656io2
I/O
Digital input / output
22
656io3
I/O
Digital input / output
21
656io4
I/O
Digital input / output
16
656io5
I/O
Digital input / output
15
656io6
I/O
Digital input / output
10
656io7
I/O
Digital input / output
MSB
9
656clk
I/O
Digital input / output clock
74
656hin/clkf20
I/O
separate H input for 656 /
20.25 clock output
8
656vin/blank
4)
I/O
separate V input for 656 /
BLANK output
49
vssd5
5)
S
supply voltage for digital
0V
pin 9402/32 9412/42 I/O
9402/32
9412/42
remark
1)
In VSP94xxB and VSP94xxC this pin is shared by v and intr (C800 controller output)
2)
In VSP94xxB and VSP94xxC this pin is shared by h50 and irq (Data-slicer-interrupt)
3)
In VSP94xxB and VSP94xxC this pin is shared by v50 and blank
4)
In 9402 A31 (and higher) and in
VSP94xxA/B/C, this pin is shared by 656vin and blank
5)
This pin is not used and not bonded in VSP94xxA. The use of this pin in VSP94xxB/C will be V
SS
. For
upgradability it is recommended to not leave this pin open.
