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Model
LL-T2015
Pages
33
Size
1.38 MB
Type
PDF
Document
Service Manual
Brand
Device
Monitor
File
ll-t2015.pdf
Date
PREV: Sharp LL-T2010W (serv.man23) User Manual / Operation Manual

Sharp LL-T2015 Service Manual ▷ View online

LL-T2015-B
WAVE FORM
5 – 1
CHAPTER 5. WAVE FORM
Waveform measurement condition: Input each of the display patterns
and measure the waveform (tinming chart).
Caution:
(1) Probe: TektronixP6139A
(2) Reception mode: 
VESA1600 x 1200   H: 75kHz   V: 60Hz   DOTCLK: 162MHz
WAVE FORM 1:  X501 (C504 side)
Frequency: 14.318MHz
Display screen: Arbitrary
WAVE FORM 2: VSYNC (LD206, LC305)
Frequency: 60Hz
Display screen: Arbitrary
WAVE FORM 3:  HSYNC (LD205, LD304)
Frequency: 75kHz
Display screen: Arbitrary
WAVE FORM 4: GCLK (LD404)
Frequency: 81MHz
Display screen: Arbitrary
Wave-form
No.
Measurement 
point
Name of 
waveform
Display pattern
1
X501 
(C504 side)
X501
Arbitrary
2
LD206, LC305
VSYNC
Arbitrary
3
LD205, LD304
HSYNC
Arbitrary
4
LD404
GCLK
Arbitrary
5
LD401
GVS
Arbitrary
6
R569, R570
GHS
Arbitrary
7
LD529
DCLK
Arbitrary
8
LD530
DEN
Arbitrary
9
LD301, LD302,
LD303
RGB OUT
16 monochromatic 
gradation patterns
Oscilloscope: Tektronix644B
Input signal:
VESA1600 x 1200
H: 75kHz  V: 60Hz
DOTCLK: 162MHz
2V/DIV, 50ns/DIV 
GND
 
1V/DIV, 5ms/DIV 
GND
1V/DIV, 5
µ
s/DIV 
GND
1V/DIV, 5ns/DIV 
GND
 
LL-T2015-B
WAVE FORM
5 – 2
WAVE FORM 5:  GVS (LD401)
Frequency: 60Hz
Display screen: Arbitrary
WAVE FORM 6:  GHS (R569, R570)
Frequency: 75kHz
Display screen: Arbitrary
WAVE FORM 7:  DCLK (LD529)
Frequency: 62.5MHz
Display screen: Arbitrary
WAVE FORM 8:  DEN (LD530) 
Frequency: 75kHz
Display screen: Arbitrary
WAVE FORM 9:  RGB OUT (LD301, LD302, LD303)
Display screen: 16 monochromatic gradation patterns
1V/DIV, 5ms/DIV 
GND
1V/DIV, 5
µ
s/DIV 
GND
 
1V/DIV, 5ns/DIV 
GND
1V/DIV, 5
µ
s/DIV 
GND
0.5V/DIV, 5
µ
s/DIV 
GND
 
LL-T2015-B/H
BLOCK DIAGRAM
6 – 1
SDET
Power
Unit
Scaling Chip
PW-164B
IC502
LVDS
Transmitter
IC701
EEPROM
IC602
ADC
AD9888-170
IC402
D-SUB15PIN
CN201
MPU
RGB1
RXD
TXD
EDID_SEL
SDA
SCL
SDA
SCL
HS1
SDA/SCL
Invertor Unit
18V
BRT_
VR
LVDS_PD
IHS/I
V
S
HIN1
DVI-I
CN101
TMDS
TFP401
IC102
HIN2
VI
N
2
VI
N
1
Comparator
IC301
Buffer
IC302
VS1
SDA
SCL
Swi
tc
h
IC
201
HS2
VS2
A
-
DDC
IC
202
SDA
SCL
Reset
IC505
DAC
IC507
LCDV
SW PWB
Power/Input/Menu/Selct/
䋫
/
䋭
/LED
KEY
Regulator
PQ1CZ21H2Z
IC804
2.
5
V
5V
3.
3
V
V33/LV33
PW_CT
L
CN701
CN501
CN802
CN801
IA
C
T
X501
14.318MHz
IHS/I
V
S
ID[0..47]
ID[0..47]
ICK(B)
GFBK
ICK(B)
DEN
DCLK
OD[0..47]
LCD Panel
Lamp
Lamp
DV25
AV5
DV5
DV5A
PV33/AV33/DV33/
OV33/AD33
DV33
3.3V
3.
3
V
18V
BL_EN
RX
RGB2
Regulator LM317
IC103/401
MAIN PWB
A/D-DDC
IC101
Regulator
MP1580
IC802
Regulator
PQ20VZ11
IC801
18V
18V
Regulator LM317
IC508
Regulator
PQ1CZ21H2Z
IC803
HREF1/HREF2
IC
507
OUTPORT
CS0
D0
䌾
D7
D_PD
D_PDO
LED_G/LED_R
Program
Memory
IC601
A1
䌾
A19
D0
䌾
D15
ROMOE
CHAPTER 
6. B
L
OCK DIAGRAM
LL-T2015-B/H
CIRCUIT DIAGRAM
7 – 1
T
1
1_DVI1
BLUE1
GFBK
D_PDO
GVS
D_PD
GCLK
D_SDET
RED1
GRO[7..0]
GREEN1
GPENSOG
GGO[7..0]
GBO[7..0]
GRE[7..0]
GGE[7..0]
GBE[7..0]
HS1
VS1
SCL
SDA
D_SEL
GHS_D
T
3
3_ANALOG FRONT
VS2
BIN2
BLUE1
GIN2
RED2
GREEN1
BIN1
BLUE2
RED1
VS1
RIN1
HIN1
HREF1
HIN2
HS2
RIN2
GREEN2
HS1
GIN1
SOG1
SOG2
HREF2
VIN2
VIN1
T
4
4_ADC
RIN1
RIN2
BIN1
GIN1
BIN2
SOG2
GIN2
SOG1
VIN2
HIN2
HIN1
VIN1
GRE[7..0]
SDA
SCL
GCOAST
GRO[7..0]
GGE[7..0]
GGO[7..0]
GBE[7..0]
GBO[7..0]
GCLK
GVS
GFBK
GHS
GBLKSPL
T
7
6_MEMORY
ROMWE
ROMOE
D[15..0]
SCL
A[19..0]
VPPON
SDA
RESET
NMI
RXD
TXD
T
2
2_ANA1
RXD
TXD
EDIDEN
BLUE2
GREEN2
RED2
HS2
VS2
T
8
7_LVDS
LVDS_PD
DEN
DCLK
DRE[7..0]
DGE[7..0]
DBE[7..0]
DRO[7..0]
DGO[7..0]
DBO[7..0]
DHS
DVS
T
9
8_POWER
MAIN_PW
LCD_PW
PW_CTL
1
BL_EN
BRT_VR
T
6
5_PW1
6
4
GGE[7..0]
RXD
D[15..0]
GPENSOG
DRE[7..0]
ROMWE
DBO[7..0]
A[19..0]
DGE[7..0]
GGO[7..0]
GRE[7..0]
GVS
DGO[7..0]
DEN
GHS
GBE[7..0]
DCLK
ROMOE
DRO[7..0]
GBO[7..0]
SCL
DBE[7..0]
GCLK
GRO[7..0]
BRT_VR
HREF2
HREF1
RESET
GFBK
D_PD
D_PDO
LVDS_PD
BL_EN
EDIDEN
SDA
PW_CTL1
VPPON
GCOAS
T
GBLKSP
L
TXD
MAIN_PW
D_SDET
LCD_PW
DHS
DVS
NMI
D_SEL
GHS_D
GGE[7..0]
DBO[7..0]
GRE[7..0]
D[15..0]
GGO[7..0]
GBE[7..0]
DRE[7..0]
GRO[7..0]
DBE[7..0]
DRO[7..0]
GBO[7..0]
DGO[7..0]
DGE[7..0]
A[19..0]
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
A
B
C
D
876
5
4
3
21
1
2
3
4
5
6
7
8
D
C
B
A
1/9
TOP
CHA
P
T
E
R
 7. 
CIR
CUIT
 DIAGRAM
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