Sharp DV-760H (serv.man3) Service Manual ▷ View online
DV-700S
DV-760S/H
DV-760S/H
11-29
17
VDD
P
VDD
*
*
18
EXPAL0
B
UC3
PDV2T
*
19
EXPAL1
B
UC3
PDV2T
*
20
EXPAL2
B
UC3
PDV2T
*
21
EXPAL3
B
UC3
PDV2T
*
22
EXPAU0
B
UC3
PDV2T
*
23
EXPAU1
B
UC3
PDV2T
*
24
VSS
P
VSS
*
*
25
VDD
P
VDD
*
*
26
EXPAU2
B
UC3
PDV2T
*
27
EXPAU3
B
UC3
PDV2T
*
28
EXPBL0
B
UC3
PDV2T
*
29
EXPBL1
B
UC3
PDV2T
*
30
EXPBL2
B
UC3
PDV2T
*
31
EXPBL3
B
UC3
PDV2T
*
32
VSS
P
VSS
*
*
33
VDD
P
VDD
*
*
34
EXPBU0
B
UC3
PDV2T
*
35
EXPBU1
B
UC3
PDV2T
*
36
EXPBU2
B
UC3
PDV2T
*
37
EXPBU3
B
UC3
PDV2T
*
38
EXPC0
B
BDC3
PDV2T
*
39
EXPC1
B
BDC3
PDV2T
*
40
EXPC2
P
BDC3
*
*
41
VSS
P
VSS
*
*
42
EXPC3
B
BDC3
PDV2T
*
43
EXPC4
B
BDC3
PDV2T
*
44
EXPC5
B
BDC3
PDV2T
*
45
EXPD0
B
UC3
PDV2T
*
46
EXPD1
B
UC3
PDV2T
*
47
EXPD2
B
UC3
PDV2T
*
48
VSS
P
VSS
*
*
49
VDD
P
VDD
*
*
50
EXPD3
B
UC3
PDV2T
*
51
EXPD4
B
UC3
PDV2T
*
52
EXPD5
B
UC3
PDV2T
*
53
BUFDO
O
ODN3
PDV1T
*
54
BUFDI
I
IDC
*
*
55
SBUFBO
O
ODN3
PDV1T
*
56
SBUFBI
I
LIN
*
STB
57
SBUFAO
O
ODN3
PDV1T
*
58
SBUFAI
I
LIN
*
STB
59
MRST
I
IDC
*
*
60
MODE
I
IDC
*
*
61
BUFCO
B
BDC3
PDV2T
*
62
TEST
I
ITST1
*
*
63
IBUFCI
I
IDC
*
*
64
VSS
P
VSS
*
*
PIN No.
PIN NAME
I/O ATTR
I/O CELL
PDV CELL
LIO CELL
DV-700S
DV-760S/H
DV-760S/H
11-30
11-23. IC8201 IX1610GE
Pin Name
Input/Output
Functions
R43 to R40
I/O
4-bit I/O port with latch.
When used as input port, the latch must be set to "1".
When used as input port, the latch must be set to "1".
R53 to R50
Every bit data is possible to be set cleared and tested by the bit manipulation instruction of the
L-register indirect addressing.
L-register indirect addressing.
R81 (T2)
2-bit I/O port with latch.
Timer/Counter 2 external input
I/O(Input)
When used as input port, external interrupt input
R80 (INT2)
pin, or timer/counter external input pin, the latch
External interrupt 2 input
must be set to "1".
XIN
Input
Resonator connecting pins.
XOUT
Output
For inputting external clock, XIN is used and XOUT is opened.
RESET
Input
Reset signal input
HOLD(INT1)
I/O(Input)
Hold request/release signal input
External interrupt 1 input and R82 I/O
VDD
Power Supply
+5V
Vss
0V (GND)
• Block Diagram
Hold controller
System controller
Timing Generator
Clock Generator
Interval Timer
12-bit
Timer/Counter
(2ch)
Timer/Counter
(2ch)
C Z S G
FLAG
ALU
KE
Accumulator
HR
LR
RAM Address buffer
Data Memory
(RAM)
Program
Counter
Counter
IR register
IR Decoder
EIR
Interrupt controller
EIF
Stack
SPW
DC
TC2
TC1
R5
R53
to
R50
R4
R43
to
R40
R8
R81 (T2)
R80 (INT2)
R80 (INT2)
I/O
port
port
I/O port
(R4 is High current port)
T/C input
Interrupt input
Interrupt input
Program
Memory (ROM)
Memory (ROM)
VDD
VSS
HOLD
(INT1)
RESET
Power Supply
XIN
XOUT
XOUT
Osc. connecting
pins
pins
Hold input
Reset input
DV-700S
DV-760S/H
DV-760S/H
11-30
11-23. IC8201 IX1610GE
Pin Name
Input/Output
Functions
R43 to R40
I/O
4-bit I/O port with latch.
When used as input port, the latch must be set to "1".
When used as input port, the latch must be set to "1".
R53 to R50
Every bit data is possible to be set cleared and tested by the bit manipulation instruction of the
L-register indirect addressing.
L-register indirect addressing.
R81 (T2)
2-bit I/O port with latch.
Timer/Counter 2 external input
I/O(Input)
When used as input port, external interrupt input
R80 (INT2)
pin, or timer/counter external input pin, the latch
External interrupt 2 input
must be set to "1".
XIN
Input
Resonator connecting pins.
XOUT
Output
For inputting external clock, XIN is used and XOUT is opened.
RESET
Input
Reset signal input
HOLD(INT1)
I/O(Input)
Hold request/release signal input
External interrupt 1 input and R82 I/O
VDD
Power Supply
+5V
Vss
0V (GND)
• Block Diagram
Hold controller
System controller
Timing Generator
Clock Generator
Interval Timer
12-bit
Timer/Counter
(2ch)
Timer/Counter
(2ch)
C Z S G
FLAG
ALU
KE
Accumulator
HR
LR
RAM Address buffer
Data Memory
(RAM)
Program
Counter
Counter
IR register
IR Decoder
EIR
Interrupt controller
EIF
Stack
SPW
DC
TC2
TC1
R5
R53
to
R50
R4
R43
to
R40
R8
R81 (T2)
R80 (INT2)
R80 (INT2)
I/O
port
port
I/O port
(R4 is High current port)
T/C input
Interrupt input
Interrupt input
Program
Memory (ROM)
Memory (ROM)
VDD
VSS
HOLD
(INT1)
RESET
Power Supply
XIN
XOUT
XOUT
Osc. connecting
pins
pins
Hold input
Reset input
DV-700S
DV-760S/H
DV-760S/H
11-30
11-23. IC8201 IX1610GE
Pin Name
Input/Output
Functions
R43 to R40
I/O
4-bit I/O port with latch.
When used as input port, the latch must be set to "1".
When used as input port, the latch must be set to "1".
R53 to R50
Every bit data is possible to be set cleared and tested by the bit manipulation instruction of the
L-register indirect addressing.
L-register indirect addressing.
R81 (T2)
2-bit I/O port with latch.
Timer/Counter 2 external input
I/O(Input)
When used as input port, external interrupt input
R80 (INT2)
pin, or timer/counter external input pin, the latch
External interrupt 2 input
must be set to "1".
XIN
Input
Resonator connecting pins.
XOUT
Output
For inputting external clock, XIN is used and XOUT is opened.
RESET
Input
Reset signal input
HOLD(INT1)
I/O(Input)
Hold request/release signal input
External interrupt 1 input and R82 I/O
VDD
Power Supply
+5V
Vss
0V (GND)
• Block Diagram
Hold controller
System controller
Timing Generator
Clock Generator
Interval Timer
12-bit
Timer/Counter
(2ch)
Timer/Counter
(2ch)
C Z S G
FLAG
ALU
KE
Accumulator
HR
LR
RAM Address buffer
Data Memory
(RAM)
Program
Counter
Counter
IR register
IR Decoder
EIR
Interrupt controller
EIF
Stack
SPW
DC
TC2
TC1
R5
R53
to
R50
R4
R43
to
R40
R8
R81 (T2)
R80 (INT2)
R80 (INT2)
I/O
port
port
I/O port
(R4 is High current port)
T/C input
Interrupt input
Interrupt input
Program
Memory (ROM)
Memory (ROM)
VDD
VSS
HOLD
(INT1)
RESET
Power Supply
XIN
XOUT
XOUT
Osc. connecting
pins
pins
Hold input
Reset input
