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Model
DV-660H (serv.man2)
Pages
51
Size
1.96 MB
Type
PDF
Document
Service Manual
Brand
Device
DVD / start to section 13-4
File
dv-660h-sm2.pdf
Date
PREV: Sharp DV-660H Service Manual

Sharp DV-660H (serv.man2) Service Manual ▷ View online

DV-660S
DV-660H
No
No
Are the video signals output to the pins of main 
unit  connector CN801?
CN801 25Pin CVBS
CN801 27Pin C
CN801 29Pin Y
@
CN803 5Pin Cb
CN803 7Pin Y
CN803 9Pin Cr
Yes
Yes
Check the lines between the pins of main unit connector 
CN801 and the pins of IC2006.
CN801 25Pin 
→
 IC2006 4Pin CVBS 
CN801 27Pin 
→
 IC2006 15Pin C
CN801 29Pin 
→
 IC2006 14Pin Y
FLOW CHART NO.16
Both video and audio do not operate normally
.(2)
Check the main unit. (IC201, Q202-7 periphery circuit)
No
(Make sure that the IC201, Q208-13, and IC2005 
peripheral circuit and control signal V-MUTE, RGB CTL 
lines are on "L" level.)
Check the main unit.(IC801-3 circuit)
No
No
Check the peripheral circuit of Cb/V DRIVE circuit 
IC2003 from the pin 5 of IC2006.
No
No
No
No
No
Set the disc on the disc tray.
<Video system>
Are the audio signals output to the pins of main unit connector CN801?
CN801 1Pin FRONT-L
CN801 6Pin REAR-R
CN801 3Pin FRONT-R
CN801 7Pin CENTER
CN801 5Pin REAR-L
CN801 8Pin SUB WOOFER
Are the video signals shown above input into the 
pins of IC2006?
IC2006 4Pin CVBS
IC2006 15Pin C
IC2006 14Pin Y
Yes
Is the video signal output to each pin of IC2006?
IC2006 5Pin CVBS
IC2006 12Pin S-Y
IC2006 2Pin S-C
Make sure that the level of IC2006 pin 6 is "L" level.
Check or replace IC2006.
Check the V-MUTE line.
Yes
No
Yes
Are the audio signals output to the specific output 
terminals?
No
Yes
Are the video signals output to the specific 
output terminals?
Is the composite video signal output to the 
VIDEO OUT terminal(J2001)?
Is the luminance signal output to the S-OUT 
terminal (J2002)?
Is the chroma signal output to the S-OUT 
terminal (J2002)?
Is theCb signal output to the Cb OUT terminal
(J2001)?
Is the Y signal output to the Y OUT terminal 
(J2002)?
Is the Cr signal output to the Cr OUT terminal
(J2002)?
Are the audio signals output to the FRONT-L/R 
OUT terminal (J2001)?
Are the audio signals output to the REAR-L/R OUT 
terminal (J2001)?
Are the audio signals output to the CENTER/
SUBWOOFER terminal (J2001)?
Check the peripheral circuit of S-YC DRIVE circuit 
IC2002 from the pin 12 of IC2006.
Check the peripheral circuit of S-YC DRIVE circuit 
IC2002 from the pin 2 of IC2006.
Check the peripheral circuit of Cb/V DRIVE circuit 
IC2003 from the pin 5 of CN803.
Check the peripheral circuit of Cr/Y DRIVE circuit 
IC2004 from the pin 7 of CN803.
Check the peripheral circuit of Cr/Y DRIVE circuit 
IC2004 from the pin 9 of CN803.
No
Check the peripheral circuit of AUDIO AMP. circuit 
IC6001 from the pin 1,3 of CN801.
No
No
Check the peripheral circuit of AUDIO AMP. circuit 
IC6002 from the pin 5,6 of CN801.
Check the peripheral circuit of AUDIO AMP. circuit 
IC6002 from the pin 7,8 of CN801.
FLOW CHART NO.17
Both video and audio do not operate normally
.(3)
Set the disc and play.
<Audio system>
FLOW CHART NO.18
No
No
Are the video signals output to the pins of main unit 
connector CN801?
CN803 11Pin B-OUT, CN803 13Pin G-OUT
CN803 15Pin R-OUT
Yes
Check the line between the pin 11 of CN803 and the pin 5 
of CN2303.
Check the line between the pin 13 of CN803 and the pin 3 
of CN2303.
Check the line between the pin 15 of CN803 and the pin 1 
of CN2303.
Check the line between the pin 12 of IC2006 and the pin 7 
of CN2303.
Check the line between the pin 2 of IC2006 and the pin 9 
of CN2303.
Check the line between the pin 5 of IC2006 and the pin 11 
of CN2303.
The signal is not output to 21PIN SCAR
T
. (The line output is OK.)
Check the main unit.
(Make sure that the IC201, Q208-13, and IC2005 
peripheral circuit and control signal V-MUTE, RGB CTL 
lines are on "L" level.)
No
No
<Video system>
Is specific signal input into the following terminals?
Is the B-OUT signal input into the pin 5 of CN2303?
Is the G-OUT signal input into the pin 3 of CN2303?
Is the R-OUT signal input into the pin 1 of CN2303?
Is the 21P-Y signal input into the pin 7 of CN2303?
Is the 21P-C signal input into the pin 9 of CN2303?
Is the 21P-CVBS signal input into the pin 11 of 
CN2303?
Yes
Is the video signal output to each pin of IC2006?
(1) Is the B-OUTPUT signal output to the pin 7 of 
     21PIN SCART terminal (SC2201)?
(2) Is the G-OUTPUT signal output to the pin 11 of 
     21PIN SCART terminal (SC2201)?
Yes
Yes
When "RGB" is selected with the signal selection 
switch (SW2301)
(1) Is the R-OUTPUT signal output to the pin 15 of 
     21PIN SCART terminal (SC2201)?
(2) Is the VIDEO-OUTPUT signal output to the 
     pin 19 of 21PIN SCART terminal (SC2201)?
Yes
When "S-VIDEO" is selected with the signal 
selection switch (SW2301)
(1) Is the C-OUTPUT signal output to the pin 15 of 
     21PIN SCART terminal (SC2201)?
(2) Is the Y-OUTPUT signal output to the pin 19 of
     21PIN SCART terminal (SC2201)?
Yes
Is the VIDEO-OUTPUT signal output to the pin 19 
of 21PIN SCART terminal (SC2201) when "VIDEO" 
is selected with the signal selection switch 
(SW2301)?
Are the pins 7 and 
12 of IC2302 on "L" 
level?
Check the peripheral circuit of B/G DRIVE circuit IC2303,
Q2306 from the pin 5 of CN2303.
Check the peripheral circuit of B/G DRIVE circuit IC2303,
Q2304 from the pin 3 of CN2303.
Is the R-OUT signal output to the pin 5 of SCART R/V 
DRIVE circuit IC2304?
Yes
No
Is the C-OUT signal output toQ2301,Q2303 of emitter?
No
Is the VIDEO OUT signal output to the pin 4 of SCART 
R/V DRIVE circuit IC2304?
Yes
Is the Y-OUT signal output to the pin 4 of SCART R/V 
DRIVE circuit IC2304?
Yes
Is the VIDEO OUT signal output to the pin 4 of SCART 
R/V DRIVE circuit IC2304?
Yes
No
Check the periphery of Q2305, Q2307, and Q2308.
Check the periphery of Q2301, Q2302, and Q2303.
Check the periphery of SCART R/V DRIVE circuit IC2304.
No
Check the periphery of SCART R/V DRIVE circuit IC2304.
No
Check the periphery of SCART R/V DRIVE circuit IC2304.
No
No
No
No
Is the R-OUTPUT signal output to the pin 6 of IC2302?
Is the CVBS signal output to the pin 5 of IC2302?
No
No
Is the C-OUTPUT signal output to the pin 6 of IC2302?
Is the 21P-Y signal output to the pin 5 of IC2302?
No
Is the 21P VIDEO-OUTPUT signal output to the pin 5 of 
IC2302?
Are the pins 7 and 
12 of IC2302 on "H" 
level?
No
Are the pins 7 and 12 of IC2302 on "L level?
10-3
DV-660S
DV-660H
Pin No.
Terminal name
I/O
Operation function
1
CVBS/Cb/B1
O
Analog composite video signal output or Cb or B signal output current drive (positive)
2
CVBS/Cb/B1
O
Analog composite video signal output or Cb or B signal output current drive (negative)
3
CVBS/Cb/B1 Vdd
Power Supply for CVBS / Cb/B DAC1 circuit
4
Y/G 1
O
Analog luminance or G signal output current drive (positive)
5
Y/G 1
O
Analog luminance or G signal output current drive (negative)
6
Y/G 1Vdd
Power Supply for Y/G DAC1 circuit
7
C/Cr/R 1
O
Analog chrominance signal output or Cr or R signal output current drive (positive)
8
C/Cr/R 1
O
Analog chrominance signal output or Cr or R signal output current drive (negative)
9
C/Cr/R 1Vdd
Power Supply for C/Cr/R DAC1 circuit
10
DA Vss
Ground for DAC circuit
11
Ibias 1
O
Reference current for the 1st set of 3 DACs
12
VRef 1
Reference full scale voltage for the 1st set of 3 DACs
13
DA Vdd
Power Supply for DACs
14
VRef 2
Reference full scale voltage for the 2nd set of 3 DACs
15
Ibias 2
O
Reference current for 2nd set of the 3 DACs
16
NC
No connect to pin
17
CVBS/Cb/B2
O
Analog composite video signal output or Cb or B signal output current drive (positive)
18
CVBS/Cb/B2
O
Analog composite video signal output or Cb or B signal output current drive (negative)
19
CVBS/Cb/B2 Vdd
Power Supply for CVBS / Cb/B DAC2 circuit
20
Y/G 2
O
Analog luminance or G signal output current drive (positive)
21
Y/G 2
O
Analog luminance or G signal output current drive (negative)
22
Y/G Vdd
Power Supply for Y/G DAC2 circuit
23
C/Cr/R 2
O
Analog chrominance signal output or Cr or R signal output current drive (positive)
24
C/Cr/R 2
O
Analog chrominance signal output or Cr or R signal output current drive (negative)
25
C/Cr/R 2Vdd
Power Supply for C/Cr/R DAC2 circuit
26
ChipA
I2C chip address select {0 : 40(hex)/41(hex) 1 : 1D(hex)/1E(hex)}
27
TEST
I
TEST pin (Ground)
28
DVss
Ground for Digital circuit
29
CLOCK
I
27MHz clock input
30
DVdd
Power Supply for Digital circuit
31
Reset
I
Reset signal, active LOW
32
PAL/NTSC
I
NTSC/PAL select. This pin is sampledonly at Reset.(NTSC : Low  PAL : High)
33
SO
z(O)
In SPI mode, serial data output / In I2C mode, grounded.
34
SDA/SI
I/O(I)
Serial data input, Open drain output / If SPI mode, serial data input
35
SCL/SCK
I
Serial clock
36
SEL
I/(I)
Connect to Ground / If SPI mode, this pin is chip select
37
DVdd
Power supply for Digital circuit
38
DVss
Ground for Digital circuit
39-46
DVIN7-0
I/O
8-bit Multiplexd Y/Cr/Cb 4:2:2 data (ITU Rec656/601) input (DVIA) or Multiplexd Y data
(ITU-Rec656/601) input in 16-bit input mode
47
Vmute
I
Video mute on Reset (0: normal, 1: mute)
48
C/Fsync/VBI
I/O
Csync/Frame sync input/output
49
F/Vsync
I/O
Frame sync or Vertical sync input/output
50
Hsync
I/O
Horizontal sync input/output
51
A/B sel
I
Switch control for 8-bit x 2 Mutiplexed 4:2:2 data (ITU Rec656/601) input (DVIA) or (DVIB)
52-55
DVIB7-4
I/O
8-bit Multiplexed 4:2:2 data (ITU Rec656-601) input (DVIB), or Multiplexed Cr/Cb data
(ITU Rec656/601) input in 16-bit input mode
56
DVss
Ground for Digital circuit
57
DVdd
Power Supply for Digital circuit
58-61
DVIB3-0
I/O
Multiplexed 4:2:2 data (ITU Rec656/601) input (DVIB), or Multiplexed Cr/Cb data
(ITU Rec656/601) input in 16-bit input mode
62
TP
I/O
Test data input/output (Grounded)
63,64
NC
No connect to pin (Ground)
11. IC FUNCTION LIST
11-1. IC201 MC44724A
DIGITAL VIDEO DECORDER
11-1
DV-660S
DV-660H
Pin No.
Terminal name
I/O
Operation function
1
EIN
I
RF signal input. Input of RF signal output of optical pickup.
2
GND1
–
Ground
3
S/Dsel
I
Single layer/dual layer selection signal input.
4
AIN
I
RF signal input. Input of RF signal output of optical pickup.
5
BIN
I
RF signal input. Input of RF signal output of optical pickup.
6
CIN
I
RF signal input. Input of RF signal output of optical pickup.
7
DIN
I
RF signal input. Input of RF signal output of optical pickup.
8
VrefIN
I
Reference voltage input. (2.1V)
9
FIN
I
RF signal input. Input of RF signal output of optical pickup.
10
GAINsel1
I
Amp gain selection input 1.
11
VCC1
–
Power terminal. (5.0V)
12
GAINsel2
I
Amp gain selection input 2.
13
FOUT
O
RF signal output. Input RF signal is current-voltage-converted and output.
14
EOUT
O
RF signal output. Input RF signal is current-voltage-converted and output.
15
DOUT
O
RF signal output. Input RF signal is current-voltage-converted and output.
16
COUT
O
RF signal output. Input RF signal is current-voltage-converted and output.
17
BOUT
O
RF signal output. Input RF signal is current-voltage-converted and output.
18
AOUT
O
RF signal output. Input RF signal is current-voltage-converted and output.
19
VCC2
–
Power terminal. (5.0V)
20
RFPOUT
O
Data read signal output. The same phase as MIXIN.
21
RFNOUT
O
Data read signal output. Reverse phase with respect to MIXIN.
22
MIXIN
I
Data read signal input.
23
MIXOUT
O
Data read signal output.
24
GND2
–
Ground
• Block Diagram
• Mode selection table
GAINsel1 (Terminal 10)
GAINsel2 (Terminal 12)
Amp gain
L
L
+6dB
H, OPEN
L
-2dB
L
H, OPEN
+2dB
H, OPEN
H, OPEN
-6dB
Amp. gain selection
Layer
S/DSEL (Terminal 3)
Amp gain
Single
L, OPEN
0dB
Dual
H
+10dB
Single layer/dual layer selection
11-2. IC301 IX1461GE
RF PRE AMP.
H, V
             Y
demux
Cb
Cr
Modulator
subcarrier
gen
off_set
0
0
0
CGMS,
WSS gen
CC_gen
Sync_generator
BG
copy
protection
bus
bus
TEST
I2C/SPI
BIAS
DAC
DAC
DAC
30 37, 57
28
51
38, 56
39~46
52~55, 58~61
DVdd
DVss
DVIA [7:0]
DVIB [7:0]
A/B_sel
62
TP
29
Clock
26
Chip A
31
Reset
32
32
PAL/NTSC
SO
34
SDA/SI
35
SCL/SCK
36
SEL
27
TEST
10
DAVss
13
DAVdd
15
Ibias 2
14
Vref 2
24
C/Cr/R 2
23
C/Cr/R 2
18
CVBS/Cb/B 2
17
CVBS/Cb/B 2
21
Y/G 2
20
Y/G 2
11
Ibias 1
12
Vref 1
8
C/Cr/R 1
7
C/Cr/R 1
2
CVBS/Cb/B 1
1
CVBS/Cb/B 1
5
Y/G 1
4
Y/G 1
9
C/Cr/R 1Vdd
3
CVBS/Cb/B 1Vdd
6
Y/G 1Vdd
25
C/Cr/R 2Vdd
19
CVBS/Cb/B 2Vdd
22
Y/G 2Vdd
50
Hsync
49
F/Vsync
48
C/Fsync/VBI
MC44724/5A
BIAS
DAC
DAC
Output Selector
DAC
0
0
0
0
0
0
0
RGB matrix
11-2
DV-660S
DV-660H
1
GND
–
GND terminal.
–
2
P2TP
I
TE+input (CD)
VrA
3
P2TN
I
TE–input (CD)
VrA
4
LDO2
O
Drive ouput
–
5
MDI2
I
Monitor input
–
6
VrA
O
Analog VREF
2.1[V]
7
VrD
O
Digital VREF
–
Vdd 1/2
8
Vdd
I
Power terminal
4.2V (3.3V)
9
DPAC
–
DPD AC combination capacity 1
–
10
DPBD
–
DPD AC combination capacity 2
–
11
DPD1
–
DPD integral capacity 1
–
12
DPD2
–
DPD integral capacity 2
–
13
SCB
I
Control line (Bit clock)
2.2[V]
14
SCL
I
Control line (Latch signal)
2.2[V]
15
SCD
I
Control line (Sirial Data)
2.2[V]
16
VRCK
I
Reference clock input
2.3[V]
When frequency is increased, the
filters excepting the servo LPF are
shifted to high frequency side.
17
VCKF
–
Capacity for time constant adjustment
–
18
VccP
–
Power terminal
–
19
LVL
O
Servo addition output
Vrd x (1/2)
20
TEO
O
TE output
VrD
21
FEO
O
FE output
VrD
22
DFTN
I
DPD difect
–
Low DPD output: Mute
23
VccS
–
Power terminal (servo)
–
24
RPZ
O
RF ripple center voltage
VrD
25
RPO
O
RF ripple output
VrD
26
RPB
O
RF ripple bottom
–
27
RPP
O
RF ripple peak
–
28
RFO
O
Equalizing RF output
2.3[V]
29
NC
–
NC terminal
–
To be connected to GND
30
NC
–
NC terminal
–
To be connected to GND
31
VccR
–
Power terminal (RF)
–
32
DPDB
I
Pit depth adjustment
VrD
When D PDB is raised, the A/B
side delay increases.
33
TEB
I
TE balance
VrD
When TEB is raised, the TP side
gain increases and the A+C side
delay increases.
34
FEB
I
FE balance
VrD
When FEB is raised, the A+C (FP)
side gain increases.
35
PSC
I
VRCK frequency division ON/OFF
–
High: Frequency division OFF
36
Vcc2
–
Power terminal
–
37
NC
–
NC terminal
VrD
To be connected to VrD, or to GND
through C
38
EQD
I
Group delay correction
VrD
When EQD is raised, the group
delay increases at the right side.
39
GND2
–
GND terminal.
–
40
RFDC
–
DC feedback capacity
–
Pin No. Terminal name
I/O
Operation function
Terminal DC Voltage(TYP.)
Remarks
11-3. IC303 IX1517GE
RF SIGNAL PROCESSOR
• Block Diagram
24
23
22
21
20
19
18
17
16
15
14
13
1
9
8
7
6
5
4
3
2
10
12
11
MIX
EIN
CIN
BIN
AIN
S/Dsel
GND1
FIN
VrefIN
DIN
DOUT
FOUT
VCC1
GAINsel1
GAINsel2
RFPOUT
VCC2
AOUT
BOUT
COUT
EOUT
RFNOUT
GND2
MIXOUT
MIXIN
11-3
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