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– 57 –

105

PCK

Output

EFM playback signal shift clock output.

106

DVDD0

Input

Internal logic system power supply. (Digital 2.5 V)

107

DVSS

—

Digital system ground.

108

VCOCTL

—

VCO filter connection.

109

PPDO

—

Phase comparator filter connection.

110

FPDO

—

Frequency comparator filter connection.

111

LF1

—

Filter connection 1.

112

LF2

—

Filter connection 2.

113

LF3

—

Filter connection 3.

114

PCN

—

Voltage monitor. (Phase comparator charge pump PCH control voltage.)

115

PISET

—

Phase comparator constant current charge pump current setting.

116

FISET

—

Frequency comparator constant charge pump current setting.

117

CDFR

—

EFM data recovery PLL VCO oscillator range setting. (CD)

118

DVDFR

—

EFM data recovery PLL VCO oscillator range setting. (DVD)

119

AVDD2

Input

EFM PLL JV power supply. (Analog 3.3 V)

120

AVSS

—

Analog system ground.

121

JVCPI

—

JV

122

JVCPC

—

JV

123

JVAO

Output

EFM data recovery PLL clock jitter output.

124

JVAIN

—

JV

125

JVRVO

—

JV

126

AVDD3

Input

System PLL power supply. (Analog 2.5 V)

127

AVSS

—

Analog system ground.

128

VOPDO

—

System PLL filter connection.

129

VRPFR

—

System PLL VCO oscillator range setting.

130

VCOC

—

System PLL filter connection.

131

DVDD0

Input

Internal logic system power supply. (Digital 2.5 V)

132

DVSS

—

Digital system ground.

133

DVDD2

Input

Oscillator circuit power supply. (Digital 3.3 V)

134

XIN

Input

Oscillator circuit input.

135

XOUT

Output

Oscillator circuit output.

136

DVSS

—

Digital system ground.

137

X16MIO

Input/Output

External 16 MHz I/O.

138

TEST2

Input

Test input 2. (This input must be tied low.)

139

DVDCKIO

Input/Output

Internal DVD clock I/O.

140

FSX

Output

CD single frame sync signal.

141

EFLG

Output

Error correction C1 and C2 correction state monitor.

142

DOUT

Output

Audio EIAJ data output.

143

DVDD1

Input

I/O system power supply. (Digital 3.3 V)

144

DVSS

—

Digital system ground.

145

MD8

Input/Output

DRAM data bus 8.

146

MD9

Input/Output

DRAM data bus 9.

147

MD10

Input/Output

DRAM data bus 10.

148

MD11

Input/Output

DRAM data bus 11.

149

N.C.

—

No connect pin.

150

MD12

Input/Output

DRAM data bus 12.

151

MD13

Input/Output

DRAM data bus 13.

152

MD14

Input/Output

DRAM data bus 14.

153

MD15

Input/Output

DRAM data bus 15.

154

N.C.

—

No connect pin.

155

N.C.

—

No connect pin.

156

MD0

Input/Output

DRAM data bus 0.

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.

– 58 –

In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.

157

MD1

Input/Output

DRAM data bus 1.

158

MD2

Input/Output

DRAM data bus 2.

159

MD3

Input/Output

DRAM data bus 3.

160

N.C.

—

No connect pin.

161

MD4

Input/Output

DRAM data bus 4.

162

MD5

Input/Output

DRAM data bus 5.

163

MD6

Input/Output

DRAM data bus 6.

164

MD7

Input/Output

DRAM data bus 7.

165

DVDD1

Input

I/O system power supply. (Digital 3.3 V)

166

DVSS

—

Digital system ground.

167

DEFECT1

Input/Output

Defect signal input.

168

DEFECT0

Output

Defect signal output.

169

RFP0

Input/Output

General -purpose RF I/O 0.

170

RFP1

Input/Output

General -purpose RF I/O 1.

171

RFP2

Input/Output

General -purpose RF I/O 2.

172

RFP3

Input/Output

General -purpose RF I/O 3.

173

TEST0

Input/Output

Tracking error signal I/O.

174

HFLI0

Input/Output

Mirror detection signal I/O.

175

DVDD0

Input

Internal logic system power supply. (Digital 2.5 V)

176

DVSS

—

Digital system ground.

DVDD0: 4 pins: Digital system 2.5 V power supply: Logic block
DVDD1: 4 pins: Digital system 3.3 V power supply: I/O pin power supply
DVDD2: 1 pins: Digital system 3.3 V power supply: Oscillator circuit power supply
AVDD1: 1 pins: Analog system 3.3 V power supply: A/D and D/A converters, SLC
AVDD2: 1 pins: Analog system 3.3 V power supply: EFM PLL and JV
AVDD3: 1 pins: Analog system 2.5 V power supply: System PLL
DVSS: 12 pins: Digital system ground
AVSS: 3 pins: Analog system ground

– 59 –

12G

11G

10G

9G

8G

7G

6G

5G

4G

3G

2G

1G

GRID ASSIGNMENT

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Dp

Col

(2G-11G)

P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16

12G

11G

10G

9G

8G

7G

6G

5G

4G

3G

2G

1G

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Col

Col

Col

Col

Dp

ANODE CONNECTION

PIN CONNECTION

PIN NO.

CONNECTION

43

F2

42

F2

41

NP

40

NP

39

P16

38

P15

37

P14

36

P13

35

P12

34

P11

33

P10

32

P9

31

P8

30

P7

29

P6

28

P5

27

P4

26

P3

25

P2

24

P1

23

NX

22

NX

21

NX

20

NX

19

NX

18

NX

17

NX

16

12G

15

11G

14

10G

13

9G

12

8G

11

7G

10

6G

9

5G

8

4G

7

3G

6

2G

5

1G

4

NP

3

NP

2

F1

1

F1

* Note

Fn

: Filament pin

nG

: Grid pin

Pn

:Anode pin

NP

: No pin

NX

: No extended pin

– 60 –

–– MEMO ––